S. Fregonese - Academia.edu (original) (raw)

Papers by S. Fregonese

Research paper thumbnail of A wideband highly efficient class-J integrated power amplifier for 5G applications

2017 15th IEEE International New Circuits and Systems Conference (NEWCAS)

Next generation mobile systems are expanding their spectrum to millimeter wave frequency bands to... more Next generation mobile systems are expanding their spectrum to millimeter wave frequency bands to support data rates up to multigigabits per second. The power amplifier is a critical element of the radiofrequency front-end in terms of power consumption and bandwidth. In this work, we present the design of a fully integrated wideband high efficiency class-J power amplifier. Post-layout simulation results show a broadband behavior of the amplifier over 12 GHz of bandwidth with a saturated power of 16.3 dBm and a peak power added efficiency of 39 % at 28 GHz. In addition, the linearity of the amplifier is reconfigurable thanks to the back-gate of the 28nm CMOS FD-SOI technology.

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Research paper thumbnail of Investigation of Variation in On-Si On-Wafer TRL Calibration in Sub-THz

IEEE Transactions on Semiconductor Manufacturing, 2021

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Research paper thumbnail of SiGe HBTs and BiCMOS Technology for Present and Future Millimeter-Wave Systems

IEEE Journal of Microwaves, 2021

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Research paper thumbnail of High frequency and noise performance of GFETs

2017 International Conference on Noise and Fluctuations (ICNF)

Graphene material exhibits a number of outstanding electronic and mechanical properties that make... more Graphene material exhibits a number of outstanding electronic and mechanical properties that make it very attractive for micro and nanoelectronic applications. Considering graphene field effect transistors (GFETs), considerable efforts were made during the recent years, and the devices at state of the art show impressive high frequency cut-off frequencies. The interest of GFET is particularly strong for some high frequency (HF) applications such as high linearity mixer in W-band, THz detection, …. In this paper we will give an overview on the GFETs and will present the devices developed in our Lab. Based on high frequency measurements of noise characteristics of our GFETs, we will point out the impact of technological aspects (such as contact resistance, device structure) on the HF noise performances. The implications of our findings for the development of graphene-based circuit such as low noise amplifiers will be also discussed.

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Research paper thumbnail of In-Situ Calibration and De-Embedding Test Structure Design for SiGe HBT On-Wafer Characterization up to 500 GHz

2020 94th ARFTG Microwave Measurement Symposium (ARFTG), 2020

In this paper, we present an in-situ thru-reflect-line (TRL) calibration and de-embedding kit tha... more In this paper, we present an in-situ thru-reflect-line (TRL) calibration and de-embedding kit that sets the reference plane in close proximity to the device under test. This is made possible thanks to the realization of the standards at the metal3 BEOL level, instead of the common meta1-8 solution. This novel calibration kit has been compared to classic TRL, both for parasitics assessment and by direct application on the active device (HBT) measurements.

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Research paper thumbnail of 2D RF Electronics: from devices to circuits - challenges and applications

2018 76th Device Research Conference (DRC), 2018

We developed process technologies dedicated to high frequency graphene field-effect transistors (... more We developed process technologies dedicated to high frequency graphene field-effect transistors (GFETs). We used graphene from different sources (graphene growth directly on silicon carbide (SiC) substrate by chemical vapor deposition (CVD) technique [1], CVD graphene growth on Cu foil and transferred on Si02/Si substrate [2]) to realize two GFET structures (top gate and back gate transistors). After fabrication, we have explored the high frequency performances of GFETs including noise performances. The performances of GFET achieved are comparable to the state of the art with the gate length. The noise parameters of the transistors are mandatory for circuit design (linear application such as amplifier). These parameters limit the performances of the device when small signals are considered. The effort was made here to measure the noise parameters of GFET (mathrmNFmin,mathrmRmathrmn,Gammamathrmopt)(\mathrm{NF}_{\min}, \mathrm{R}_{\mathrm{n}}, \Gamma_{\mathrm{opt}})(mathrmNFmin,mathrmRmathrmn,Gammamathrmopt). It is well known that these parameters depend both on intr...

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Research paper thumbnail of A new physics-based compact model for Bilayer Graphene Field-Effect Transistors

2015 45th European Solid State Device Research Conference (ESSDERC), 2015

In this paper, a new compact model for Dual-Gate Bilayer Graphene Field-Effect Transistors is pre... more In this paper, a new compact model for Dual-Gate Bilayer Graphene Field-Effect Transistors is presented. The model uses a physics-based density of states (DOS) to compute the current and the charge. Moreover, the effect of back-gate biasing on the flatband voltage, residual carrier density and access resistances is implemented in the model for accurate description of the drain current. The developed large-signal compact model has been implemented in Verilog-A and its accuracy has been evaluated by comparison with measurements from the literature.

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Research paper thumbnail of Caractérisation et modélisation d’une nouvelle technologie de synthétiseur d’impédances automatiques coaxial 3,5mm à fort TOS

Les synthetiseurs d’impedances ou « tuners » sont des instruments clefs utilises pour la caracter... more Les synthetiseurs d’impedances ou « tuners » sont des instruments clefs utilises pour la caracterisation des circuits radiofrequences (RF) actifs. Leur principale fonctionnalite est l’adaptation d’impedance d’entree (configuration « source pull ») ou l’impedance de sortie (configuration « load pull »). Focus Microwaves et Maury Microwave actuellement leaders du marche des tuners utilisent un systeme eprouve, mais comportant des limitations. Ces tuners ne permettent pas d’obtenir de tres fortes valeurs de TOS et ne permettent donc pas de synthetiser des impedances localisees a proximite du bord de l’abaque de Smith. AdvTech et le laboratoire IMS ont developpe et caracterise un tuner coaxial programmable innovant et performant permettant d’obtenir de tres hauts TOS. Il permettra a terme aux concepteurs de composants et de circuits de trouver les impedances de source et de charge optimales, meme si ces dernieres sont localisees tres en bordure de l’abaque de Smith.

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Research paper thumbnail of Sahoo et al. - 2011 - Thermal Impedance Modeling of Si–Ge HBTs From Low

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Research paper thumbnail of Final Version MWEISS Submission Number 130

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Research paper thumbnail of Base-collector junction charge investigation of Si/SiGe HBT on thin film SOI

Proceedings of 35th European Solid-State Device Research Conference, 2005. ESSDERC 2005.

Abstract The semi-depleted HBT on thin film SOI presents a kink on its electrical characteristics... more Abstract The semi-depleted HBT on thin film SOI presents a kink on its electrical characteristics and in particular on the base-collector capacitance. Classical compact models cannot represent this behavior. This paper proposes a new compact formulation of ...

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Research paper thumbnail of Versatile Compact Model for Graphene FET Targeting Reliability-Aware Circuit Design

IEEE Transactions on Electron Devices, 2015

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Research paper thumbnail of Electro-thermal dynamic simulation and thermal spreading impedance modeling of Si-Ge HBTs

2011 IEEE Bipolar/BiCMOS Circuits and Technology Meeting, 2011

Abstract In this paper, a new and simple approach simulating electro-thermal dynamic behaviour of... more Abstract In this paper, a new and simple approach simulating electro-thermal dynamic behaviour of Heterojunction Bipolar Transistors (HBTs) has been demonstrated. Time domain junction temperature variations at different frequency and, therefore, thermal spreading impedance have been obtained numerically by means of 3D device simulations and which has been verified through low frequency scattering parameter measurements for different geometry of transistors. A physical electro-thermal recursive network has been ...

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Research paper thumbnail of Thin film SOI HBT: A study of the effect of substrate bias on the electrical characteristics

Solid-State Electronics, 2006

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Research paper thumbnail of Graphene electronics: how far from industrial applications

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Research paper thumbnail of Investigation of Electrical BJT Performance through Extrinsic Stress Layer Using TCAD Modeling

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Research paper thumbnail of Modélisation thermique des TBH SiGe destinés à des applications radiofréquences

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Research paper thumbnail of Compact Modeling of the Schottky Barrier Junction in the Carbon Nanotube Field Effect Transistor

ABSTRACT In this work, we have developed a compact analytical model for the I-V characteristics o... more ABSTRACT In this work, we have developed a compact analytical model for the I-V characteristics of tunnel current in a Schottky barrier CNTFET which features the main physical effects governing the operation of this device. The simulated results obtained using this model are in close agreement with numerical calculation results.

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Research paper thumbnail of Modélisation compacte et application circuit de transistors à nanotube de carbone à effet de champ avec barrières Schottky

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Research paper thumbnail of Electro-Thermal Device Characterization & Modelling

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Research paper thumbnail of A wideband highly efficient class-J integrated power amplifier for 5G applications

2017 15th IEEE International New Circuits and Systems Conference (NEWCAS)

Next generation mobile systems are expanding their spectrum to millimeter wave frequency bands to... more Next generation mobile systems are expanding their spectrum to millimeter wave frequency bands to support data rates up to multigigabits per second. The power amplifier is a critical element of the radiofrequency front-end in terms of power consumption and bandwidth. In this work, we present the design of a fully integrated wideband high efficiency class-J power amplifier. Post-layout simulation results show a broadband behavior of the amplifier over 12 GHz of bandwidth with a saturated power of 16.3 dBm and a peak power added efficiency of 39 % at 28 GHz. In addition, the linearity of the amplifier is reconfigurable thanks to the back-gate of the 28nm CMOS FD-SOI technology.

Bookmarks Related papers MentionsView impact

Research paper thumbnail of Investigation of Variation in On-Si On-Wafer TRL Calibration in Sub-THz

IEEE Transactions on Semiconductor Manufacturing, 2021

Bookmarks Related papers MentionsView impact

Research paper thumbnail of SiGe HBTs and BiCMOS Technology for Present and Future Millimeter-Wave Systems

IEEE Journal of Microwaves, 2021

Bookmarks Related papers MentionsView impact

Research paper thumbnail of High frequency and noise performance of GFETs

2017 International Conference on Noise and Fluctuations (ICNF)

Graphene material exhibits a number of outstanding electronic and mechanical properties that make... more Graphene material exhibits a number of outstanding electronic and mechanical properties that make it very attractive for micro and nanoelectronic applications. Considering graphene field effect transistors (GFETs), considerable efforts were made during the recent years, and the devices at state of the art show impressive high frequency cut-off frequencies. The interest of GFET is particularly strong for some high frequency (HF) applications such as high linearity mixer in W-band, THz detection, …. In this paper we will give an overview on the GFETs and will present the devices developed in our Lab. Based on high frequency measurements of noise characteristics of our GFETs, we will point out the impact of technological aspects (such as contact resistance, device structure) on the HF noise performances. The implications of our findings for the development of graphene-based circuit such as low noise amplifiers will be also discussed.

Bookmarks Related papers MentionsView impact

Research paper thumbnail of In-Situ Calibration and De-Embedding Test Structure Design for SiGe HBT On-Wafer Characterization up to 500 GHz

2020 94th ARFTG Microwave Measurement Symposium (ARFTG), 2020

In this paper, we present an in-situ thru-reflect-line (TRL) calibration and de-embedding kit tha... more In this paper, we present an in-situ thru-reflect-line (TRL) calibration and de-embedding kit that sets the reference plane in close proximity to the device under test. This is made possible thanks to the realization of the standards at the metal3 BEOL level, instead of the common meta1-8 solution. This novel calibration kit has been compared to classic TRL, both for parasitics assessment and by direct application on the active device (HBT) measurements.

Bookmarks Related papers MentionsView impact

Research paper thumbnail of 2D RF Electronics: from devices to circuits - challenges and applications

2018 76th Device Research Conference (DRC), 2018

We developed process technologies dedicated to high frequency graphene field-effect transistors (... more We developed process technologies dedicated to high frequency graphene field-effect transistors (GFETs). We used graphene from different sources (graphene growth directly on silicon carbide (SiC) substrate by chemical vapor deposition (CVD) technique [1], CVD graphene growth on Cu foil and transferred on Si02/Si substrate [2]) to realize two GFET structures (top gate and back gate transistors). After fabrication, we have explored the high frequency performances of GFETs including noise performances. The performances of GFET achieved are comparable to the state of the art with the gate length. The noise parameters of the transistors are mandatory for circuit design (linear application such as amplifier). These parameters limit the performances of the device when small signals are considered. The effort was made here to measure the noise parameters of GFET (mathrmNFmin,mathrmRmathrmn,Gammamathrmopt)(\mathrm{NF}_{\min}, \mathrm{R}_{\mathrm{n}}, \Gamma_{\mathrm{opt}})(mathrmNFmin,mathrmRmathrmn,Gammamathrmopt). It is well known that these parameters depend both on intr...

Bookmarks Related papers MentionsView impact

Research paper thumbnail of A new physics-based compact model for Bilayer Graphene Field-Effect Transistors

2015 45th European Solid State Device Research Conference (ESSDERC), 2015

In this paper, a new compact model for Dual-Gate Bilayer Graphene Field-Effect Transistors is pre... more In this paper, a new compact model for Dual-Gate Bilayer Graphene Field-Effect Transistors is presented. The model uses a physics-based density of states (DOS) to compute the current and the charge. Moreover, the effect of back-gate biasing on the flatband voltage, residual carrier density and access resistances is implemented in the model for accurate description of the drain current. The developed large-signal compact model has been implemented in Verilog-A and its accuracy has been evaluated by comparison with measurements from the literature.

Bookmarks Related papers MentionsView impact

Research paper thumbnail of Caractérisation et modélisation d’une nouvelle technologie de synthétiseur d’impédances automatiques coaxial 3,5mm à fort TOS

Les synthetiseurs d’impedances ou « tuners » sont des instruments clefs utilises pour la caracter... more Les synthetiseurs d’impedances ou « tuners » sont des instruments clefs utilises pour la caracterisation des circuits radiofrequences (RF) actifs. Leur principale fonctionnalite est l’adaptation d’impedance d’entree (configuration « source pull ») ou l’impedance de sortie (configuration « load pull »). Focus Microwaves et Maury Microwave actuellement leaders du marche des tuners utilisent un systeme eprouve, mais comportant des limitations. Ces tuners ne permettent pas d’obtenir de tres fortes valeurs de TOS et ne permettent donc pas de synthetiser des impedances localisees a proximite du bord de l’abaque de Smith. AdvTech et le laboratoire IMS ont developpe et caracterise un tuner coaxial programmable innovant et performant permettant d’obtenir de tres hauts TOS. Il permettra a terme aux concepteurs de composants et de circuits de trouver les impedances de source et de charge optimales, meme si ces dernieres sont localisees tres en bordure de l’abaque de Smith.

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Research paper thumbnail of Sahoo et al. - 2011 - Thermal Impedance Modeling of Si–Ge HBTs From Low

Bookmarks Related papers MentionsView impact

Research paper thumbnail of Final Version MWEISS Submission Number 130

Bookmarks Related papers MentionsView impact

Research paper thumbnail of Base-collector junction charge investigation of Si/SiGe HBT on thin film SOI

Proceedings of 35th European Solid-State Device Research Conference, 2005. ESSDERC 2005.

Abstract The semi-depleted HBT on thin film SOI presents a kink on its electrical characteristics... more Abstract The semi-depleted HBT on thin film SOI presents a kink on its electrical characteristics and in particular on the base-collector capacitance. Classical compact models cannot represent this behavior. This paper proposes a new compact formulation of ...

Bookmarks Related papers MentionsView impact

Research paper thumbnail of Versatile Compact Model for Graphene FET Targeting Reliability-Aware Circuit Design

IEEE Transactions on Electron Devices, 2015

Bookmarks Related papers MentionsView impact

Research paper thumbnail of Electro-thermal dynamic simulation and thermal spreading impedance modeling of Si-Ge HBTs

2011 IEEE Bipolar/BiCMOS Circuits and Technology Meeting, 2011

Abstract In this paper, a new and simple approach simulating electro-thermal dynamic behaviour of... more Abstract In this paper, a new and simple approach simulating electro-thermal dynamic behaviour of Heterojunction Bipolar Transistors (HBTs) has been demonstrated. Time domain junction temperature variations at different frequency and, therefore, thermal spreading impedance have been obtained numerically by means of 3D device simulations and which has been verified through low frequency scattering parameter measurements for different geometry of transistors. A physical electro-thermal recursive network has been ...

Bookmarks Related papers MentionsView impact

Research paper thumbnail of Thin film SOI HBT: A study of the effect of substrate bias on the electrical characteristics

Solid-State Electronics, 2006

Bookmarks Related papers MentionsView impact

Research paper thumbnail of Graphene electronics: how far from industrial applications

Bookmarks Related papers MentionsView impact

Research paper thumbnail of Investigation of Electrical BJT Performance through Extrinsic Stress Layer Using TCAD Modeling

Bookmarks Related papers MentionsView impact

Research paper thumbnail of Modélisation thermique des TBH SiGe destinés à des applications radiofréquences

Bookmarks Related papers MentionsView impact

Research paper thumbnail of Compact Modeling of the Schottky Barrier Junction in the Carbon Nanotube Field Effect Transistor

ABSTRACT In this work, we have developed a compact analytical model for the I-V characteristics o... more ABSTRACT In this work, we have developed a compact analytical model for the I-V characteristics of tunnel current in a Schottky barrier CNTFET which features the main physical effects governing the operation of this device. The simulated results obtained using this model are in close agreement with numerical calculation results.

Bookmarks Related papers MentionsView impact

Research paper thumbnail of Modélisation compacte et application circuit de transistors à nanotube de carbone à effet de champ avec barrières Schottky

Bookmarks Related papers MentionsView impact

Research paper thumbnail of Electro-Thermal Device Characterization & Modelling

Bookmarks Related papers MentionsView impact