G. Memik - Academia.edu (original) (raw)

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Papers by G. Memik

Research paper thumbnail of User identification based on finger-vein patterns for consumer electronics devices

IEEE Transactions on Consumer Electronics, 2010

Research paper thumbnail of An FPGA-Based Network Intrusion Detection Architecture

IEEE Transactions on Information Forensics and Security, 2008

Research paper thumbnail of Electrical Engineering and Computer Science Department

Network, Dec 18, 2009

For both technological and economic reasons, the default path between two end systems in the wide... more For both technological and economic reasons, the default path between two end systems in the widearea Internet can be suboptimal. This has motivated a number of systems that attempt to improve reliability and performance by routing over one or more hops in an overlay. Most of the proposed solutions, however, fall at an extreme in the cost-performance trade-off. While some provide nearoptimal performance with an unscalable measurement overhead, others avoid measurement when selecting routes around ...

Research paper thumbnail of JETTY: filtering snoops for reduced energy consumption in SMP servers

Proceedings HPCA Seventh International Symposium on High-Performance Computer Architecture

Research paper thumbnail of A Novel Application Development Environment for Large-Scale Scientific Computations

Effective high-level data management is becoming an important issue with more and more scientific... more Effective high-level data management is becoming an important issue with more and more scientific applications manipulating huge amounts of secondary-storage and tertiarystorage data using parallel processors. A major problem facing the current solutions to this data management problem is that these solutions either require a deep understanding of specific data storage architectures and file layouts to obtain the best performance. In this paper, we discuss the design, implementation, and evaluation of a novel application development environment for scientific computations. This environment includes a number of components that make it easy for the programmers to code and run their applications without much programming effort, and at the same time, to harness the available computational and storage power on parallel architectures. Embarking on this ambitious goal, we first present a performance-oriented meta-data management system that governs data flow between storage devices and app...

Research paper thumbnail of Engineering Over-Clocking: Reliability-Performance Trade-Offs for High-Performance Register Files

2005 International Conference on Dependable Systems and Networks (DSN'05)

Research paper thumbnail of A novel application development environment for large-scale scientific computations

Proceedings of the 14th international conference on Supercomputing - ICS '00, 2000

Research paper thumbnail of Dynamic Directories: A mechanism for reducing on-chip interconnect power in multicores

2012 Design, Automation & Test in Europe Conference & Exhibition (DATE), 2012

Research paper thumbnail of GPU-accelerated Monte Carlo simulations of dense stellar systems

2012 Innovative Parallel Computing (InPar), 2012

Research paper thumbnail of An FPGA Based All-Digital Transmitter with Radio Frequency Output for Software Defined Radio

2007 Design, Automation & Test in Europe Conference & Exhibition, 2007

Research paper thumbnail of Design and evaluation of smart disk architecture for DSS commercial workloads

Proceedings 2000 International Conference on Parallel Processing, 2000

Research paper thumbnail of Peak temperature control and leakage reduction during binding in high level synthesis

Proceedings of the 2005 international symposium on Low power electronics and design - ISLPED '05, 2005

Research paper thumbnail of Global resource sharing for synthesis of control data flow graphs on FPGAs

Proceedings of the 40th conference on Design automation - DAC '03, 2003

Research paper thumbnail of Real-time feature extraction for high speed networks

International Conference on Field Programmable Logic and Applications, 2005., 2005

Research paper thumbnail of Design and Implementation of an FPGA Architecture for High-Speed Network Feature Extraction

2007 International Conference on Field-Programmable Technology, 2007

Research paper thumbnail of Anchor 2005

Research paper thumbnail of GPU-accelerated Monte Carlo simulations of dense stellar systems

Research paper thumbnail of Galaxy

Proceedings of the 28th ACM international conference on Supercomputing - ICS '14, 2014

Research paper thumbnail of Automatic extraction of function bodies from software binaries

Proceedings of the 2005 conference on Asia South Pacific design automation - ASP-DAC '05, 2005

Research paper thumbnail of Microarchitectures for Managing Chip Revenues under Process Variations

IEEE Computer Architecture Letters, 2008

Research paper thumbnail of User identification based on finger-vein patterns for consumer electronics devices

IEEE Transactions on Consumer Electronics, 2010

Research paper thumbnail of An FPGA-Based Network Intrusion Detection Architecture

IEEE Transactions on Information Forensics and Security, 2008

Research paper thumbnail of Electrical Engineering and Computer Science Department

Network, Dec 18, 2009

For both technological and economic reasons, the default path between two end systems in the wide... more For both technological and economic reasons, the default path between two end systems in the widearea Internet can be suboptimal. This has motivated a number of systems that attempt to improve reliability and performance by routing over one or more hops in an overlay. Most of the proposed solutions, however, fall at an extreme in the cost-performance trade-off. While some provide nearoptimal performance with an unscalable measurement overhead, others avoid measurement when selecting routes around ...

Research paper thumbnail of JETTY: filtering snoops for reduced energy consumption in SMP servers

Proceedings HPCA Seventh International Symposium on High-Performance Computer Architecture

Research paper thumbnail of A Novel Application Development Environment for Large-Scale Scientific Computations

Effective high-level data management is becoming an important issue with more and more scientific... more Effective high-level data management is becoming an important issue with more and more scientific applications manipulating huge amounts of secondary-storage and tertiarystorage data using parallel processors. A major problem facing the current solutions to this data management problem is that these solutions either require a deep understanding of specific data storage architectures and file layouts to obtain the best performance. In this paper, we discuss the design, implementation, and evaluation of a novel application development environment for scientific computations. This environment includes a number of components that make it easy for the programmers to code and run their applications without much programming effort, and at the same time, to harness the available computational and storage power on parallel architectures. Embarking on this ambitious goal, we first present a performance-oriented meta-data management system that governs data flow between storage devices and app...

Research paper thumbnail of Engineering Over-Clocking: Reliability-Performance Trade-Offs for High-Performance Register Files

2005 International Conference on Dependable Systems and Networks (DSN'05)

Research paper thumbnail of A novel application development environment for large-scale scientific computations

Proceedings of the 14th international conference on Supercomputing - ICS '00, 2000

Research paper thumbnail of Dynamic Directories: A mechanism for reducing on-chip interconnect power in multicores

2012 Design, Automation & Test in Europe Conference & Exhibition (DATE), 2012

Research paper thumbnail of GPU-accelerated Monte Carlo simulations of dense stellar systems

2012 Innovative Parallel Computing (InPar), 2012

Research paper thumbnail of An FPGA Based All-Digital Transmitter with Radio Frequency Output for Software Defined Radio

2007 Design, Automation & Test in Europe Conference & Exhibition, 2007

Research paper thumbnail of Design and evaluation of smart disk architecture for DSS commercial workloads

Proceedings 2000 International Conference on Parallel Processing, 2000

Research paper thumbnail of Peak temperature control and leakage reduction during binding in high level synthesis

Proceedings of the 2005 international symposium on Low power electronics and design - ISLPED '05, 2005

Research paper thumbnail of Global resource sharing for synthesis of control data flow graphs on FPGAs

Proceedings of the 40th conference on Design automation - DAC '03, 2003

Research paper thumbnail of Real-time feature extraction for high speed networks

International Conference on Field Programmable Logic and Applications, 2005., 2005

Research paper thumbnail of Design and Implementation of an FPGA Architecture for High-Speed Network Feature Extraction

2007 International Conference on Field-Programmable Technology, 2007

Research paper thumbnail of Anchor 2005

Research paper thumbnail of GPU-accelerated Monte Carlo simulations of dense stellar systems

Research paper thumbnail of Galaxy

Proceedings of the 28th ACM international conference on Supercomputing - ICS '14, 2014

Research paper thumbnail of Automatic extraction of function bodies from software binaries

Proceedings of the 2005 conference on Asia South Pacific design automation - ASP-DAC '05, 2005

Research paper thumbnail of Microarchitectures for Managing Chip Revenues under Process Variations

IEEE Computer Architecture Letters, 2008

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