Gaurav Trivedi - Academia.edu (original) (raw)

Papers by Gaurav Trivedi

Research paper thumbnail of Theoretical Analysis of pi-Phase-Shifted Fiber Bragg Grating for Longitudinal Ultrasonic Acoustic Wave

IEEE, 2019

This paper presents a detailed theoretical analysis of pi-phase-shifted fiber Bragg grating (π-FB... more This paper presents a detailed theoretical analysis of pi-phase-shifted fiber Bragg grating (π-FBG) for longitudinal ultrasonic (US) acoustic stain wave. The influence of grating controlling parameters (grating length, index change, and apodization), and US acoustic wavelengths on the wavelengthshift sensitivity of the π-FBG has been investigated. The effect of the slow-light in the π-FBG acoustic sensor has also been discussed. Simulation results show that apodization reduces the sensitivity of the π-FBG acoustic sensor. Coupled mode theory (CMT) and transfer matrix method (TMM) have been employed to simulate the spectral characteristics of π-FBG.

Research paper thumbnail of Theoretical Analysis of Slow-light in π-phase-shifted fiber Bragg grating for sensing applications

IEEE, 2019

In this paper, a theoretical analysis of slow-light in π-phase-shifted fiber Bragg grating (π-FBG... more In this paper, a theoretical analysis of slow-light in π-phase-shifted fiber Bragg grating (π-FBG) for sensing applications has been presented. The coupled-mode theory (CMT) and transfer matrix method (TMM) have been used to establish the numerical modeling of slow-light in π-FBG. The influence of slow-light grating parameters, such as grating length (L), index change (δn), and loss coefficient (α), on the spectral and on the sensing characteristics of π-FBG are studied in detail. The simulation results show that for the maximum slow-light sensitivity the optimum grating parameters are obtained as L = 5 mm, δn = 1×10 −3 and α = 0.10 m −1. The peak transmissivity of 0.55 and a remarkable group-index of 1477 is obtained from the optimized grating. The optimized π-FBG is used for slowlight sensing applications. The highest values of slow-light strain and temperature sensitivity of 8.431 µ −1 and 91.6435 • C −1 , respectively are achieved. The slow-light sensitivity of proposed π-FBG is the highest as compared to apodized FBGs reported in the literature. Therefore, the proposed slow-light π-FBG shows great importance in sensing applications.

Research paper thumbnail of Theoretical Analysis of pi-Phase-Shifted Fiber Bragg Grating for Longitudinal Ultrasonic Acoustic Wave

2019 Workshop on Recent Advances in Photonics (WRAP), 2019

This paper presents a detailed theoretical analysis of pi-phase-shifted fiber Bragg grating (π-FB... more This paper presents a detailed theoretical analysis of pi-phase-shifted fiber Bragg grating (π-FBG) for longitudinal ultrasonic (US) acoustic stain wave. The influence of grating controlling parameters (grating length, index change, and apodization), and US acoustic wavelengths on the wavelength-shift sensitivity of the π-FBG has been investigated. The effect of the slow-light in the π-FBG acoustic sensor has also been discussed. Simulation results show that apodization reduces the sensitivity of the π-FBG acoustic sensor. Coupled mode theory (CMT) and transfer matrix method (TMM) have been employed to simulate the spectral characteristics of π-FBG.

Research paper thumbnail of A Cooperative Co-evolution based Scalable Framework for Solving Large-Scale Global optimization Problems

2019 IEEE International Conference on Systems, Man and Cybernetics (SMC), 2019

The Cooperative Co-evolution framework is an effective approach for decomposing large scale globa... more The Cooperative Co-evolution framework is an effective approach for decomposing large scale global optimization problems into multiple sub-components. Every subcomponent uses different optimization algorithms which evolve cooperatively and are independent of each other. These subcomponents contribute in a different way to the overall improvement of the optimal solution. Hence, the computation cost can be decreased by separating out the stagnant subcomponents of the population. Therefore, it is appropriate to allocate resources in an intelligent manner to increase the computational efficiency. In this paper, we illustrate a decomposition strategy to solve large scale global optimization problems which is scalable to millions of variables. The proposed strategy improves computational efficiency and enables embracing parallelization. The framework presented in this paper constitutes Cooperative Co-evolution based Genetic Algorithm with Scalar Distance Grouping technique (CCGA-SDG) derived from Cooperative Co-evolution based Genetic Algorithm (CCGA). In our proposed scheme, a novel scalar distance grouping technique is employed that collates the dependent variables together. The stagnant sub-components of the population are detected using this grouping method and resource reallocation is performed accordingly to increase the computational efficiency. Using our proposed methodology, a benchmark function f6f_{6}f6 of CEC’08 benchmark composed of 10 million variables is evaluated in 1759.79 seconds using 04 processors connected with Message Passing Interface (MPI) exhibiting better accuracy as compared to other methods. Moreover, for f3{f}3f3 and f6f_{6}f6 functions we achieve a better accuracy and for rest of the benchmark functions we achieve acceptable solutions.

Research paper thumbnail of FPGA Implementation of Simplified Spiking Neural Network

2020 27th IEEE International Conference on Electronics, Circuits and Systems (ICECS), 2020

Spiking Neural Networks (SNN) are thirdgeneration Artificial Neural Networks (ANN) which are clos... more Spiking Neural Networks (SNN) are thirdgeneration Artificial Neural Networks (ANN) which are close to the biological neural system. In recent years SNN has become popular in the area of robotics and embedded applications, therefore, it has become imperative to explore its real-time and energy-efficient implementations. SNNs are more powerful than their predecessors because they encode temporal information and use biologically plausible plasticity rules. In this paper, a simpler and computationally efficient SNN model using FPGA architecture is described. The proposed model is validated on a Xilinx Virtex 6 FPGA and analyzes a fully connected network which consists of 800 neurons and 12,544 synapses in real-time.

Research paper thumbnail of Fast Ionization-Front-Induced Anomalous Switching Behavior in Trigger Bipolar Transistors of Marx-Bank Circuits Under Base-Drive Conditions

IEEE Transactions on Plasma Science, 2018

The operation of transistorized Marx-bank circuits (MBCs) is analyzed, and physics-based modeling... more The operation of transistorized Marx-bank circuits (MBCs) is analyzed, and physics-based modeling is used to understand the anomalous switching behavior of the first stage single trigger avalanche transistors of MBCs at highcurrent-injection conditions. The role of a voltage trigger pulse having variable rise time when applied to the base terminal is investigated to model the underlying physics of the anomalous switching behavior. Experimental observations related to ultrafast anomalous switching mechanisms of trigger transistor, i.e., either primary breakdown or current mode secondary breakdown, for faster and slower base drives are presented. This demonstrates the importance of the dynamic avalanche process and reverse saturation current on the switching mechanism under high-speed base-trigger ramps for different avalanche BJTs from various manufacturers and different lots. The agreement between 2-D TCAD device simulation results and the experimental observations shows the validity of the proposed theory when the base width and mobile carrier recombination rate are used as parameters in the device simulation setup.

Research paper thumbnail of Design and Implementation of Low-Power High-throughput PRNGs for Security Applications

2019 32nd International Conference on VLSI Design and 2019 18th International Conference on Embedded Systems (VLSID), 2019

Pseudo-Random Number Generators (PRNGs) are an integral part of cryptographic applications, such ... more Pseudo-Random Number Generators (PRNGs) are an integral part of cryptographic applications, such as key generations, digital signatures, Internet-of-Things (IoT) security, etc. These applications require low-power and high-throughput PRNGs along with statistically secure random numbers generation capability. In this paper, we propose two PRNG methods based on Blum-Blum-Shub (BBS), Xorshift and Permuted Congruential PRNGs. The first PRNG is preferred for general purpose applications while the second is preferred for low-power IoT applications. The proposed PRNG methods are implemented on Xilinx FPGA ZedBoard Zynq^TM-7000 and generate 4.83e7 and 4.29e7 random numbers per-second, respectively. The total dynamic power consumption of the proposed PRNGs is 17mW at 48.31Mhz and 16mW at 42.90Mhz with a maximum throughput of 184.288MBps and 163.651MBps, respectively. The proposed PRNGs are tested on Diehard battery and US National Institute of Standard and Technology (NIST) SP 800 - 22 suites for analyzing the randomness quality.

Research paper thumbnail of Analytical Partitioning: Improvement over FM

Communications in Computer and Information Science, 2017

Research paper thumbnail of Application specific processor design implementation to monitor seismic activity

2016 International Conference on Accessibility to Digital World (ICADW), 2016

In this paper, we build an application specific processor based on Artificial Neural Networks (AN... more In this paper, we build an application specific processor based on Artificial Neural Networks (ANN) to monitor seismic activity. The training of the ANN is carried out using a software framework to evaluate the initial weights of proposed architecture. Once the layers and number of neurons of ANN are estimated using the neural heuristic, the proposed architecture is implemented on Xilinx Virtex-6 FPGA to showcase the applicability in monitoring seismic activity. During the implementation, a hardware framework is built on FPGA and the accuracy of hardware framework is examined by comparing the estimated outcome with the software framework.

Research paper thumbnail of Convergence Analysis of River Formation Dynamics Algorithm

2019 IEEE International Conference on Systems, Man and Cybernetics (SMC), 2019

As many real-life optimization problems are difficult to solve by exact optimization methods, a n... more As many real-life optimization problems are difficult to solve by exact optimization methods, a number of metaheuristics are developed over the years to search for viable solutions, e.g., river formation dynamics (RFD) algorithm. RFD algorithm is based on the analogy that water drops traverse from source to destination by following a random probabilistic search strategy. This search strategy is employed to solve various optimization problems in practice. However, the search strategy of RFD algorithm lacks theoretical analysis and the convergence property of RFD algorithm needs mathematical reasoning for comprehensive understanding of the working mechanism. In this paper, the random search strategy of RFD algorithm is analyzed mathematically and the convergence property of the algorithm is examined by using Markov chain theory. Several conditions for convergence are showcased and it is proved that RFD algorithm can indeed satisfy these conditions to achieve global optimality efficien...

Research paper thumbnail of 3D‐IC partitioning method based on genetic algorithm

IET Circuits, Devices & Systems, 2020

Research paper thumbnail of A Novel Low Power High Speed BEC for 2GHz Sampling Rate Flash ADC in 45nm Technology

2017 IEEE International Symposium on Nanoelectronic and Information Systems (iNIS), 2017

This paper depicts the idea of a novel bubbleerror corrector for removing the bubble error of ord... more This paper depicts the idea of a novel bubbleerror corrector for removing the bubble error of order 1and consuming less power. The earlier bubble error corrector(BEC) needed large number of transistors thus requiring morepower. 3-input NAND gate with two inverted inputs is also usedas a BEC but it requires more power than the proposed one asit requires more number of transistors. With a supply of 1Vin 45nm technology, the BEC consumes 4.14 pico-Watt of dcpower and 9.62 micro-Watt of average power. The maximumdelay is calculated to be 20 pico-seconds. When used with Fattree encoder it consumes 0.3 nano-Watt of dc power and 27.34micro-Watt of average power and has a maximum delay of 74.76 pico-seconds.

Research paper thumbnail of An Application of Learning from Multiple Annotators

Research paper thumbnail of EMT Analysis of Heavy-Duty EVs in Charging Station

Research paper thumbnail of Efficient PRNG Design and Implementation for Various High Throughput Cryptographic and Low Power Security Applications

Pseudo-Random Number Generators (PRNGs) are an integral part of cryptographic applications, such ... more Pseudo-Random Number Generators (PRNGs) are an integral part of cryptographic applications, such as key generations, digital signatures, Internet-of-Things (IoT) security, etc. These applications require low-power and high-throughput PRNGs along with statistically secure random numbers capability. In this paper, we propose two PRNGs by combining/modifying Blum-Blum-Shub (BBS), Xorshift and Permuted Congruential PRNGs. The first one is for general purpose applications and the second one is for low-power IoT applications. We implement the proposed PRNGs on FPGA ZedBoard Zynq™–7000. Our implementation results show that the proposed PRNGs generate 4.83 × 107 and 4.29 × 107 random numbers per-second, respectively. The total dynamic power consumption of the proposed PRNGs is 17mW at 48.31Mhz and 16mW at 42.90Mhz with a maximum throughput of 184.288MBps and 163.651MBps, respectively. We test the proposed PRNGs on Diehard battery suite and US National Institute of Standard and Technology (N...

Research paper thumbnail of GUI-Based Secure Architecture Design for Distributed Community Micro-grid

Research paper thumbnail of RiverOpt: A Multiobjective Optimization Framework Based on Modified River Formation Dynamics Heuristic

In river formation dynamics (RFD) method, water drops pursue a probable path to flow from high al... more In river formation dynamics (RFD) method, water drops pursue a probable path to flow from high altitudes to flat surface. This geographical metaphor adopts a decreasing gradient principle supported by sedimentation and erosion mechanisms to reach for a feasible solution. In this paper, a new multi-objective optimization framework, RiverOpt is presented based on a modified RFD method. In this method, the probability of selecting the next path in RFD method is modified to exploit both transverse and longitudinal slopes. Further, the sedimentation parameter in RFD method is improved by introducing a sediment coefficient. Later, an external archive is integrated with RiverOpt framework to keep track of nondominated solutions in each generation. For benchmarking the performance of the proposed framework, a set of standard multiobjective test problems is employed. The results are compared with peer multiobjective optimization algorithms using two performance indicators (i.e., generational...

Research paper thumbnail of Approxhash: delay, power and area optimized approximate hash functions for cryptography applications

Proceedings of the 10th International Conference on Security of Information and Networks, 2017

Rapid evolution of E-world demands delay, power and area optimized digital circuits/systems while... more Rapid evolution of E-world demands delay, power and area optimized digital circuits/systems while still meeting the security requirements of the cryptography applications. Cryptographic hash functions (which are considered the workhorse of security layers) provide compressive and non-invertible outputs. This signifies that approximate implementation of cryptographic hash functions can provide improvements in delay, power and area without considerable change in security level. In this paper, we first examine likelihood of infusing approximation in cryptographic hash functions and then propose a methodology to evaluate the effects of approximation. Further, we demonstrate four approximate pipelined implementations of Secure Hash Algorithm 1 (SHA-1). Our simulation results show that the proposed approximate pipelined SHA-1s provide significant improvements in delay, power and area with negligible change in security level.

Research paper thumbnail of Comparison and Design of Dynamic Comparator in 180nm SCL Technology for Low Power and High Speed Flash ADC

2017 IEEE International Symposium on Nanoelectronic and Information Systems (iNIS), 2017

A modified dynamic comparator is proposed and compared in this paper. A dynamic comparator consis... more A modified dynamic comparator is proposed and compared in this paper. A dynamic comparator consists of a low gain amplifier connected to a latch circuit. The inputs are amplified during the evaluation period and the outputs are latched during the regeneration time. The proposed dynamic comparator is fast and consumes less power. At a clock frequency of 1.25GHz and 100mV ΔVin, the delay is 176.71ps and average power consumption is 119.81μW for a supply voltage of 1.8V. The calculated maximum PDP is 24.53 f. The proposed dynamic comparator is suitable for an efficient low power and high speed Flash ADC. The circuits are simulated in cadence virtuoso spectre with 180nm SCL technology.

Research paper thumbnail of Fast DC Analysis and Its Application to Combinatorial Optimization Problems

VLSI Design, 2006

Many combinatorial optimization problems such as the min cost flow problem are equivalent to the ... more Many combinatorial optimization problems such as the min cost flow problem are equivalent to the solution of ap- propriate DC circuits made up of positive resistors, voltage sources, current sources and ideal diodes. Simulating the DC circuit is an alternative approach to the approximate solution of such problems. However, conventional simula- tors such as SPICE are too slow for this

Research paper thumbnail of Theoretical Analysis of pi-Phase-Shifted Fiber Bragg Grating for Longitudinal Ultrasonic Acoustic Wave

IEEE, 2019

This paper presents a detailed theoretical analysis of pi-phase-shifted fiber Bragg grating (π-FB... more This paper presents a detailed theoretical analysis of pi-phase-shifted fiber Bragg grating (π-FBG) for longitudinal ultrasonic (US) acoustic stain wave. The influence of grating controlling parameters (grating length, index change, and apodization), and US acoustic wavelengths on the wavelengthshift sensitivity of the π-FBG has been investigated. The effect of the slow-light in the π-FBG acoustic sensor has also been discussed. Simulation results show that apodization reduces the sensitivity of the π-FBG acoustic sensor. Coupled mode theory (CMT) and transfer matrix method (TMM) have been employed to simulate the spectral characteristics of π-FBG.

Research paper thumbnail of Theoretical Analysis of Slow-light in π-phase-shifted fiber Bragg grating for sensing applications

IEEE, 2019

In this paper, a theoretical analysis of slow-light in π-phase-shifted fiber Bragg grating (π-FBG... more In this paper, a theoretical analysis of slow-light in π-phase-shifted fiber Bragg grating (π-FBG) for sensing applications has been presented. The coupled-mode theory (CMT) and transfer matrix method (TMM) have been used to establish the numerical modeling of slow-light in π-FBG. The influence of slow-light grating parameters, such as grating length (L), index change (δn), and loss coefficient (α), on the spectral and on the sensing characteristics of π-FBG are studied in detail. The simulation results show that for the maximum slow-light sensitivity the optimum grating parameters are obtained as L = 5 mm, δn = 1×10 −3 and α = 0.10 m −1. The peak transmissivity of 0.55 and a remarkable group-index of 1477 is obtained from the optimized grating. The optimized π-FBG is used for slowlight sensing applications. The highest values of slow-light strain and temperature sensitivity of 8.431 µ −1 and 91.6435 • C −1 , respectively are achieved. The slow-light sensitivity of proposed π-FBG is the highest as compared to apodized FBGs reported in the literature. Therefore, the proposed slow-light π-FBG shows great importance in sensing applications.

Research paper thumbnail of Theoretical Analysis of pi-Phase-Shifted Fiber Bragg Grating for Longitudinal Ultrasonic Acoustic Wave

2019 Workshop on Recent Advances in Photonics (WRAP), 2019

This paper presents a detailed theoretical analysis of pi-phase-shifted fiber Bragg grating (π-FB... more This paper presents a detailed theoretical analysis of pi-phase-shifted fiber Bragg grating (π-FBG) for longitudinal ultrasonic (US) acoustic stain wave. The influence of grating controlling parameters (grating length, index change, and apodization), and US acoustic wavelengths on the wavelength-shift sensitivity of the π-FBG has been investigated. The effect of the slow-light in the π-FBG acoustic sensor has also been discussed. Simulation results show that apodization reduces the sensitivity of the π-FBG acoustic sensor. Coupled mode theory (CMT) and transfer matrix method (TMM) have been employed to simulate the spectral characteristics of π-FBG.

Research paper thumbnail of A Cooperative Co-evolution based Scalable Framework for Solving Large-Scale Global optimization Problems

2019 IEEE International Conference on Systems, Man and Cybernetics (SMC), 2019

The Cooperative Co-evolution framework is an effective approach for decomposing large scale globa... more The Cooperative Co-evolution framework is an effective approach for decomposing large scale global optimization problems into multiple sub-components. Every subcomponent uses different optimization algorithms which evolve cooperatively and are independent of each other. These subcomponents contribute in a different way to the overall improvement of the optimal solution. Hence, the computation cost can be decreased by separating out the stagnant subcomponents of the population. Therefore, it is appropriate to allocate resources in an intelligent manner to increase the computational efficiency. In this paper, we illustrate a decomposition strategy to solve large scale global optimization problems which is scalable to millions of variables. The proposed strategy improves computational efficiency and enables embracing parallelization. The framework presented in this paper constitutes Cooperative Co-evolution based Genetic Algorithm with Scalar Distance Grouping technique (CCGA-SDG) derived from Cooperative Co-evolution based Genetic Algorithm (CCGA). In our proposed scheme, a novel scalar distance grouping technique is employed that collates the dependent variables together. The stagnant sub-components of the population are detected using this grouping method and resource reallocation is performed accordingly to increase the computational efficiency. Using our proposed methodology, a benchmark function f6f_{6}f6 of CEC’08 benchmark composed of 10 million variables is evaluated in 1759.79 seconds using 04 processors connected with Message Passing Interface (MPI) exhibiting better accuracy as compared to other methods. Moreover, for f3{f}3f3 and f6f_{6}f6 functions we achieve a better accuracy and for rest of the benchmark functions we achieve acceptable solutions.

Research paper thumbnail of FPGA Implementation of Simplified Spiking Neural Network

2020 27th IEEE International Conference on Electronics, Circuits and Systems (ICECS), 2020

Spiking Neural Networks (SNN) are thirdgeneration Artificial Neural Networks (ANN) which are clos... more Spiking Neural Networks (SNN) are thirdgeneration Artificial Neural Networks (ANN) which are close to the biological neural system. In recent years SNN has become popular in the area of robotics and embedded applications, therefore, it has become imperative to explore its real-time and energy-efficient implementations. SNNs are more powerful than their predecessors because they encode temporal information and use biologically plausible plasticity rules. In this paper, a simpler and computationally efficient SNN model using FPGA architecture is described. The proposed model is validated on a Xilinx Virtex 6 FPGA and analyzes a fully connected network which consists of 800 neurons and 12,544 synapses in real-time.

Research paper thumbnail of Fast Ionization-Front-Induced Anomalous Switching Behavior in Trigger Bipolar Transistors of Marx-Bank Circuits Under Base-Drive Conditions

IEEE Transactions on Plasma Science, 2018

The operation of transistorized Marx-bank circuits (MBCs) is analyzed, and physics-based modeling... more The operation of transistorized Marx-bank circuits (MBCs) is analyzed, and physics-based modeling is used to understand the anomalous switching behavior of the first stage single trigger avalanche transistors of MBCs at highcurrent-injection conditions. The role of a voltage trigger pulse having variable rise time when applied to the base terminal is investigated to model the underlying physics of the anomalous switching behavior. Experimental observations related to ultrafast anomalous switching mechanisms of trigger transistor, i.e., either primary breakdown or current mode secondary breakdown, for faster and slower base drives are presented. This demonstrates the importance of the dynamic avalanche process and reverse saturation current on the switching mechanism under high-speed base-trigger ramps for different avalanche BJTs from various manufacturers and different lots. The agreement between 2-D TCAD device simulation results and the experimental observations shows the validity of the proposed theory when the base width and mobile carrier recombination rate are used as parameters in the device simulation setup.

Research paper thumbnail of Design and Implementation of Low-Power High-throughput PRNGs for Security Applications

2019 32nd International Conference on VLSI Design and 2019 18th International Conference on Embedded Systems (VLSID), 2019

Pseudo-Random Number Generators (PRNGs) are an integral part of cryptographic applications, such ... more Pseudo-Random Number Generators (PRNGs) are an integral part of cryptographic applications, such as key generations, digital signatures, Internet-of-Things (IoT) security, etc. These applications require low-power and high-throughput PRNGs along with statistically secure random numbers generation capability. In this paper, we propose two PRNG methods based on Blum-Blum-Shub (BBS), Xorshift and Permuted Congruential PRNGs. The first PRNG is preferred for general purpose applications while the second is preferred for low-power IoT applications. The proposed PRNG methods are implemented on Xilinx FPGA ZedBoard Zynq^TM-7000 and generate 4.83e7 and 4.29e7 random numbers per-second, respectively. The total dynamic power consumption of the proposed PRNGs is 17mW at 48.31Mhz and 16mW at 42.90Mhz with a maximum throughput of 184.288MBps and 163.651MBps, respectively. The proposed PRNGs are tested on Diehard battery and US National Institute of Standard and Technology (NIST) SP 800 - 22 suites for analyzing the randomness quality.

Research paper thumbnail of Analytical Partitioning: Improvement over FM

Communications in Computer and Information Science, 2017

Research paper thumbnail of Application specific processor design implementation to monitor seismic activity

2016 International Conference on Accessibility to Digital World (ICADW), 2016

In this paper, we build an application specific processor based on Artificial Neural Networks (AN... more In this paper, we build an application specific processor based on Artificial Neural Networks (ANN) to monitor seismic activity. The training of the ANN is carried out using a software framework to evaluate the initial weights of proposed architecture. Once the layers and number of neurons of ANN are estimated using the neural heuristic, the proposed architecture is implemented on Xilinx Virtex-6 FPGA to showcase the applicability in monitoring seismic activity. During the implementation, a hardware framework is built on FPGA and the accuracy of hardware framework is examined by comparing the estimated outcome with the software framework.

Research paper thumbnail of Convergence Analysis of River Formation Dynamics Algorithm

2019 IEEE International Conference on Systems, Man and Cybernetics (SMC), 2019

As many real-life optimization problems are difficult to solve by exact optimization methods, a n... more As many real-life optimization problems are difficult to solve by exact optimization methods, a number of metaheuristics are developed over the years to search for viable solutions, e.g., river formation dynamics (RFD) algorithm. RFD algorithm is based on the analogy that water drops traverse from source to destination by following a random probabilistic search strategy. This search strategy is employed to solve various optimization problems in practice. However, the search strategy of RFD algorithm lacks theoretical analysis and the convergence property of RFD algorithm needs mathematical reasoning for comprehensive understanding of the working mechanism. In this paper, the random search strategy of RFD algorithm is analyzed mathematically and the convergence property of the algorithm is examined by using Markov chain theory. Several conditions for convergence are showcased and it is proved that RFD algorithm can indeed satisfy these conditions to achieve global optimality efficien...

Research paper thumbnail of 3D‐IC partitioning method based on genetic algorithm

IET Circuits, Devices & Systems, 2020

Research paper thumbnail of A Novel Low Power High Speed BEC for 2GHz Sampling Rate Flash ADC in 45nm Technology

2017 IEEE International Symposium on Nanoelectronic and Information Systems (iNIS), 2017

This paper depicts the idea of a novel bubbleerror corrector for removing the bubble error of ord... more This paper depicts the idea of a novel bubbleerror corrector for removing the bubble error of order 1and consuming less power. The earlier bubble error corrector(BEC) needed large number of transistors thus requiring morepower. 3-input NAND gate with two inverted inputs is also usedas a BEC but it requires more power than the proposed one asit requires more number of transistors. With a supply of 1Vin 45nm technology, the BEC consumes 4.14 pico-Watt of dcpower and 9.62 micro-Watt of average power. The maximumdelay is calculated to be 20 pico-seconds. When used with Fattree encoder it consumes 0.3 nano-Watt of dc power and 27.34micro-Watt of average power and has a maximum delay of 74.76 pico-seconds.

Research paper thumbnail of An Application of Learning from Multiple Annotators

Research paper thumbnail of EMT Analysis of Heavy-Duty EVs in Charging Station

Research paper thumbnail of Efficient PRNG Design and Implementation for Various High Throughput Cryptographic and Low Power Security Applications

Pseudo-Random Number Generators (PRNGs) are an integral part of cryptographic applications, such ... more Pseudo-Random Number Generators (PRNGs) are an integral part of cryptographic applications, such as key generations, digital signatures, Internet-of-Things (IoT) security, etc. These applications require low-power and high-throughput PRNGs along with statistically secure random numbers capability. In this paper, we propose two PRNGs by combining/modifying Blum-Blum-Shub (BBS), Xorshift and Permuted Congruential PRNGs. The first one is for general purpose applications and the second one is for low-power IoT applications. We implement the proposed PRNGs on FPGA ZedBoard Zynq™–7000. Our implementation results show that the proposed PRNGs generate 4.83 × 107 and 4.29 × 107 random numbers per-second, respectively. The total dynamic power consumption of the proposed PRNGs is 17mW at 48.31Mhz and 16mW at 42.90Mhz with a maximum throughput of 184.288MBps and 163.651MBps, respectively. We test the proposed PRNGs on Diehard battery suite and US National Institute of Standard and Technology (N...

Research paper thumbnail of GUI-Based Secure Architecture Design for Distributed Community Micro-grid

Research paper thumbnail of RiverOpt: A Multiobjective Optimization Framework Based on Modified River Formation Dynamics Heuristic

In river formation dynamics (RFD) method, water drops pursue a probable path to flow from high al... more In river formation dynamics (RFD) method, water drops pursue a probable path to flow from high altitudes to flat surface. This geographical metaphor adopts a decreasing gradient principle supported by sedimentation and erosion mechanisms to reach for a feasible solution. In this paper, a new multi-objective optimization framework, RiverOpt is presented based on a modified RFD method. In this method, the probability of selecting the next path in RFD method is modified to exploit both transverse and longitudinal slopes. Further, the sedimentation parameter in RFD method is improved by introducing a sediment coefficient. Later, an external archive is integrated with RiverOpt framework to keep track of nondominated solutions in each generation. For benchmarking the performance of the proposed framework, a set of standard multiobjective test problems is employed. The results are compared with peer multiobjective optimization algorithms using two performance indicators (i.e., generational...

Research paper thumbnail of Approxhash: delay, power and area optimized approximate hash functions for cryptography applications

Proceedings of the 10th International Conference on Security of Information and Networks, 2017

Rapid evolution of E-world demands delay, power and area optimized digital circuits/systems while... more Rapid evolution of E-world demands delay, power and area optimized digital circuits/systems while still meeting the security requirements of the cryptography applications. Cryptographic hash functions (which are considered the workhorse of security layers) provide compressive and non-invertible outputs. This signifies that approximate implementation of cryptographic hash functions can provide improvements in delay, power and area without considerable change in security level. In this paper, we first examine likelihood of infusing approximation in cryptographic hash functions and then propose a methodology to evaluate the effects of approximation. Further, we demonstrate four approximate pipelined implementations of Secure Hash Algorithm 1 (SHA-1). Our simulation results show that the proposed approximate pipelined SHA-1s provide significant improvements in delay, power and area with negligible change in security level.

Research paper thumbnail of Comparison and Design of Dynamic Comparator in 180nm SCL Technology for Low Power and High Speed Flash ADC

2017 IEEE International Symposium on Nanoelectronic and Information Systems (iNIS), 2017

A modified dynamic comparator is proposed and compared in this paper. A dynamic comparator consis... more A modified dynamic comparator is proposed and compared in this paper. A dynamic comparator consists of a low gain amplifier connected to a latch circuit. The inputs are amplified during the evaluation period and the outputs are latched during the regeneration time. The proposed dynamic comparator is fast and consumes less power. At a clock frequency of 1.25GHz and 100mV ΔVin, the delay is 176.71ps and average power consumption is 119.81μW for a supply voltage of 1.8V. The calculated maximum PDP is 24.53 f. The proposed dynamic comparator is suitable for an efficient low power and high speed Flash ADC. The circuits are simulated in cadence virtuoso spectre with 180nm SCL technology.

Research paper thumbnail of Fast DC Analysis and Its Application to Combinatorial Optimization Problems

VLSI Design, 2006

Many combinatorial optimization problems such as the min cost flow problem are equivalent to the ... more Many combinatorial optimization problems such as the min cost flow problem are equivalent to the solution of ap- propriate DC circuits made up of positive resistors, voltage sources, current sources and ideal diodes. Simulating the DC circuit is an alternative approach to the approximate solution of such problems. However, conventional simula- tors such as SPICE are too slow for this