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Papers by Gwanghyeon Baek

Research paper thumbnail of Silicon-based field-induced BTBT effect transistor

Research paper thumbnail of Realistic single-electron transistor modeling and novel CMOS/SET hybrid circuits

2003 Third IEEE Conference on Nanotechnology, 2003. IEEE-NANO 2003., 2003

Abstracr-A practical single electron transistor (SET) model has been proposed with appropriate mo... more Abstracr-A practical single electron transistor (SET) model has been proposed with appropriate modifications to the previous analytical model. We have observed that non-ideal SET current behaviors such as turn-off and peak-to-valley ratio(PVCR) degradation is successfully ...

Research paper thumbnail of Complementary self-biased scheme for the robust design of CMOS/SET hybrid multi-valued logic

33rd International Symposium on Multiple-Valued Logic, 2003. Proceedings., 2003

We demonstrate a quantizer implemented by SETs with a 90-nm-long Si island on the basis of measur... more We demonstrate a quantizer implemented by SETs with a 90-nm-long Si island on the basis of measured device characteristics and SPICE simulation, which shows high resolution and small linearity error characteristics.

Research paper thumbnail of Modeling of current—voltage characteristics for double-gate a-IGZO TFTs and its application to AMLCDs

Journal of the Society for Information Display, 2012

The equations for the transfer characteristics, subthreshold swing, and saturation voltage of dou... more The equations for the transfer characteristics, subthreshold swing, and saturation voltage of double-gate (DG) a-IGZO TFTs, when the top-and bottom-gate electrodes are connected together (synchronized), were developed. From these equations, it is found that synchronized DG a-IGZO TFTs can be considered as conventional TFTs with a modified gate capacitance and threshold voltage. The developed models were compared with the top or bottom gate only bias conditions. The validity of the models is discussed by using the extracted TFT parameters for DG coplanar homojunction TFTs. Lastly, the new pixel circuit and layout based on a synchronized DG a-IGZO TFT is introduced.

Research paper thumbnail of P-25: Top Gate Amorphous In-Ga-Zn-O Thin Film Transistors Fabricated on Soda-Lime-Silica Glass Substrates

SID Symposium Digest of Technical Papers, 2014

ABSTRACT This work presents a comparative analysis of top gate a-IGZO TFTs fabricated on both sod... more ABSTRACT This work presents a comparative analysis of top gate a-IGZO TFTs fabricated on both soda-lime-silica glass and alkali-free borosilicate glass. Low-temperature ALD is selected for the deposition of gate dielectric to minimize a thermal stress. Comparing with TFTs on alkali-free borosilicate glass, TFTs with soda-lime-glass show similar threshold voltage and sub-threshold swing, but slightly degraded effective mobility, stability and uniformity. The results of atomic force measurements are provided to explain the uniformity degradation.

Research paper thumbnail of Effects of phosphorus implantation and subsequent growth on diamond

Thin Solid Films, 2004

For the improvement of structural and electrical characteristics of diamond, phosphorus implantat... more For the improvement of structural and electrical characteristics of diamond, phosphorus implantation was done during the growth of diamond films. The diamond films implanted with phosphorus were subsequently grown again by microwave plasma chemical vapor deposition (MPCVD). Fabricated diamond films were structurally and electrically characterized. From the results of field emission scanning electron microscope (FESEM) and atomic force microscope (AFM), the implanted diamond samples showed the smoother surfaces and new smaller grains on diamond grains as a result of subsequent growth after implantation. It is thought that the small grains pile up among large grains and compensate rough surfaces of diamond which are caused by large grain size of diamond. The sizes of small grains can be also related to the dose of implanted phosphorus ions. Improved field emission characteristics were obtained in the case of the higher ion dose. It is considered that these results are due to the increased emission area from small grains, and more defects formed in diamond. D

Research paper thumbnail of Low frequency noise in long channel amorphous In–Ga–Zn–O thin film transistors

Journal of Applied Physics, 2010

We investigated the low-frequency noise properties in the inverted-staggered amorphous In-Ga-Zn-O... more We investigated the low-frequency noise properties in the inverted-staggered amorphous In-Ga-Zn-O ͑a-IGZO͒ thin-film transistors ͑TFTs͒ with the silicon dioxide ͑SiO 2 ͒ gate dielectric. The dependence of noise level on gate area indicates that the 1 / f noise is the dominate source and the contribution from TFT parasitic resistances can be ignored in long channel devices. The gate voltage dependent noise data closely follow the mobility fluctuation ͑⌬͒ model, and the Hooge's parameter ͑␣ H ͒ was extracted to be ϳ1.52ϫ 10 −3 , which is much lower than the reported ␣ H for a-Si:H TFTs. Finally, in the comparative study, the noise level in an unannealed a-IGZO TFT was found to be higher than that in an annealed device. The present results suggest that the 1 / f noise in our a-IGZO TFT samples is sensitive to the active layer quality ͑i.e., concentration of conduction band-tail and/or deep gap states͒. In addition, the observed low noise in a-IGZO TFT can be associated with the s-orbital conduction in amorphous oxide semiconductor.

Research paper thumbnail of Scaling of Coplanar Homojunction Amorphous In–Ga–Zn–O Thin-Film Transistors

Japanese Journal of Applied Physics, 2013

Channel length (L) and width (W ) scaling of amorphous In-Ga-Zn-O (a-IGZO) thin-film transistors ... more Channel length (L) and width (W ) scaling of amorphous In-Ga-Zn-O (a-IGZO) thin-film transistors (TFTs) have been investigated by coplanar homojunction a-IGZO TFTs. The fabricated TFTs have a mobility around 12 cm 2 V À1 s À1 , sub-threshold slope (S) of $110 mV/decade, threshold voltage around 0.3 V and off-current below 10 À13 A. The TFTs with L > 5 m have the reduced transconducance (g m ) at lower V GS , however, the short L < 5 m TFTs have the g m reduction at higher V GS . Even though the TFTs with smaller channel length (L 5 m) show proper switching characteristics, threshold voltage lowering and sub-threshold slope degradation are clearly observed.

Research paper thumbnail of Analytical Modeling of Realistic Single-Electron Transistors Based on Metal-Oxide-Semiconductor Structure with a Unique Distribution Function in the Coulomb-Blockade Oscillation Region

Japanese Journal of Applied Physics, 2004

Novel metal-oxide-semiconductor (MOS)-based single-electron transistors (MOSETs) using band-to-ba... more Novel metal-oxide-semiconductor (MOS)-based single-electron transistors (MOSETs) using band-to-band tunneling mechanism have been fabricated by the conventional silicon-on-insulator (SOI) MOSFET technologies. The fabricated SETs have tunnel barriers and quantum-dot formed by an extremely small channel between two p þ -n þ tunnel junctions in the degenerately doped SOI MOSFET. Coulomb oscillation was observed in the subthreshold region at liquid nitrogen temperature and total capacitance of quantum-dot is 2.25 aF which is well matched to the device geometry. In order to validate the operation principle of our device, we have implemented an analytical device model in the simulation program with integrated circuit emphasis (SPICE). SPICE simulation of our model with a unique distribution function has reproduced the experimental results with good agreement for wide gate and drain bias range.

Research paper thumbnail of Electrical Instability of Double-Gate a-IGZO TFTs With Metal Source/Drain Recessed Electrodes

IEEE Transactions on Electron Devices, 2000

The electrical stability of double-gate (DG) and single-gate (SG) amorphous indium-gallium-zinc-o... more The electrical stability of double-gate (DG) and single-gate (SG) amorphous indium-gallium-zinc-oxide thin-film transistors (a-IGZO TFTs) with metal source/drain recessed electrodes on glass is investigated and compared. In the device structure of the a-IGZO TFTs, both top gate and bottom gate are defined by lithography, allowing independent or synchronized biasing. Bias temperature stress (BTS) are performed on SG a-IGZO TFTs and DG a-IGZO TFTs with synchronized gate bias condition. Under both positive and negative BTS, synchronized DG a-IGZO TFTs demonstrate much smaller V TH shift than SG a-IGZO TFTs.

Research paper thumbnail of Electrical Instability of the a-Si:H TFTs Fabricated by Maskless Laser-Write Lithography on a Spherical Surface

IEEE Transactions on Electron Devices, 2000

ABSTRACT We fabricated and characterized hydrogenated amorphous silicon (a-Si:H) thin-film transi... more ABSTRACT We fabricated and characterized hydrogenated amorphous silicon (a-Si:H) thin-film transistors (TFTs) with a channel length of 10 on both spherical and flat surfaces using maskless laser-write lithography (LWL). In addition to the electrical performance, the threshold voltage shift of the a-Si:H TFT under bias-temperature stress is investigated and discussed in comparison to a device fabricated on a flat surface. The obtained results show that the a-Si:H TFTs fabricated by LWL method on a curved surface are suitable for pixel switches and circuits, which are needed to realize image sensor arrays and/or displays on a nonplanar surface.

Research paper thumbnail of Electrical Properties and Stability of Dual-Gate Coplanar Homojunction DC Sputtered Amorphous Indium–Gallium–Zinc–Oxide Thin-Film Transistors and Its Application to AM-OLEDs

IEEE Transactions on Electron Devices, 2000

The electrical characteristics and stability of dualgate (DG) coplanar homojunction amorphous ind... more The electrical characteristics and stability of dualgate (DG) coplanar homojunction amorphous indium-galliumzinc-oxide thin-film transistors (a-IGZO TFTs) on glass substrates are described herein. In this device structure, both top gate (TG) and bottom gate are defined by lithography, allowing independent biasing when adjacent TFTs are present. The DG a-IGZO TFT demonstrates excellent electrical performance with subthreshold swing (SS) of 99 mV/dec, field-effect mobility of 15.1 cm 2 /V · s, and ON-OFF current ratio of 10 9 . By applying various bias voltages on the TG electrode, it is found that the TFT threshold voltage can be controlled without any change of the SS and off current. Under conditions of negative bias temperature stress (BTS), the transfer curves of the TFT exhibit negligible shifts after 10 000 s. Larger shifts are observed under conditions of a positive BTS. Finally, the application of this DG device to active-matrix organic light-emitting displays is suggested.

Research paper thumbnail of Silicon-Based Field-Induced Band-to-Band Tunneling Effect Transistor

IEEE Electron Device Letters, 2004

This letter reports a silicon-based field-induced band-to-band tunneling effect transistor (FIBTE... more This letter reports a silicon-based field-induced band-to-band tunneling effect transistor (FIBTET), which has a structure totally compatible with silicon-on-insulator (SOI) MOSFET. The field-induced band-to-band tunneling effect between degenerate channel and source/drain is used as the key principle of the device operation. FIBTETs demonstrate the controllable negative differential transconductance characteristics at room temperature both for n-FIBTETs and p-FIBTETs. The size dependence of the device characteristics shows that the peak tunneling current can be controlled by the layout design of channel length and width.

Research paper thumbnail of P-11: Electrical Properties and Stability of Dual-Gate Coplanar Homojunction Amorphous Indium-Gallium-Zinc-Oxide Thin-Film Transistor

SID Symposium Digest of Technical Papers, 2011

The electrical characteristics and stabilities of dual-gate (DG) coplanar homojunction amorphous ... more The electrical characteristics and stabilities of dual-gate (DG) coplanar homojunction amorphous indium-gallium-zinc-oxide thin-film transistors (a-IGZO TFTs) are described. When the gate voltage is applied on top and bottom electrodes, the DG a-IGZO TFT showed an excellent electrical performance with the subthreshold swing of 99 mV/dec, the mobility of 15.1 cm 2 /V·s and the on-off ratio of 10 9 . Under positive bias temperature stress, the device threshold voltage shifts about +4.5V after 10,000 seconds, while its shifts under negative bias temperature stress are very small. The effect of TFT illumination is also discussed.

Research paper thumbnail of Silicon-based field-induced BTBT effect transistor

Research paper thumbnail of Realistic single-electron transistor modeling and novel CMOS/SET hybrid circuits

2003 Third IEEE Conference on Nanotechnology, 2003. IEEE-NANO 2003., 2003

Abstracr-A practical single electron transistor (SET) model has been proposed with appropriate mo... more Abstracr-A practical single electron transistor (SET) model has been proposed with appropriate modifications to the previous analytical model. We have observed that non-ideal SET current behaviors such as turn-off and peak-to-valley ratio(PVCR) degradation is successfully ...

Research paper thumbnail of Complementary self-biased scheme for the robust design of CMOS/SET hybrid multi-valued logic

33rd International Symposium on Multiple-Valued Logic, 2003. Proceedings., 2003

We demonstrate a quantizer implemented by SETs with a 90-nm-long Si island on the basis of measur... more We demonstrate a quantizer implemented by SETs with a 90-nm-long Si island on the basis of measured device characteristics and SPICE simulation, which shows high resolution and small linearity error characteristics.

Research paper thumbnail of Modeling of current—voltage characteristics for double-gate a-IGZO TFTs and its application to AMLCDs

Journal of the Society for Information Display, 2012

The equations for the transfer characteristics, subthreshold swing, and saturation voltage of dou... more The equations for the transfer characteristics, subthreshold swing, and saturation voltage of double-gate (DG) a-IGZO TFTs, when the top-and bottom-gate electrodes are connected together (synchronized), were developed. From these equations, it is found that synchronized DG a-IGZO TFTs can be considered as conventional TFTs with a modified gate capacitance and threshold voltage. The developed models were compared with the top or bottom gate only bias conditions. The validity of the models is discussed by using the extracted TFT parameters for DG coplanar homojunction TFTs. Lastly, the new pixel circuit and layout based on a synchronized DG a-IGZO TFT is introduced.

Research paper thumbnail of P-25: Top Gate Amorphous In-Ga-Zn-O Thin Film Transistors Fabricated on Soda-Lime-Silica Glass Substrates

SID Symposium Digest of Technical Papers, 2014

ABSTRACT This work presents a comparative analysis of top gate a-IGZO TFTs fabricated on both sod... more ABSTRACT This work presents a comparative analysis of top gate a-IGZO TFTs fabricated on both soda-lime-silica glass and alkali-free borosilicate glass. Low-temperature ALD is selected for the deposition of gate dielectric to minimize a thermal stress. Comparing with TFTs on alkali-free borosilicate glass, TFTs with soda-lime-glass show similar threshold voltage and sub-threshold swing, but slightly degraded effective mobility, stability and uniformity. The results of atomic force measurements are provided to explain the uniformity degradation.

Research paper thumbnail of Effects of phosphorus implantation and subsequent growth on diamond

Thin Solid Films, 2004

For the improvement of structural and electrical characteristics of diamond, phosphorus implantat... more For the improvement of structural and electrical characteristics of diamond, phosphorus implantation was done during the growth of diamond films. The diamond films implanted with phosphorus were subsequently grown again by microwave plasma chemical vapor deposition (MPCVD). Fabricated diamond films were structurally and electrically characterized. From the results of field emission scanning electron microscope (FESEM) and atomic force microscope (AFM), the implanted diamond samples showed the smoother surfaces and new smaller grains on diamond grains as a result of subsequent growth after implantation. It is thought that the small grains pile up among large grains and compensate rough surfaces of diamond which are caused by large grain size of diamond. The sizes of small grains can be also related to the dose of implanted phosphorus ions. Improved field emission characteristics were obtained in the case of the higher ion dose. It is considered that these results are due to the increased emission area from small grains, and more defects formed in diamond. D

Research paper thumbnail of Low frequency noise in long channel amorphous In–Ga–Zn–O thin film transistors

Journal of Applied Physics, 2010

We investigated the low-frequency noise properties in the inverted-staggered amorphous In-Ga-Zn-O... more We investigated the low-frequency noise properties in the inverted-staggered amorphous In-Ga-Zn-O ͑a-IGZO͒ thin-film transistors ͑TFTs͒ with the silicon dioxide ͑SiO 2 ͒ gate dielectric. The dependence of noise level on gate area indicates that the 1 / f noise is the dominate source and the contribution from TFT parasitic resistances can be ignored in long channel devices. The gate voltage dependent noise data closely follow the mobility fluctuation ͑⌬͒ model, and the Hooge's parameter ͑␣ H ͒ was extracted to be ϳ1.52ϫ 10 −3 , which is much lower than the reported ␣ H for a-Si:H TFTs. Finally, in the comparative study, the noise level in an unannealed a-IGZO TFT was found to be higher than that in an annealed device. The present results suggest that the 1 / f noise in our a-IGZO TFT samples is sensitive to the active layer quality ͑i.e., concentration of conduction band-tail and/or deep gap states͒. In addition, the observed low noise in a-IGZO TFT can be associated with the s-orbital conduction in amorphous oxide semiconductor.

Research paper thumbnail of Scaling of Coplanar Homojunction Amorphous In–Ga–Zn–O Thin-Film Transistors

Japanese Journal of Applied Physics, 2013

Channel length (L) and width (W ) scaling of amorphous In-Ga-Zn-O (a-IGZO) thin-film transistors ... more Channel length (L) and width (W ) scaling of amorphous In-Ga-Zn-O (a-IGZO) thin-film transistors (TFTs) have been investigated by coplanar homojunction a-IGZO TFTs. The fabricated TFTs have a mobility around 12 cm 2 V À1 s À1 , sub-threshold slope (S) of $110 mV/decade, threshold voltage around 0.3 V and off-current below 10 À13 A. The TFTs with L > 5 m have the reduced transconducance (g m ) at lower V GS , however, the short L < 5 m TFTs have the g m reduction at higher V GS . Even though the TFTs with smaller channel length (L 5 m) show proper switching characteristics, threshold voltage lowering and sub-threshold slope degradation are clearly observed.

Research paper thumbnail of Analytical Modeling of Realistic Single-Electron Transistors Based on Metal-Oxide-Semiconductor Structure with a Unique Distribution Function in the Coulomb-Blockade Oscillation Region

Japanese Journal of Applied Physics, 2004

Novel metal-oxide-semiconductor (MOS)-based single-electron transistors (MOSETs) using band-to-ba... more Novel metal-oxide-semiconductor (MOS)-based single-electron transistors (MOSETs) using band-to-band tunneling mechanism have been fabricated by the conventional silicon-on-insulator (SOI) MOSFET technologies. The fabricated SETs have tunnel barriers and quantum-dot formed by an extremely small channel between two p þ -n þ tunnel junctions in the degenerately doped SOI MOSFET. Coulomb oscillation was observed in the subthreshold region at liquid nitrogen temperature and total capacitance of quantum-dot is 2.25 aF which is well matched to the device geometry. In order to validate the operation principle of our device, we have implemented an analytical device model in the simulation program with integrated circuit emphasis (SPICE). SPICE simulation of our model with a unique distribution function has reproduced the experimental results with good agreement for wide gate and drain bias range.

Research paper thumbnail of Electrical Instability of Double-Gate a-IGZO TFTs With Metal Source/Drain Recessed Electrodes

IEEE Transactions on Electron Devices, 2000

The electrical stability of double-gate (DG) and single-gate (SG) amorphous indium-gallium-zinc-o... more The electrical stability of double-gate (DG) and single-gate (SG) amorphous indium-gallium-zinc-oxide thin-film transistors (a-IGZO TFTs) with metal source/drain recessed electrodes on glass is investigated and compared. In the device structure of the a-IGZO TFTs, both top gate and bottom gate are defined by lithography, allowing independent or synchronized biasing. Bias temperature stress (BTS) are performed on SG a-IGZO TFTs and DG a-IGZO TFTs with synchronized gate bias condition. Under both positive and negative BTS, synchronized DG a-IGZO TFTs demonstrate much smaller V TH shift than SG a-IGZO TFTs.

Research paper thumbnail of Electrical Instability of the a-Si:H TFTs Fabricated by Maskless Laser-Write Lithography on a Spherical Surface

IEEE Transactions on Electron Devices, 2000

ABSTRACT We fabricated and characterized hydrogenated amorphous silicon (a-Si:H) thin-film transi... more ABSTRACT We fabricated and characterized hydrogenated amorphous silicon (a-Si:H) thin-film transistors (TFTs) with a channel length of 10 on both spherical and flat surfaces using maskless laser-write lithography (LWL). In addition to the electrical performance, the threshold voltage shift of the a-Si:H TFT under bias-temperature stress is investigated and discussed in comparison to a device fabricated on a flat surface. The obtained results show that the a-Si:H TFTs fabricated by LWL method on a curved surface are suitable for pixel switches and circuits, which are needed to realize image sensor arrays and/or displays on a nonplanar surface.

Research paper thumbnail of Electrical Properties and Stability of Dual-Gate Coplanar Homojunction DC Sputtered Amorphous Indium–Gallium–Zinc–Oxide Thin-Film Transistors and Its Application to AM-OLEDs

IEEE Transactions on Electron Devices, 2000

The electrical characteristics and stability of dualgate (DG) coplanar homojunction amorphous ind... more The electrical characteristics and stability of dualgate (DG) coplanar homojunction amorphous indium-galliumzinc-oxide thin-film transistors (a-IGZO TFTs) on glass substrates are described herein. In this device structure, both top gate (TG) and bottom gate are defined by lithography, allowing independent biasing when adjacent TFTs are present. The DG a-IGZO TFT demonstrates excellent electrical performance with subthreshold swing (SS) of 99 mV/dec, field-effect mobility of 15.1 cm 2 /V · s, and ON-OFF current ratio of 10 9 . By applying various bias voltages on the TG electrode, it is found that the TFT threshold voltage can be controlled without any change of the SS and off current. Under conditions of negative bias temperature stress (BTS), the transfer curves of the TFT exhibit negligible shifts after 10 000 s. Larger shifts are observed under conditions of a positive BTS. Finally, the application of this DG device to active-matrix organic light-emitting displays is suggested.

Research paper thumbnail of Silicon-Based Field-Induced Band-to-Band Tunneling Effect Transistor

IEEE Electron Device Letters, 2004

This letter reports a silicon-based field-induced band-to-band tunneling effect transistor (FIBTE... more This letter reports a silicon-based field-induced band-to-band tunneling effect transistor (FIBTET), which has a structure totally compatible with silicon-on-insulator (SOI) MOSFET. The field-induced band-to-band tunneling effect between degenerate channel and source/drain is used as the key principle of the device operation. FIBTETs demonstrate the controllable negative differential transconductance characteristics at room temperature both for n-FIBTETs and p-FIBTETs. The size dependence of the device characteristics shows that the peak tunneling current can be controlled by the layout design of channel length and width.

Research paper thumbnail of P-11: Electrical Properties and Stability of Dual-Gate Coplanar Homojunction Amorphous Indium-Gallium-Zinc-Oxide Thin-Film Transistor

SID Symposium Digest of Technical Papers, 2011

The electrical characteristics and stabilities of dual-gate (DG) coplanar homojunction amorphous ... more The electrical characteristics and stabilities of dual-gate (DG) coplanar homojunction amorphous indium-gallium-zinc-oxide thin-film transistors (a-IGZO TFTs) are described. When the gate voltage is applied on top and bottom electrodes, the DG a-IGZO TFT showed an excellent electrical performance with the subthreshold swing of 99 mV/dec, the mobility of 15.1 cm 2 /V·s and the on-off ratio of 10 9 . Under positive bias temperature stress, the device threshold voltage shifts about +4.5V after 10,000 seconds, while its shifts under negative bias temperature stress are very small. The effect of TFT illumination is also discussed.