J. Kulick - Academia.edu (original) (raw)
Papers by J. Kulick
Optics Letters, 1995
We report the use of a pulse-width modulation drive technique for high-resolution liquid-crystal ... more We report the use of a pulse-width modulation drive technique for high-resolution liquid-crystal gratings and show how the grating diffraction efficiency depends on the duty cycle of the drive signal. We identify a regime in which the diffraction efficiency is linearly proportional to the duty cycle, thereby providing a linear drive characteristic.
Proceedings of the SouthEast Conference
The protection of confidential information has become very important with the increase of data sh... more The protection of confidential information has become very important with the increase of data sharing and storage on public domains. Data confidentiality is accomplished through the use of ciphers that encrypt and decrypt the data to impede unauthorized access. Emerging heterogeneous platforms provide an ideal environment to use hardware acceleration to improve application performance. In this paper, we explore the performance benefits of an AES hardware accelerator versus the software implementation for multiple cipher modes on the Zynq 7000 All-Programmable System-on-a-Chip (SoC). The accelerator is implemented on the FPGA fabric of the SoC and utilizes DMA for interfacing to the CPU. File encryption and decryption of varying file sizes are used as the workload, with execution time and throughput as the metrics for comparing the performance of the hardware and software implementations. The performance evaluations show that the accelerated AES operations achieve a speedup of 7 times relative to its software implementation and throughput upwards of 350 MB/s for the counter cipher mode, and modest improvements for other cipher modes. CCS CONCEPTS • Security and privacy → Block and stream ciphers; • Security and privacy → Hardware security implementation; • Hardware → Hardware accelerators
SPIE Proceedings, 1997
Low latency, high bandwidth interconnecting networks that directly link arbitrary pairs of proces... more Low latency, high bandwidth interconnecting networks that directly link arbitrary pairs of processing elements without contention are very desirable for parallel computers. The simultaneous optical multiprocessor exchange bus (SOME-Bus) based on a fiber optic interconnect is such a ...
Software: Practice and Experience, 1999
This paper documents the design and implementation of the IN‐Tune software tool suite, which enab... more This paper documents the design and implementation of the IN‐Tune software tool suite, which enables a user to collect real‐time code and hardware profiling information on Intel‐based symmetric multiprocessors running the Linux operating system. IN‐Tune provides a virtually non‐invasive tool for performance analysis and tuning of programs. Unlike other analysis tools, IN‐Tune isolates data with respect to individual threads. It also utilizes performance monitoring hardware registers to permit instrumentation of individual threads as they run in‐situ, thus collecting data with appropriate considerations for a multiprocessor environment. Data can be sampled using two different mechanisms. First, the user can collect data by making calls to the system upon the occurrence of specific software events. Secondly, data can be collected at a fixed, fine grain (e.g. 1–10 microseconds) interval using either software or hardware interrupts. To allow observation of codes for which source code modification is impractical or impossible, a ‘shell’ task is created which permits monitoring without code modification. Although this work deals with Intel processors and Linux, the widespread availability of performance monitoring registers in modern processors makes this work widely applicable. Copyright © 1999 John Wiley & Sons, Ltd.
Optics Letters, 1994
We report the formation of thin anisotropic phase gratings in a nematic liquid-crystalline film b... more We report the formation of thin anisotropic phase gratings in a nematic liquid-crystalline film by use of lateral (fringing) electric fields induced by transparent interdigitated electrodes. These gratings yield high diffraction efficiency (>30%) with a strong dependence on the readout beam incidence angle. In addition, the formation of a defect wall is observed that has a significant effect on the diffraction properties of the phase grating.
IEEE Transactions on Circuits and Systems I: Fundamental Theory and Applications, 1995
Computers & Electrical Engineering, 1998
This paper describes an advance in multiprocess cache system design called the process cache in w... more This paper describes an advance in multiprocess cache system design called the process cache in which the secondary cache has segments dedicated to each process. This approach is in contrast to a monolithic secondary cache in which every process' data can be distributed throughout the secondary cache. The process cache system is equally applicable to instruction and data caches, however,
Applied Optics, 1995
The development and modeling of a liquid-crystal phase grating for real-time diffractive three-di... more The development and modeling of a liquid-crystal phase grating for real-time diffractive three-dimensional displays are discussed. The system being developed, which is called the ICVision system, utilizes a number of ideas that will result in a rugged, low-power three-dimensional display offering both vertical and horizontal parallax and eventually full color. Fringing fields created between interdigitated electrodes formed on top of VLSI die will induce a diffraction pattern in a thin layer of liquid crystal that will cover the die. A detailed electrostatic and diffraction analysis of liquid-crystal phase-grating regions that will make up the final display is given here. The electrostatic analysis is developed by use of the method of moments. The diffraction analysis is developed by use of rigorous coupled-wave diffraction theory. The numerical results obtrained from the mathematical model are compared with experimental diffraction results from preliminary LCD cells that have been assembled as prototype ICVision devices.
Applied Optics, 1995
We report the implementation of a liquid crystal-on-silicon, three-dimensional 13-D2 diffractive ... more We report the implementation of a liquid crystal-on-silicon, three-dimensional 13-D2 diffractive display based on the partial pixel architecture. The display generates multiple stereoscopic images that are perceived as a static 3-D scene with one-dimensional motion parallax in a manner that is functionally equivalent to a holographic stereogram. The images are created with diffraction gratings formed in a thin liquid crystal layer by fringing electric fields from transparent indium tin oxide interdigitated electrodes. The electrodes are controlled by an external drive signal that permits the 3-D scene to be turned on and off. The display has a contrast ratio of 5.8, which is limited principally by optical scatter caused by extraneous fringing fields. These scatter sources can be readily eliminated. The display reported herein is the first step toward a real-time partial pixel architecture display in which large numbers of dynamic gratings are independently controlled by underlying silicon drive circuitry.
Proceedings of the SouthEast Conference, 2017
The protection of confidential information has become very important with the increase of data sh... more The protection of confidential information has become very important with the increase of data sharing and storage on public domains. Data confidentiality is accomplished through the use of ciphers that encrypt and decrypt the data to impede unauthorized access. Emerging heterogeneous platforms provide an ideal environment to use hardware acceleration to improve application performance. In this paper, we explore the performance benefits of an AES hardware accelerator versus the software implementation for multiple cipher modes on the Zynq 7000 All-Programmable System-on-a-Chip (SoC). The accelerator is implemented on the FPGA fabric of the SoC and utilizes DMA for interfacing to the CPU. File encryption and decryption of varying file sizes are used as the workload, with execution time and throughput as the metrics for comparing the performance of the hardware and software implementations. The performance evaluations show that the accelerated AES operations achieve a speedup of 7 tim...
Journal of Microscopy, 1986
This is the third in a series of three papers concerned with developing automatic analysis and cl... more This is the third in a series of three papers concerned with developing automatic analysis and classification techniques for metallographic images (specifically binary eutectic alloys of aluminium). The goal of the developmental work was to capture and describe image structure, in the descriptive terminology of a metallographer, and to permit quantification of formerly descriptive parameters. The first paper dealt with the preprocessing stage of image analysis and entailed a study of two segmentation techniques. The second paper reported on work demonstrating the use of texture analysis to characterize structural aspects in images of metallic microstructures. In this paper the textural primatives, or phase particles, are subjected to shape analysis and a novel mechanism for within class characterization. The study of the distribution of these shapes may provide a new means of following the effects of mechanical processing.
A novel approach for three-dimensional (3-D) display systems implemented with a micromirror array... more A novel approach for three-dimensional (3-D) display systems implemented with a micromirror array was proposed, designed, realized and tested. The major advantages of this approach include: (1) micromirrors are reflective and hence achromatic (panchromatic), (2) a wide variety of displays can be used as image sources, and (3) time-multiplexing can be introduced on top of space-multiplexing to optimize the viewing-zone arrangements. Real-time auto-stereoscopy and motion parallax were the goals for these single-user 3-D display systems. First, auto-stereoscopy allows an observer see left and right images without any special eyewear or head-tracking devices. Second, different pairs of stereoscopic images can be seen according to the viewer’s head position under horizontal displacement, denoted by series of viewing zones, so horizontal motion parallax is provided. These 3-D display systems use two spatial light modulators (SLM). The first one acts as the image source, which is relayed o...
IEEE Vehicular Technology Magazine
Three-Dimensional Video and Display: Devices and Systems: A Critical Review
Optics Letters, 1995
We report the use of a pulse-width modulation drive technique for high-resolution liquid-crystal ... more We report the use of a pulse-width modulation drive technique for high-resolution liquid-crystal gratings and show how the grating diffraction efficiency depends on the duty cycle of the drive signal. We identify a regime in which the diffraction efficiency is linearly proportional to the duty cycle, thereby providing a linear drive characteristic.
Proceedings of the SouthEast Conference
The protection of confidential information has become very important with the increase of data sh... more The protection of confidential information has become very important with the increase of data sharing and storage on public domains. Data confidentiality is accomplished through the use of ciphers that encrypt and decrypt the data to impede unauthorized access. Emerging heterogeneous platforms provide an ideal environment to use hardware acceleration to improve application performance. In this paper, we explore the performance benefits of an AES hardware accelerator versus the software implementation for multiple cipher modes on the Zynq 7000 All-Programmable System-on-a-Chip (SoC). The accelerator is implemented on the FPGA fabric of the SoC and utilizes DMA for interfacing to the CPU. File encryption and decryption of varying file sizes are used as the workload, with execution time and throughput as the metrics for comparing the performance of the hardware and software implementations. The performance evaluations show that the accelerated AES operations achieve a speedup of 7 times relative to its software implementation and throughput upwards of 350 MB/s for the counter cipher mode, and modest improvements for other cipher modes. CCS CONCEPTS • Security and privacy → Block and stream ciphers; • Security and privacy → Hardware security implementation; • Hardware → Hardware accelerators
SPIE Proceedings, 1997
Low latency, high bandwidth interconnecting networks that directly link arbitrary pairs of proces... more Low latency, high bandwidth interconnecting networks that directly link arbitrary pairs of processing elements without contention are very desirable for parallel computers. The simultaneous optical multiprocessor exchange bus (SOME-Bus) based on a fiber optic interconnect is such a ...
Software: Practice and Experience, 1999
This paper documents the design and implementation of the IN‐Tune software tool suite, which enab... more This paper documents the design and implementation of the IN‐Tune software tool suite, which enables a user to collect real‐time code and hardware profiling information on Intel‐based symmetric multiprocessors running the Linux operating system. IN‐Tune provides a virtually non‐invasive tool for performance analysis and tuning of programs. Unlike other analysis tools, IN‐Tune isolates data with respect to individual threads. It also utilizes performance monitoring hardware registers to permit instrumentation of individual threads as they run in‐situ, thus collecting data with appropriate considerations for a multiprocessor environment. Data can be sampled using two different mechanisms. First, the user can collect data by making calls to the system upon the occurrence of specific software events. Secondly, data can be collected at a fixed, fine grain (e.g. 1–10 microseconds) interval using either software or hardware interrupts. To allow observation of codes for which source code modification is impractical or impossible, a ‘shell’ task is created which permits monitoring without code modification. Although this work deals with Intel processors and Linux, the widespread availability of performance monitoring registers in modern processors makes this work widely applicable. Copyright © 1999 John Wiley & Sons, Ltd.
Optics Letters, 1994
We report the formation of thin anisotropic phase gratings in a nematic liquid-crystalline film b... more We report the formation of thin anisotropic phase gratings in a nematic liquid-crystalline film by use of lateral (fringing) electric fields induced by transparent interdigitated electrodes. These gratings yield high diffraction efficiency (>30%) with a strong dependence on the readout beam incidence angle. In addition, the formation of a defect wall is observed that has a significant effect on the diffraction properties of the phase grating.
IEEE Transactions on Circuits and Systems I: Fundamental Theory and Applications, 1995
Computers & Electrical Engineering, 1998
This paper describes an advance in multiprocess cache system design called the process cache in w... more This paper describes an advance in multiprocess cache system design called the process cache in which the secondary cache has segments dedicated to each process. This approach is in contrast to a monolithic secondary cache in which every process' data can be distributed throughout the secondary cache. The process cache system is equally applicable to instruction and data caches, however,
Applied Optics, 1995
The development and modeling of a liquid-crystal phase grating for real-time diffractive three-di... more The development and modeling of a liquid-crystal phase grating for real-time diffractive three-dimensional displays are discussed. The system being developed, which is called the ICVision system, utilizes a number of ideas that will result in a rugged, low-power three-dimensional display offering both vertical and horizontal parallax and eventually full color. Fringing fields created between interdigitated electrodes formed on top of VLSI die will induce a diffraction pattern in a thin layer of liquid crystal that will cover the die. A detailed electrostatic and diffraction analysis of liquid-crystal phase-grating regions that will make up the final display is given here. The electrostatic analysis is developed by use of the method of moments. The diffraction analysis is developed by use of rigorous coupled-wave diffraction theory. The numerical results obtrained from the mathematical model are compared with experimental diffraction results from preliminary LCD cells that have been assembled as prototype ICVision devices.
Applied Optics, 1995
We report the implementation of a liquid crystal-on-silicon, three-dimensional 13-D2 diffractive ... more We report the implementation of a liquid crystal-on-silicon, three-dimensional 13-D2 diffractive display based on the partial pixel architecture. The display generates multiple stereoscopic images that are perceived as a static 3-D scene with one-dimensional motion parallax in a manner that is functionally equivalent to a holographic stereogram. The images are created with diffraction gratings formed in a thin liquid crystal layer by fringing electric fields from transparent indium tin oxide interdigitated electrodes. The electrodes are controlled by an external drive signal that permits the 3-D scene to be turned on and off. The display has a contrast ratio of 5.8, which is limited principally by optical scatter caused by extraneous fringing fields. These scatter sources can be readily eliminated. The display reported herein is the first step toward a real-time partial pixel architecture display in which large numbers of dynamic gratings are independently controlled by underlying silicon drive circuitry.
Proceedings of the SouthEast Conference, 2017
The protection of confidential information has become very important with the increase of data sh... more The protection of confidential information has become very important with the increase of data sharing and storage on public domains. Data confidentiality is accomplished through the use of ciphers that encrypt and decrypt the data to impede unauthorized access. Emerging heterogeneous platforms provide an ideal environment to use hardware acceleration to improve application performance. In this paper, we explore the performance benefits of an AES hardware accelerator versus the software implementation for multiple cipher modes on the Zynq 7000 All-Programmable System-on-a-Chip (SoC). The accelerator is implemented on the FPGA fabric of the SoC and utilizes DMA for interfacing to the CPU. File encryption and decryption of varying file sizes are used as the workload, with execution time and throughput as the metrics for comparing the performance of the hardware and software implementations. The performance evaluations show that the accelerated AES operations achieve a speedup of 7 tim...
Journal of Microscopy, 1986
This is the third in a series of three papers concerned with developing automatic analysis and cl... more This is the third in a series of three papers concerned with developing automatic analysis and classification techniques for metallographic images (specifically binary eutectic alloys of aluminium). The goal of the developmental work was to capture and describe image structure, in the descriptive terminology of a metallographer, and to permit quantification of formerly descriptive parameters. The first paper dealt with the preprocessing stage of image analysis and entailed a study of two segmentation techniques. The second paper reported on work demonstrating the use of texture analysis to characterize structural aspects in images of metallic microstructures. In this paper the textural primatives, or phase particles, are subjected to shape analysis and a novel mechanism for within class characterization. The study of the distribution of these shapes may provide a new means of following the effects of mechanical processing.
A novel approach for three-dimensional (3-D) display systems implemented with a micromirror array... more A novel approach for three-dimensional (3-D) display systems implemented with a micromirror array was proposed, designed, realized and tested. The major advantages of this approach include: (1) micromirrors are reflective and hence achromatic (panchromatic), (2) a wide variety of displays can be used as image sources, and (3) time-multiplexing can be introduced on top of space-multiplexing to optimize the viewing-zone arrangements. Real-time auto-stereoscopy and motion parallax were the goals for these single-user 3-D display systems. First, auto-stereoscopy allows an observer see left and right images without any special eyewear or head-tracking devices. Second, different pairs of stereoscopic images can be seen according to the viewer’s head position under horizontal displacement, denoted by series of viewing zones, so horizontal motion parallax is provided. These 3-D display systems use two spatial light modulators (SLM). The first one acts as the image source, which is relayed o...
IEEE Vehicular Technology Magazine
Three-Dimensional Video and Display: Devices and Systems: A Critical Review