Kamaraj Arunachalam - Academia.edu (original) (raw)

Uploads

Papers by Kamaraj Arunachalam

Research paper thumbnail of Effects of Heartfulness Meditation Practices on Control of Alz-heimer’s Disease: A Comprehensive Review

Iranian journal of public health, Dec 6, 2021

Background: Progressive stress levels, aging and less care on mental health among adults lead to ... more Background: Progressive stress levels, aging and less care on mental health among adults lead to a decline in neurophysiological functioning and diminish the performance of working memory. Regular practice of meditation through Heartfulness will enhance mental health and thereby considerably reduce the risks of Alzheimer's disease. Methods: This review article was carried out from the literature available on databases such as PubMed, MED-LINE, Web of Science and Research Gate until May 2020. A qualitative analysis of the impact of Heartfulness meditation on people with chronic insomnia, students of different age groups, Heartfulness meditation practitioners and caregivers were summarized. Results: From the survey results of selected 10 articles, it has been observed that the people who were practicing meditation through Heartfulness gain emotional wellness, joy, sound sleep pattern and reduction of stress, tension and anger. Moreover, the level of brain waves of the practitioners, especially alpha and delta activities in the brain were increased and there was a tremendous change in neuroplasticity among the practitioners. Conclusion: Regular practice of meditation through Heartfulness improves the cognitive ability of the practitioners, with improved neurophysiological functions and suppresses the risks of Alzheimer's diseases.

Research paper thumbnail of Fault Tolerance in Reversible Logic Circuits and Quantum Cost Optimization

Computing and informatics, 2020

Energy dissipation is a prominent factor for the very large scale integrated circuit (VLSI). The ... more Energy dissipation is a prominent factor for the very large scale integrated circuit (VLSI). The reversible logic-based circuit was capable to compute the logic without energy dissipation. Accordingly, reversible circuits are an emerging domain of research based on the low value of energy dissipation. At nano-level design, the critical factor in the logic computing paradigm is the fault. The proposed methodology of fault coverage is powerful for testability. In this article, we target three factors such as fault tolerance, fault coverage and fault detection in the reversible KMD Gates. Our analysis provides good evidence that the minimum test vector covers the 100 % fault coverage and 50 % fault tolerance in KMD Gate.

Research paper thumbnail of Towards Designing a Reversible Processor Architecture

ABSTRACT We report on ongoing work towards designing the schematics of a reversible processor bas... more ABSTRACT We report on ongoing work towards designing the schematics of a reversible processor based on the von Neumann architecture. In this paper we discuss considerations for our design including the reversible arithmetic logic unit and the specific arithmetic instructions. Our main goals are to keep circuit costs minimal and that the circuit is garbage-free, while still ensuring that the full instruction set architecture is r-Turing complete.

Research paper thumbnail of Effects of Heartfulness Meditation Practices on Control of Alz-heimer’s Disease: A Comprehensive Review

Iranian Journal of Public Health

Background: Progressive stress levels, aging and less care on mental health among adults lead to ... more Background: Progressive stress levels, aging and less care on mental health among adults lead to a decline in neurophysiological functioning and diminish the performance of working memory. Regular practice of meditation through Heartfulness will enhance mental health and thereby considerably reduce the risks of Alzheimer’s disease. Methods: This review article was carried out from the literature available on databases such as PubMed, MEDLINE, Web of Science and Research Gate until May 2020. A qualitative analysis of the impact of Heartfulness meditation on people with chronic insomnia, students of different age groups, Heartfulness meditation practitioners and caregivers were summarized. Results: From the survey results of selected 10 articles, it has been observed that the people who were practicing meditation through Heartfulness gain emotional wellness, joy, sound sleep pattern and reduction of stress, tension and anger. Moreover, the level of brain waves of the practitioners, es...

Research paper thumbnail of Fault Tolerance in Reversible Logic Circuits and Quantum Cost Optimization

Comput. Informatics, 2020

Research paper thumbnail of Design of Integrated Reversible Fault-Tolerant Arithmetic and Logic Unit

Microprocessors and Microsystems

Abstract In recent years, design of low power high-speed nano computing systems have drawn more a... more Abstract In recent years, design of low power high-speed nano computing systems have drawn more attention. Reversible Logic is a technique popularly used to design the computing systems to achive them. In a computer, the arithmetic logic unit (ALU) is the fundamental computing module. In this paper, a novel Reversible Arithmetic and Logic Unit is proposed, where a single module performs both arithmetic and logical operations. The possible arithmetic operation includes transfer, addition with carry, subtract, complement and increment. The possible logical operations are AND, OR, XOR, COPY and CONSTANT. The control signal is a key element which defines and alters the data path in order to produce either arithmetic or logical output. The fault-tolerant KMD gates are utilized to construct the ALU. Here, two approaches are discussed for the construction of ALU. In the first approach, ALU is constructed using KMD gates only, whereas in the second approach, combination of KMD, Toffoli and Fredkin gates are used. The functional realization is performed in Quantum Cellular Automata. Quantum circuit is also derived for the same. The obtained results are evident for the improved Quantum cost up to 69%, Constant input up to 40% and Number of gates up to 21% compared to the existing designs.

Research paper thumbnail of Design of Low Power Combinational Circuits using Reversible Logic and Realization in Quantum Cellular Automata

In modern VLSI systems, power dissipation is very high due to rapid switching of internal signals... more In modern VLSI systems, power dissipation is very high due to rapid switching of internal signals. Landauer showed that the circuits designed using irreversible elements dissipate heat due to the loss of information bits. Information is lost when the input vectors cannot be recovered from circuit’s output vectors. To overcome the above drawback reversible logic is introduced where the number of output vectors are equal to the number of input vectors. In this paper the basic reversible gates are realized using the tanner tool. The Half adder using CMOS logic is compared with the reversible logic and the corresponding power are measured using T-Spice.

Research paper thumbnail of Design of Out-of-Order Superscalar Processor with Speculative Thread Level Parallelism

The Complexity of handling the complex flow logic has become the major impact in parallel program... more The Complexity of handling the complex flow logic has become the major impact in parallel programming. The two main problems associated with the Scheduling of Superscalar Processor are interrupt precision and implementing multiple levels of Branch Prediction. The proposed work implements the Speculative Thread Level parallelism Technique on superscalar Processor, as an alternative source of parallelism which can boost the performance for applications, by overcoming the causes using cache coherence protocols and thus prevent the collision due to dependencies. To address this critical need, a Register transfer level (RTL) model of a superscalar micro architecture have been developed with similar complexity of a current generation processor. The RTL model is written in Verilog and is fully synthesizable. The RTL model is tightly integrated with a C functional simulator to assist and accelerate verification. The dissertation also proposes novel architecture and compiler techniques to ef...

Research paper thumbnail of Realization of Adaptive Filter using Vedic Multiplier

The principal technique proposed in this paper is the use of Vedic Multiplier in Adaptive Filter ... more The principal technique proposed in this paper is the use of Vedic Multiplier in Adaptive Filter design. The design of Adaptive Filter using LMS (Least Mean Square) algorithm is the prime step involved and the Vedic Multiplier is incorporated in updating filter coefficients and in the computation of filter output. Furthermore, Vedic Multiplier reduces the delay involved in Robertson multiplication process. Tracking speed and stability of the Adaptive Gradient Filtering algorithms are analysed by designing Adaptive Filter in Verilog language and realizing in Spartan 3E kit

Research paper thumbnail of Design and Implementation of a Reversible Logic Based 8-BIT Arithmetic and Logic Unit

International Journal of Computers and Applications, 2014

An important requirement of a digital system design is to reduce the power dissipation. Reversibl... more An important requirement of a digital system design is to reduce the power dissipation. Reversible logic is an emerging technique, which has the ability to reduce power dissipation. The reversible circuits do not lose information and can generate unique outputs from specified inputs and vice versa. There is no loss of bits during its computation, which results in reduction in power dissipation.

Research paper thumbnail of Towards Designing a Reversible Processor Architecture

Research paper thumbnail of Effects of Heartfulness Meditation Practices on Control of Alz-heimer’s Disease: A Comprehensive Review

Iranian journal of public health, Dec 6, 2021

Background: Progressive stress levels, aging and less care on mental health among adults lead to ... more Background: Progressive stress levels, aging and less care on mental health among adults lead to a decline in neurophysiological functioning and diminish the performance of working memory. Regular practice of meditation through Heartfulness will enhance mental health and thereby considerably reduce the risks of Alzheimer's disease. Methods: This review article was carried out from the literature available on databases such as PubMed, MED-LINE, Web of Science and Research Gate until May 2020. A qualitative analysis of the impact of Heartfulness meditation on people with chronic insomnia, students of different age groups, Heartfulness meditation practitioners and caregivers were summarized. Results: From the survey results of selected 10 articles, it has been observed that the people who were practicing meditation through Heartfulness gain emotional wellness, joy, sound sleep pattern and reduction of stress, tension and anger. Moreover, the level of brain waves of the practitioners, especially alpha and delta activities in the brain were increased and there was a tremendous change in neuroplasticity among the practitioners. Conclusion: Regular practice of meditation through Heartfulness improves the cognitive ability of the practitioners, with improved neurophysiological functions and suppresses the risks of Alzheimer's diseases.

Research paper thumbnail of Fault Tolerance in Reversible Logic Circuits and Quantum Cost Optimization

Computing and informatics, 2020

Energy dissipation is a prominent factor for the very large scale integrated circuit (VLSI). The ... more Energy dissipation is a prominent factor for the very large scale integrated circuit (VLSI). The reversible logic-based circuit was capable to compute the logic without energy dissipation. Accordingly, reversible circuits are an emerging domain of research based on the low value of energy dissipation. At nano-level design, the critical factor in the logic computing paradigm is the fault. The proposed methodology of fault coverage is powerful for testability. In this article, we target three factors such as fault tolerance, fault coverage and fault detection in the reversible KMD Gates. Our analysis provides good evidence that the minimum test vector covers the 100 % fault coverage and 50 % fault tolerance in KMD Gate.

Research paper thumbnail of Towards Designing a Reversible Processor Architecture

ABSTRACT We report on ongoing work towards designing the schematics of a reversible processor bas... more ABSTRACT We report on ongoing work towards designing the schematics of a reversible processor based on the von Neumann architecture. In this paper we discuss considerations for our design including the reversible arithmetic logic unit and the specific arithmetic instructions. Our main goals are to keep circuit costs minimal and that the circuit is garbage-free, while still ensuring that the full instruction set architecture is r-Turing complete.

Research paper thumbnail of Effects of Heartfulness Meditation Practices on Control of Alz-heimer’s Disease: A Comprehensive Review

Iranian Journal of Public Health

Background: Progressive stress levels, aging and less care on mental health among adults lead to ... more Background: Progressive stress levels, aging and less care on mental health among adults lead to a decline in neurophysiological functioning and diminish the performance of working memory. Regular practice of meditation through Heartfulness will enhance mental health and thereby considerably reduce the risks of Alzheimer’s disease. Methods: This review article was carried out from the literature available on databases such as PubMed, MEDLINE, Web of Science and Research Gate until May 2020. A qualitative analysis of the impact of Heartfulness meditation on people with chronic insomnia, students of different age groups, Heartfulness meditation practitioners and caregivers were summarized. Results: From the survey results of selected 10 articles, it has been observed that the people who were practicing meditation through Heartfulness gain emotional wellness, joy, sound sleep pattern and reduction of stress, tension and anger. Moreover, the level of brain waves of the practitioners, es...

Research paper thumbnail of Fault Tolerance in Reversible Logic Circuits and Quantum Cost Optimization

Comput. Informatics, 2020

Research paper thumbnail of Design of Integrated Reversible Fault-Tolerant Arithmetic and Logic Unit

Microprocessors and Microsystems

Abstract In recent years, design of low power high-speed nano computing systems have drawn more a... more Abstract In recent years, design of low power high-speed nano computing systems have drawn more attention. Reversible Logic is a technique popularly used to design the computing systems to achive them. In a computer, the arithmetic logic unit (ALU) is the fundamental computing module. In this paper, a novel Reversible Arithmetic and Logic Unit is proposed, where a single module performs both arithmetic and logical operations. The possible arithmetic operation includes transfer, addition with carry, subtract, complement and increment. The possible logical operations are AND, OR, XOR, COPY and CONSTANT. The control signal is a key element which defines and alters the data path in order to produce either arithmetic or logical output. The fault-tolerant KMD gates are utilized to construct the ALU. Here, two approaches are discussed for the construction of ALU. In the first approach, ALU is constructed using KMD gates only, whereas in the second approach, combination of KMD, Toffoli and Fredkin gates are used. The functional realization is performed in Quantum Cellular Automata. Quantum circuit is also derived for the same. The obtained results are evident for the improved Quantum cost up to 69%, Constant input up to 40% and Number of gates up to 21% compared to the existing designs.

Research paper thumbnail of Design of Low Power Combinational Circuits using Reversible Logic and Realization in Quantum Cellular Automata

In modern VLSI systems, power dissipation is very high due to rapid switching of internal signals... more In modern VLSI systems, power dissipation is very high due to rapid switching of internal signals. Landauer showed that the circuits designed using irreversible elements dissipate heat due to the loss of information bits. Information is lost when the input vectors cannot be recovered from circuit’s output vectors. To overcome the above drawback reversible logic is introduced where the number of output vectors are equal to the number of input vectors. In this paper the basic reversible gates are realized using the tanner tool. The Half adder using CMOS logic is compared with the reversible logic and the corresponding power are measured using T-Spice.

Research paper thumbnail of Design of Out-of-Order Superscalar Processor with Speculative Thread Level Parallelism

The Complexity of handling the complex flow logic has become the major impact in parallel program... more The Complexity of handling the complex flow logic has become the major impact in parallel programming. The two main problems associated with the Scheduling of Superscalar Processor are interrupt precision and implementing multiple levels of Branch Prediction. The proposed work implements the Speculative Thread Level parallelism Technique on superscalar Processor, as an alternative source of parallelism which can boost the performance for applications, by overcoming the causes using cache coherence protocols and thus prevent the collision due to dependencies. To address this critical need, a Register transfer level (RTL) model of a superscalar micro architecture have been developed with similar complexity of a current generation processor. The RTL model is written in Verilog and is fully synthesizable. The RTL model is tightly integrated with a C functional simulator to assist and accelerate verification. The dissertation also proposes novel architecture and compiler techniques to ef...

Research paper thumbnail of Realization of Adaptive Filter using Vedic Multiplier

The principal technique proposed in this paper is the use of Vedic Multiplier in Adaptive Filter ... more The principal technique proposed in this paper is the use of Vedic Multiplier in Adaptive Filter design. The design of Adaptive Filter using LMS (Least Mean Square) algorithm is the prime step involved and the Vedic Multiplier is incorporated in updating filter coefficients and in the computation of filter output. Furthermore, Vedic Multiplier reduces the delay involved in Robertson multiplication process. Tracking speed and stability of the Adaptive Gradient Filtering algorithms are analysed by designing Adaptive Filter in Verilog language and realizing in Spartan 3E kit

Research paper thumbnail of Design and Implementation of a Reversible Logic Based 8-BIT Arithmetic and Logic Unit

International Journal of Computers and Applications, 2014

An important requirement of a digital system design is to reduce the power dissipation. Reversibl... more An important requirement of a digital system design is to reduce the power dissipation. Reversible logic is an emerging technique, which has the ability to reduce power dissipation. The reversible circuits do not lose information and can generate unique outputs from specified inputs and vice versa. There is no loss of bits during its computation, which results in reduction in power dissipation.

Research paper thumbnail of Towards Designing a Reversible Processor Architecture