M. Biberger - Academia.edu (original) (raw)
Papers by M. Biberger
Journal of Vacuum Science & Technology A, 2000
Journal of Vacuum Science & Technology B: Microelectronics and Nanometer Structures, 1996
ABSTRACT The use of an AlSiCu/TiN bilayer for the metallization of 1.0‐μm‐diam and 1.4‐μm‐deep st... more ABSTRACT The use of an AlSiCu/TiN bilayer for the metallization of 1.0‐μm‐diam and 1.4‐μm‐deep straight wall contacts to 0.2‐μm‐deep n+ and p+ diffusions, results in a n+/p- and a p+/ṇ- junction leakage lower than 10 pA even after nine heat treatments (60 min each) at 450 °C. However, there is a very important degradation of the contact chain resistance statistics at small contact size. On the other hand, the use of a Ti/TiN bilayer barrier under the AlSiCu/TiN interconnect maintains a n+/p- and a p+/n- junction leakage lower than 20 pA and prevents the degradation of the contact chain resistance statistics after the nine heat treatments. It is finally demonstrated that a vent in nitrogen followed by a momentary air exposure of the Ti/TiN bilayer barrier results in larger contact resistance than a vent in nitrogen followed by a one hour long air exposure of the Ti/TiN bilayer barrier before the deposition of the AlSiCu/TiN interconnect. © 1996 American Vacuum Society
Scripta Metallurgica et Materialia, 1992
Scripta Metallurgica, 1989
Strength of Metals and Alloys (ICSMA 8), 1989
Proceedings of the IEEE 1998 International Interconnect Technology Conference (Cat. No.98EX102), 1998
Aluminum dual damascene interconnects using a low dielectric constant (low-κ) material as intra/i... more Aluminum dual damascene interconnects using a low dielectric constant (low-κ) material as intra/inter level dielectric have been successfully demonstrated. The low-κ material has led to significant reduction in both intra-level and inter-level capacitance in the dual damascene Al interconnect structures. In addition, low via resistance and good interconnect reliability characteristics have been observed in the low-cost Al/low-κ dual damascene interconnects.
International Electron Devices Meeting. Technical Digest, 1996
ABSTRACT A novel low cost and low temperature PVD planarized Al-Cu:0.5% process for simultaneous ... more ABSTRACT A novel low cost and low temperature PVD planarized Al-Cu:0.5% process for simultaneous high aspect ratio interconnect hole fill and metal layer planarization is reported. This is accomplished by using low pressure Al-Cu sputtering deposition with moderate heat applied to the wafers. The low pressure sputtering deposition reduces the amount of migrated Al atoms needed for hole fill and metal layer planarization. The low pressure also helps maintain a very clean environment for easy migration of Al atoms. These features result in excellent interconnect hole fill and metal layer planarization at low temperatures (<450°C). Completely filled sub-half micron Al plugs of high aspect ratio (up to 4:1) have been fabricated. Low via resistance (<1.2 Ω for 0.35 μm vias), high via chain yield (∼100%), and good via reliability have been demonstrated by this PVD planarized process at a wafer temperature of 380°C.
Journal of Vacuum Science & Technology B: Microelectronics and Nanometer Structures, 1996
ABSTRACT A Ti/TiN bilayer deposited under an Ti/AlSiCu/TiN interconnect is generally used at the ... more ABSTRACT A Ti/TiN bilayer deposited under an Ti/AlSiCu/TiN interconnect is generally used at the contact level to stabilize the contact resistance of small diameter contacts as well as to prevent junction spiking during postdeposition anneals. An air break followed by a furnace or a RTP anneal is generally required after the deposition of the Ti/TiN bilayer to improve the barrier stability. This three step interconnect scheme results in a low net effective throughput process if the same metallization system is used twice or, alternatively, in a high cost‐of‐ownership process if two metallization systems are used, a first for the Ti/TiN barrier and a second for the Ti/AlSiCu/TiN interconnect. In this article, it is shown that collimation permits the deposition of very thick TiN barriers at the bottom of high aspect ratio contacts which allows contact metallization integration in a single metallization system. In addition, it is found that the use of a Ti glue layer between the barrier and the AlSiCu contact interconnect to promote the filling of these high aspect ratio contacts with Al alloys results in a yield loss of n+ and p+ contact chains and therefore should be avoided. Finally, it is demonstrated that an integrated Ti/TiN/AlSiCu/TiN contact metallization with excellent electrical properties is possible with collimated TiN barriers. © 1996 American Vacuum Society
Journal of Vacuum Science & Technology A: Vacuum, Surfaces, and Films, 2000
Thin Solid Films, 1995
This paper describes collimated TiTiN bilayers which are used as diffusion barriers and adhesion ... more This paper describes collimated TiTiN bilayers which are used as diffusion barriers and adhesion layers for chemical vapour deposition tungsten-filled contacts and vias. The collimator used was a titanium collimator with hexagonal 58 inch diameter cells and an aspect ratio of 1.5:1. The manufacturability of this collimated process, where TiN is being sputtered from a non-nitrided target, is shown in terms of bottom and sidewall coverage, sheet resistance non-uniformity, and mechanical as well as in-film particle-particle data.
Materials Science and Engineering: A, 1992
The objective of this paper is to analyze the stress reduction behavior of b.c.c. Nb-lwt.%Zr at 1... more The objective of this paper is to analyze the stress reduction behavior of b.c.c. Nb-lwt.%Zr at 1300 K (0.47 of the melting point T,.). After small reductions in stress an increasing strain rate was observed, while after large stress reductions a decreasing strain rate was observed. The reduced strain rate normalized by the initial strain rate plotted semi-logarithmically as a function of the reduced stress normalized by the initial stress showed two branches (i.e. a low and high stress sensitivity region) indicating that two different dislocation mechanisms are operating. From the high stress sensitivity branch a true activation area was calculated, which was in the range of the true activation area for cutting of forest dislocations. The normalized true activation area was found to be less than the empirically predicted dislocation spacing in the subgrain interior. Similar behavior was observed for aluminum and AI-5at.%Zn. Extrapolating the low stress sensitivity branch to a/a o equaling one shows that 10% of the total strain rate is owing to the dislocation mechanism operating at the low stress sensitivity region. The mechanism operating at the low stress sensitivity region was assumed to be subgrain boundary migration.
Materials Science and Engineering: A, 1989
Journal of Applied Physics, 1998
X-ray diffraction (XRD) analysis was performed in order to determine the crystallographic phases ... more X-ray diffraction (XRD) analysis was performed in order to determine the crystallographic phases formed in AlSiCu/TiN/Ti contact metallization multilayers of very large scale integration/ultralarge scale integration devices deposited over and Si substrates as a function of the annealing ...
Journal of Applied Physics, 1996
The stability of TiN barriers deposited between Si or SiO2 substrates and AlSiCu metallic alloy c... more The stability of TiN barriers deposited between Si or SiO2 substrates and AlSiCu metallic alloy contacts was investigated as a function of the sintering temperature and of the application of an oxidation step to the barrier. It was found that Al penetrates the barrier during the sintering at 450 °C for 1 h, which also results in the diffusion of
Journal of Applied Physics, 1996
This article demonstrates that the exposure of a TiN barrier to an exsitu oxygen plasma results i... more This article demonstrates that the exposure of a TiN barrier to an exsitu oxygen plasma results in a more stable TiN/AlSiCu interface up to temperatures of 600 °C as shown by the time-of-flight elastic recoil detection measurements. A quaternary phase diagram of the Al–Ti–O–N system was calculated in the range of temperatures between 450 and 550 °C and suggests that
Electronics Letters, 1998
ABSTRACT A low dielectric constant (low-κ) material has been successfully integrated in an Al dua... more ABSTRACT A low dielectric constant (low-κ) material has been successfully integrated in an Al dual damascene interconnect architecture where the low-κ dielectric (κ<3) was used as the intra/inter level dielectric (ILD). In addition to a reduction in intra-level and inter-level capacitance, low via resistance, excellent electrical isolation, and good reliability characteristics were observed
Electronics Letters, 1997
ABSTRACT Planarised Al interconnect structures for sub-half micrometre integrated circuits have b... more ABSTRACT Planarised Al interconnect structures for sub-half micrometre integrated circuits have been fabricated by a novel low temperature and low pressure sputtering deposition technique. Simultaneous high aspect ratio interconnect hole fill and metal layer planarisation were achieved with moderate heat applied to processed wafers during the Al deposition. Low via resistance (~1 Ω for 0.35 μm vias) and high via chain yield (~100%) have been obtained on the wafers processed at a wafer temperature of 380°C
Acta Metallurgica et Materialia, 1995
The analysis of creep transients associated with stress change tests is reviewed, with an emphasi... more The analysis of creep transients associated with stress change tests is reviewed, with an emphasis on using the results of these experiments to characterize the kinetics of deformation under conditions of nominally constant structure. In order to develop a common framework for the description of results obtained by various authors, operational definitions of the characteristic strain rates observed after stress changes are adopted.
IEEE Electron Device Letters, 2000
ABSTRACT A novel Al-Cu via plug interconnect using low dielectric constant (low-/spl epsiv/) mate... more ABSTRACT A novel Al-Cu via plug interconnect using low dielectric constant (low-/spl epsiv/) material as inter-level dielectric (ILD) has been demonstrated. The interconnect structure was fabricated by spin-on deposition of the low-/spl epsiv/ ILD and physical vapor deposition (PVD) of the Al-Cu. Excellent local ILD planarization was achieved by a two-step spin-on coating process. The dielectric constant of the low-/spl epsiv/ no is about 2.7, which leads to significant interconnect wiring capacitance reduction. For the first time, completely filled Al-Cu:0.5% plugs with nearly vertical sidewalls were fabricated in organic low-/spl epsiv/ ILD. Excellent via fill was observed with via size down to 0.30 /spl mu/m. Low via resistance and excellent via reliability have been observed.
Journal of Vacuum Science & Technology A, 2000
Journal of Vacuum Science & Technology B: Microelectronics and Nanometer Structures, 1996
ABSTRACT The use of an AlSiCu/TiN bilayer for the metallization of 1.0‐μm‐diam and 1.4‐μm‐deep st... more ABSTRACT The use of an AlSiCu/TiN bilayer for the metallization of 1.0‐μm‐diam and 1.4‐μm‐deep straight wall contacts to 0.2‐μm‐deep n+ and p+ diffusions, results in a n+/p- and a p+/ṇ- junction leakage lower than 10 pA even after nine heat treatments (60 min each) at 450 °C. However, there is a very important degradation of the contact chain resistance statistics at small contact size. On the other hand, the use of a Ti/TiN bilayer barrier under the AlSiCu/TiN interconnect maintains a n+/p- and a p+/n- junction leakage lower than 20 pA and prevents the degradation of the contact chain resistance statistics after the nine heat treatments. It is finally demonstrated that a vent in nitrogen followed by a momentary air exposure of the Ti/TiN bilayer barrier results in larger contact resistance than a vent in nitrogen followed by a one hour long air exposure of the Ti/TiN bilayer barrier before the deposition of the AlSiCu/TiN interconnect. © 1996 American Vacuum Society
Scripta Metallurgica et Materialia, 1992
Scripta Metallurgica, 1989
Strength of Metals and Alloys (ICSMA 8), 1989
Proceedings of the IEEE 1998 International Interconnect Technology Conference (Cat. No.98EX102), 1998
Aluminum dual damascene interconnects using a low dielectric constant (low-κ) material as intra/i... more Aluminum dual damascene interconnects using a low dielectric constant (low-κ) material as intra/inter level dielectric have been successfully demonstrated. The low-κ material has led to significant reduction in both intra-level and inter-level capacitance in the dual damascene Al interconnect structures. In addition, low via resistance and good interconnect reliability characteristics have been observed in the low-cost Al/low-κ dual damascene interconnects.
International Electron Devices Meeting. Technical Digest, 1996
ABSTRACT A novel low cost and low temperature PVD planarized Al-Cu:0.5% process for simultaneous ... more ABSTRACT A novel low cost and low temperature PVD planarized Al-Cu:0.5% process for simultaneous high aspect ratio interconnect hole fill and metal layer planarization is reported. This is accomplished by using low pressure Al-Cu sputtering deposition with moderate heat applied to the wafers. The low pressure sputtering deposition reduces the amount of migrated Al atoms needed for hole fill and metal layer planarization. The low pressure also helps maintain a very clean environment for easy migration of Al atoms. These features result in excellent interconnect hole fill and metal layer planarization at low temperatures (<450°C). Completely filled sub-half micron Al plugs of high aspect ratio (up to 4:1) have been fabricated. Low via resistance (<1.2 Ω for 0.35 μm vias), high via chain yield (∼100%), and good via reliability have been demonstrated by this PVD planarized process at a wafer temperature of 380°C.
Journal of Vacuum Science & Technology B: Microelectronics and Nanometer Structures, 1996
ABSTRACT A Ti/TiN bilayer deposited under an Ti/AlSiCu/TiN interconnect is generally used at the ... more ABSTRACT A Ti/TiN bilayer deposited under an Ti/AlSiCu/TiN interconnect is generally used at the contact level to stabilize the contact resistance of small diameter contacts as well as to prevent junction spiking during postdeposition anneals. An air break followed by a furnace or a RTP anneal is generally required after the deposition of the Ti/TiN bilayer to improve the barrier stability. This three step interconnect scheme results in a low net effective throughput process if the same metallization system is used twice or, alternatively, in a high cost‐of‐ownership process if two metallization systems are used, a first for the Ti/TiN barrier and a second for the Ti/AlSiCu/TiN interconnect. In this article, it is shown that collimation permits the deposition of very thick TiN barriers at the bottom of high aspect ratio contacts which allows contact metallization integration in a single metallization system. In addition, it is found that the use of a Ti glue layer between the barrier and the AlSiCu contact interconnect to promote the filling of these high aspect ratio contacts with Al alloys results in a yield loss of n+ and p+ contact chains and therefore should be avoided. Finally, it is demonstrated that an integrated Ti/TiN/AlSiCu/TiN contact metallization with excellent electrical properties is possible with collimated TiN barriers. © 1996 American Vacuum Society
Journal of Vacuum Science & Technology A: Vacuum, Surfaces, and Films, 2000
Thin Solid Films, 1995
This paper describes collimated TiTiN bilayers which are used as diffusion barriers and adhesion ... more This paper describes collimated TiTiN bilayers which are used as diffusion barriers and adhesion layers for chemical vapour deposition tungsten-filled contacts and vias. The collimator used was a titanium collimator with hexagonal 58 inch diameter cells and an aspect ratio of 1.5:1. The manufacturability of this collimated process, where TiN is being sputtered from a non-nitrided target, is shown in terms of bottom and sidewall coverage, sheet resistance non-uniformity, and mechanical as well as in-film particle-particle data.
Materials Science and Engineering: A, 1992
The objective of this paper is to analyze the stress reduction behavior of b.c.c. Nb-lwt.%Zr at 1... more The objective of this paper is to analyze the stress reduction behavior of b.c.c. Nb-lwt.%Zr at 1300 K (0.47 of the melting point T,.). After small reductions in stress an increasing strain rate was observed, while after large stress reductions a decreasing strain rate was observed. The reduced strain rate normalized by the initial strain rate plotted semi-logarithmically as a function of the reduced stress normalized by the initial stress showed two branches (i.e. a low and high stress sensitivity region) indicating that two different dislocation mechanisms are operating. From the high stress sensitivity branch a true activation area was calculated, which was in the range of the true activation area for cutting of forest dislocations. The normalized true activation area was found to be less than the empirically predicted dislocation spacing in the subgrain interior. Similar behavior was observed for aluminum and AI-5at.%Zn. Extrapolating the low stress sensitivity branch to a/a o equaling one shows that 10% of the total strain rate is owing to the dislocation mechanism operating at the low stress sensitivity region. The mechanism operating at the low stress sensitivity region was assumed to be subgrain boundary migration.
Materials Science and Engineering: A, 1989
Journal of Applied Physics, 1998
X-ray diffraction (XRD) analysis was performed in order to determine the crystallographic phases ... more X-ray diffraction (XRD) analysis was performed in order to determine the crystallographic phases formed in AlSiCu/TiN/Ti contact metallization multilayers of very large scale integration/ultralarge scale integration devices deposited over and Si substrates as a function of the annealing ...
Journal of Applied Physics, 1996
The stability of TiN barriers deposited between Si or SiO2 substrates and AlSiCu metallic alloy c... more The stability of TiN barriers deposited between Si or SiO2 substrates and AlSiCu metallic alloy contacts was investigated as a function of the sintering temperature and of the application of an oxidation step to the barrier. It was found that Al penetrates the barrier during the sintering at 450 °C for 1 h, which also results in the diffusion of
Journal of Applied Physics, 1996
This article demonstrates that the exposure of a TiN barrier to an exsitu oxygen plasma results i... more This article demonstrates that the exposure of a TiN barrier to an exsitu oxygen plasma results in a more stable TiN/AlSiCu interface up to temperatures of 600 °C as shown by the time-of-flight elastic recoil detection measurements. A quaternary phase diagram of the Al–Ti–O–N system was calculated in the range of temperatures between 450 and 550 °C and suggests that
Electronics Letters, 1998
ABSTRACT A low dielectric constant (low-κ) material has been successfully integrated in an Al dua... more ABSTRACT A low dielectric constant (low-κ) material has been successfully integrated in an Al dual damascene interconnect architecture where the low-κ dielectric (κ<3) was used as the intra/inter level dielectric (ILD). In addition to a reduction in intra-level and inter-level capacitance, low via resistance, excellent electrical isolation, and good reliability characteristics were observed
Electronics Letters, 1997
ABSTRACT Planarised Al interconnect structures for sub-half micrometre integrated circuits have b... more ABSTRACT Planarised Al interconnect structures for sub-half micrometre integrated circuits have been fabricated by a novel low temperature and low pressure sputtering deposition technique. Simultaneous high aspect ratio interconnect hole fill and metal layer planarisation were achieved with moderate heat applied to processed wafers during the Al deposition. Low via resistance (~1 Ω for 0.35 μm vias) and high via chain yield (~100%) have been obtained on the wafers processed at a wafer temperature of 380°C
Acta Metallurgica et Materialia, 1995
The analysis of creep transients associated with stress change tests is reviewed, with an emphasi... more The analysis of creep transients associated with stress change tests is reviewed, with an emphasis on using the results of these experiments to characterize the kinetics of deformation under conditions of nominally constant structure. In order to develop a common framework for the description of results obtained by various authors, operational definitions of the characteristic strain rates observed after stress changes are adopted.
IEEE Electron Device Letters, 2000
ABSTRACT A novel Al-Cu via plug interconnect using low dielectric constant (low-/spl epsiv/) mate... more ABSTRACT A novel Al-Cu via plug interconnect using low dielectric constant (low-/spl epsiv/) material as inter-level dielectric (ILD) has been demonstrated. The interconnect structure was fabricated by spin-on deposition of the low-/spl epsiv/ ILD and physical vapor deposition (PVD) of the Al-Cu. Excellent local ILD planarization was achieved by a two-step spin-on coating process. The dielectric constant of the low-/spl epsiv/ no is about 2.7, which leads to significant interconnect wiring capacitance reduction. For the first time, completely filled Al-Cu:0.5% plugs with nearly vertical sidewalls were fabricated in organic low-/spl epsiv/ ILD. Excellent via fill was observed with via size down to 0.30 /spl mu/m. Low via resistance and excellent via reliability have been observed.