Manu Dixit - Academia.edu (original) (raw)

Manu Dixit

sushma patwardhan related author profile picture

Pratibha Dighe related author profile picture

IJARTET Journal related author profile picture

Hasmat Ali related author profile picture

International Journal of Scientific Research in Science and Technology IJSRST related author profile picture

Vandana Choksi related author profile picture

International Journal of Scientific Research in Science, Engineering and Technology IJSRSET related author profile picture

abhishek das related author profile picture

International Research Group  - IJET JOURNAL related author profile picture

Rahul Nimje related author profile picture

Uploads

Papers by Manu Dixit

Research paper thumbnail of A New Robust Reduced-Bit Multiplication Algorithm by using Vedic Mathematics

In this research article we've introduced a brand new fast, robust multiplication methodology... more In this research article we've introduced a brand new fast, robust multiplication methodology on the idea of Vedic arithmetic. Basic and also the core of all the Digital Signal Processors (DSPs) are a unit its multipliers and speed of the DSPs is especially determined by the speed of its multipliers. That multiplication is the most basic operation with intensive arithmetic computations. Nikhilam Sanskrit literature, one among the Multiplication sutra of Vedic arithmetic is economical in multiplying massive decimal numbers because it reduces multiplication of two massive decimal numbers to two smaller numbers. The planned repetitious algorithmic rule is taken from Nikhilam sutra and is more optimized by use of dropping least important zeros of the binary numbers and activity bit shifting to require the advantage of bit reduction in multiplication. The reduced bit multiplication algorithmic rule supported the Vedic multiplication formula planned during this paper that's Nikhil...

Research paper thumbnail of A New Robust Reduced-Bit Multiplication Algorithm by using Vedic Mathematics

In this research article we've introduced a brand new fast, robust multiplication methodology... more In this research article we've introduced a brand new fast, robust multiplication methodology on the idea of Vedic arithmetic. Basic and also the core of all the Digital Signal Processors (DSPs) are a unit its multipliers and speed of the DSPs is especially determined by the speed of its multipliers. That multiplication is the most basic operation with intensive arithmetic computations. Nikhilam Sanskrit literature, one among the Multiplication sutra of Vedic arithmetic is economical in multiplying massive decimal numbers because it reduces multiplication of two massive decimal numbers to two smaller numbers. The planned repetitious algorithmic rule is taken from Nikhilam sutra and is more optimized by use of dropping least important zeros of the binary numbers and activity bit shifting to require the advantage of bit reduction in multiplication. The reduced bit multiplication algorithmic rule supported the Vedic multiplication formula planned during this paper that's Nikhil...

Log In