N. Ranganathan - Academia.edu (original) (raw)

Papers by N. Ranganathan

Research paper thumbnail of Software and hardware enhancement of arithmetic coding

Lecture Notes in Computer Science, 1989

... If there is no change in the group, Page 9. 128 I Register 1" Buffer I D e c d e I r $ c... more ... If there is no change in the group, Page 9. 128 I Register 1" Buffer I D e c d e I r $ cl 4 , I Cur CI i New CI RAM 4, I curA I 2:1 IJ l Mux Multiply $ Fiaure 1. Hardware implementation of arithmetiC oding Page 10. 129 ¢ Reg 1 I ¢ Mux .q,, Buffer ¢ Reg 2 i¢l Group Switch Logic ...

Research paper thumbnail of Improving bandwidth of communication controllers

IEEE International Conference on Communications, - Spanning the Universe., 1988

Hardware algorithms that aim at increasing data transfer rates and reducing the cost of data tran... more Hardware algorithms that aim at increasing data transfer rates and reducing the cost of data transmissions are described. The high speed of these algorithms ensures that data transformation is done on the fly, as data is being transferred from/to communication controllers. A discussion of enhancing communications controllers is presented, and both hardware (the compressor module) and software (the decompression algorithm)

Research paper thumbnail of Stochastic channel-adaptive rate control for wireless video transmission

Pattern Recognition Letters, 2004

Research paper thumbnail of IDUTC: an intelligent decision-making system for urban traffic-control applications

IEEE Transactions on Vehicular Technology, 2001

Research paper thumbnail of A generalized sequential sign detector for binary hypothesis testing

IEEE Signal Processing Letters, 2000

Research paper thumbnail of Architecture and Algorithms Track Chair: J. Robert Jump, Rice University, USA Jim Bondi, Texas Instruments, USA Mauricio Bretemitz, Jr., Motorola Inc., USA

Research paper thumbnail of Guest editorial-Design methodologies for nanoelectronic digital and analogue circuits

Research paper thumbnail of Coflference Committee

Research paper thumbnail of An intelligent system for failure detection and control in an autonomous underwater vehicle

IEEE Transactions on Systems, Man, and Cybernetics - Part A: Systems and Humans, 2001

Research paper thumbnail of Conference Steering Committee 1998-l 999

Research paper thumbnail of Field-Programmable Gate Arrays Optimization Techniques for FPGA-Based Wave-Pipelined DSP Blocks... G. Lakshminarayanan and B. Venkataramani 783 Fault Tolerance of Switch Blocks and Switch Block Arrays in FPGA...... J. Huang, MB Tahoori, and F. Lombardi 794 VLSI Architecture A VLSI Architecture fo...

Research paper thumbnail of Rate control for a video coder using learning automata

SMC'98 Conference Proceedings. 1998 IEEE International Conference on Systems, Man, and Cybernetics (Cat. No.98CH36218), 1998

Research paper thumbnail of Context based lossless intraframe coding of video sequence using embedded zerotree wavelets

ISCAS'99. Proceedings of the 1999 IEEE International Symposium on Circuits and Systems VLSI (Cat. No.99CH36349), 1999

Lossless compression of video is an important problem in multimedia applications such as telemedi... more Lossless compression of video is an important problem in multimedia applications such as telemedicine and satellite imagery. Hence a need arises to optimize storage and transmission bandwidth. In this paper, we present the several experiments conducted to compress each frame of a video sequence by optimizing different parameters in an EZW framework. Compression efficiencies for the football video sequence consisting of 60 frames are tabulated

Research paper thumbnail of Effect of passivation on frit glass bonding method for wafer level hermetic sealing on MEMS devices

Proceedings of the 5th Electronics Packaging Technology Conference (EPTC 2003), 2003

Research paper thumbnail of New cost metrics for iterative task assignment algorithms in heterogeneous computing systems

Proceedings 9th Heterogeneous Computing Workshop (HCW 2000) (Cat. No.PR00556), 2000

Task assignment and scheduling algorithms for Hetero- geneous computing systems can be classified... more Task assignment and scheduling algorithms for Hetero- geneous computing systems can be classified as iterative and non-iterative techniques, and are designed to optimize a specific cost function defined on the system. The quality of the solutions generated is controlled by the nature of this cost metric. The common metrics that are used include min- imizing the overall execution time or

Research paper thumbnail of Error Resilient Coding For Jpeg Image Transmission Over

Research paper thumbnail of Performance Analysis of the Bidirectional Ring-Based Multiprocessor

Research paper thumbnail of An automatic code generation tool for partitioned software in distributed systems

19th International Conference on VLSI Design held jointly with 5th International Conference on Embedded Systems Design (VLSID'06), 2006

Page 1. University of South Florida Scholar Commons Theses and Dissertations 6-1-2005 An automati... more Page 1. University of South Florida Scholar Commons Theses and Dissertations 6-1-2005 An automatic code generation tool for partitioned software in distributed computing Neeta S. Singh University of South Florida This Thesis ...

Research paper thumbnail of A low power scheduler using game theory

Proceedings of the 1st IEEE/ACM/IFIP international conference on Hardware/software codesign & system synthesis - CODES+ISSS '03, 2003

Research paper thumbnail of Computation of lower and upper bounds for switching activity: a unified approach

Proceedings Eleventh International Conference on VLSI Design, 1998

Accurate switchzng activity estimatzon 1s crucial for power budgeting. It as impractzcal to obtaz... more Accurate switchzng activity estimatzon 1s crucial for power budgeting. It as impractzcal to obtazn an accurate estimate by szmulating the circuzt for all possible inputs. An alternate approach would be to compute tight bounds for the swztching actzvity. In this paper, we propose

Research paper thumbnail of Software and hardware enhancement of arithmetic coding

Lecture Notes in Computer Science, 1989

... If there is no change in the group, Page 9. 128 I Register 1" Buffer I D e c d e I r $ c... more ... If there is no change in the group, Page 9. 128 I Register 1" Buffer I D e c d e I r $ cl 4 , I Cur CI i New CI RAM 4, I curA I 2:1 IJ l Mux Multiply $ Fiaure 1. Hardware implementation of arithmetiC oding Page 10. 129 ¢ Reg 1 I ¢ Mux .q,, Buffer ¢ Reg 2 i¢l Group Switch Logic ...

Research paper thumbnail of Improving bandwidth of communication controllers

IEEE International Conference on Communications, - Spanning the Universe., 1988

Hardware algorithms that aim at increasing data transfer rates and reducing the cost of data tran... more Hardware algorithms that aim at increasing data transfer rates and reducing the cost of data transmissions are described. The high speed of these algorithms ensures that data transformation is done on the fly, as data is being transferred from/to communication controllers. A discussion of enhancing communications controllers is presented, and both hardware (the compressor module) and software (the decompression algorithm)

Research paper thumbnail of Stochastic channel-adaptive rate control for wireless video transmission

Pattern Recognition Letters, 2004

Research paper thumbnail of IDUTC: an intelligent decision-making system for urban traffic-control applications

IEEE Transactions on Vehicular Technology, 2001

Research paper thumbnail of A generalized sequential sign detector for binary hypothesis testing

IEEE Signal Processing Letters, 2000

Research paper thumbnail of Architecture and Algorithms Track Chair: J. Robert Jump, Rice University, USA Jim Bondi, Texas Instruments, USA Mauricio Bretemitz, Jr., Motorola Inc., USA

Research paper thumbnail of Guest editorial-Design methodologies for nanoelectronic digital and analogue circuits

Research paper thumbnail of Coflference Committee

Research paper thumbnail of An intelligent system for failure detection and control in an autonomous underwater vehicle

IEEE Transactions on Systems, Man, and Cybernetics - Part A: Systems and Humans, 2001

Research paper thumbnail of Conference Steering Committee 1998-l 999

Research paper thumbnail of Field-Programmable Gate Arrays Optimization Techniques for FPGA-Based Wave-Pipelined DSP Blocks... G. Lakshminarayanan and B. Venkataramani 783 Fault Tolerance of Switch Blocks and Switch Block Arrays in FPGA...... J. Huang, MB Tahoori, and F. Lombardi 794 VLSI Architecture A VLSI Architecture fo...

Research paper thumbnail of Rate control for a video coder using learning automata

SMC'98 Conference Proceedings. 1998 IEEE International Conference on Systems, Man, and Cybernetics (Cat. No.98CH36218), 1998

Research paper thumbnail of Context based lossless intraframe coding of video sequence using embedded zerotree wavelets

ISCAS'99. Proceedings of the 1999 IEEE International Symposium on Circuits and Systems VLSI (Cat. No.99CH36349), 1999

Lossless compression of video is an important problem in multimedia applications such as telemedi... more Lossless compression of video is an important problem in multimedia applications such as telemedicine and satellite imagery. Hence a need arises to optimize storage and transmission bandwidth. In this paper, we present the several experiments conducted to compress each frame of a video sequence by optimizing different parameters in an EZW framework. Compression efficiencies for the football video sequence consisting of 60 frames are tabulated

Research paper thumbnail of Effect of passivation on frit glass bonding method for wafer level hermetic sealing on MEMS devices

Proceedings of the 5th Electronics Packaging Technology Conference (EPTC 2003), 2003

Research paper thumbnail of New cost metrics for iterative task assignment algorithms in heterogeneous computing systems

Proceedings 9th Heterogeneous Computing Workshop (HCW 2000) (Cat. No.PR00556), 2000

Task assignment and scheduling algorithms for Hetero- geneous computing systems can be classified... more Task assignment and scheduling algorithms for Hetero- geneous computing systems can be classified as iterative and non-iterative techniques, and are designed to optimize a specific cost function defined on the system. The quality of the solutions generated is controlled by the nature of this cost metric. The common metrics that are used include min- imizing the overall execution time or

Research paper thumbnail of Error Resilient Coding For Jpeg Image Transmission Over

Research paper thumbnail of Performance Analysis of the Bidirectional Ring-Based Multiprocessor

Research paper thumbnail of An automatic code generation tool for partitioned software in distributed systems

19th International Conference on VLSI Design held jointly with 5th International Conference on Embedded Systems Design (VLSID'06), 2006

Page 1. University of South Florida Scholar Commons Theses and Dissertations 6-1-2005 An automati... more Page 1. University of South Florida Scholar Commons Theses and Dissertations 6-1-2005 An automatic code generation tool for partitioned software in distributed computing Neeta S. Singh University of South Florida This Thesis ...

Research paper thumbnail of A low power scheduler using game theory

Proceedings of the 1st IEEE/ACM/IFIP international conference on Hardware/software codesign & system synthesis - CODES+ISSS '03, 2003

Research paper thumbnail of Computation of lower and upper bounds for switching activity: a unified approach

Proceedings Eleventh International Conference on VLSI Design, 1998

Accurate switchzng activity estimatzon 1s crucial for power budgeting. It as impractzcal to obtaz... more Accurate switchzng activity estimatzon 1s crucial for power budgeting. It as impractzcal to obtazn an accurate estimate by szmulating the circuzt for all possible inputs. An alternate approach would be to compute tight bounds for the swztching actzvity. In this paper, we propose