Noel Rodriguez - Academia.edu (original) (raw)
Papers by Noel Rodriguez
IEEE Electron Device Letters, 2010
ABSTRACT
IEEE Transactions on Electron Devices, 2010
A new analytical model is presented for the inversion charge of surrounding-gate transistors (SGT... more A new analytical model is presented for the inversion charge of surrounding-gate transistors (SGTs). Quantum effects are taken into account by means of a modified capacitance model that includes the inversion charge centroid and a correction to the threshold voltage. A drain current model for the SGT that includes velocity saturation, short channel, and velocity overshoot effects is also developed. The model accurately reproduces both simulated and experimental results for different silicon core radii and gate voltages.
Solid-state Electronics, 2009
Introducing metal or fully silicided gates in the semiconductor industry leads to improvements in... more Introducing metal or fully silicided gates in the semiconductor industry leads to improvements in MOSFET performance when compared to their polysilicon counterparts. However we will show, through PoissonSchroedinger simulations, that when silicides are not treated as ...
IEEE Electron Device Letters, 2008
Abstract We studied the electrical behavior of MOSFETs in both accumulation and inversion regions... more Abstract We studied the electrical behavior of MOSFETs in both accumulation and inversion regions when the poly doping concentration was increased up to a level emulating the metallic limit for silicides. Our Poisson-Schrodinger simulations reveal a lower ...
IEEE Electron Device Letters, 2009
We show that the effect of phonon confinement in ultrathin double-gate silicon-on-insulator (DGSO... more We show that the effect of phonon confinement in ultrathin double-gate silicon-on-insulator (DGSOI) transistors on hole mobility is weaker than that predicted for electron mobility. To do so, confined phonon modes in SOI devices are computed, employing an elastic continuum model of acoustic phonons in a three-layer structure. A self-consistent k middot p-Poisson solver has been developed for the valence-band
The carrier mobility in ultra-thin SOI transistors was measured at the front channel, back channe... more The carrier mobility in ultra-thin SOI transistors was measured at the front channel, back channel and in double gate mode (DG). A model for generalizing the mobility extraction method, based on the F-function, is proposed. In DG-mode the apparent mobility is the sum of front and back channel mobilities only if the two channels are independent (partially depleted or relatively
Journal of Computational Electronics, 2009
The Monte Carlo simulation method is used to analyze the behavior of electron and hole mobility i... more The Monte Carlo simulation method is used to analyze the behavior of electron and hole mobility in different nanoelectronic devices including double gate transistors and FinFETs. The impact of technological parameters on carrier mobility is broadly discussed, and its behavior physically explained. Our main goal is to show how mobility in multiple gate devices compares to that in single gate devices and to study different approaches to improve the performance of these devices. Simulations of ultrashort channel devices taking into account quantum effects are also shown.
Semiconductor Science and Technology, 2009
We develop a fully self-consistent solver for the six-band k sdot p Schrödinger and Poisson equat... more We develop a fully self-consistent solver for the six-band k sdot p Schrödinger and Poisson equations to compute the valence-band structure of Si and Ge devices with arbitrary substrate orientation and uniaxial or biaxial strain. This allows us to compute the potential, charge distribution and subband energy dispersion relation for hole inversion layers in different devices and, using a simplex
Microelectronic Engineering, 2011
ABSTRACT The electrical characterization of unprocessed fully depleted silicon-on-insulator (SOI)... more ABSTRACT The electrical characterization of unprocessed fully depleted silicon-on-insulator (SOI) layers relies on the pseudo-MOSFET (Ψ-MOSFET) technique. We propose three-interface models which are more appropriate for addressing the case of SOI wafers with ultrathin body and BOX (UTB2). The novel models for threshold voltage and subthreshold swing account for the channel-to-surface and channel-to-substrate coupling which are important effects, respectively, in ultrathin films and thin BOX. The influence of the density of traps at each of the three interfaces (free surface, channel/BOX and BOX/substrate) is discussed. The models are validated with experimental results from a range of SOI film thicknesses.Graphical abstractThe electrical characterization of unprocessed fully depleted Silicon-on-Insulator (SOI) layers relies on the Pseudo-MOSFET (Ψ-MOSFET) technique. We propose 3-interface models which are more appropriate for addressing the case of SOI wafers with ultrathin body and BOX (UTB2). The novel models for threshold voltage and subthreshold swing account for the channel-to-surface and channel-to-substrate coupling which are important effects, respectively in ultrathin films and thin BOX. The influence of the density of traps at each of the three interfaces (free surface, channel/BOX and BOX/substrate) is discussed. The models are validated with experimental results from a range of SOI film thicknesses.Research highlights► We propose three-interface models appropriate for addressing the case of SOI wafers with ultrathin body and BOX. ► The novel models for threshold voltage and subthreshold swing account for the channel-to-surface and channel-to-substrate coupling. ► The influence of the density of traps at each of the three interfaces (free surface, channel/BOX and BOX/substrate) is discussed. ► The models are validated with experimental results.
When the silicon film thickness of a DG-MOSFET is decreased, the electron transport is dominated ... more When the silicon film thickness of a DG-MOSFET is decreased, the electron transport is dominated by two opposite mechanisms: the intersubband modulation effect and the increase in the phonon scattering rate. We show that although the mobility is remarkably degraded by the phonon scattering, the electrons drift can profit from the velocity overshoot induced by the decrease in the conduction effective mass. This fact allows a more aggressive reduction in the device channel length in contrast to what is demonstrated considering only the low-field mobility behavior.
Semiconductor Science and Technology, 2007
The effect of remote scattering mechanisms (such as remote Coulomb scattering and remote surface-... more The effect of remote scattering mechanisms (such as remote Coulomb scattering and remote surface-roughness scattering) on electron mobility in ultra-thin oxide MOSFETs was studied. We highlighted the important role these scattering mechanisms play in state-of-the-art devices, mainly at low temperatures. As a consequence, the effects of these remote mechanisms on the electron mobility should be taken into account in accurate ultra-thin gate-oxide device simulations. We have developed a mobility model which takes into account the contribution of remote scattering mechanisms in ultra-thin oxide MOSFETs (including both the polysilicon-oxide surface-roughness and Coulomb scattering due to the polysilicon depletion charge). The proposed expression allowed us to reproduce the Monte Carlo simulation results obtained for several of these ultra-thin gate oxide devices. We also used this model along with previously developed models to account for the different scattering mechanisms usually included in mobility analytical calculations to reproduce the experimental results for very thin oxide MOSFETs.
IEEE Transactions on Electron Devices, 2009
The pseudo-MOS transistor (Ψ-MOSFET) is a simple and successful technique for the monitoring of s... more The pseudo-MOS transistor (Ψ-MOSFET) is a simple and successful technique for the monitoring of silicon-oninsulator (SOI) wafer quality. To characterize modern ultrathin films, a reconsideration and review of Ψ-MOSFET physics and models is required. Selected numerical simulations are presented, which shed light on the intriguing features governing Ψ-MOSFET characteristics. Updated models accounting for the density of interface states and channel-to-surface coupling effects in ultrathin SOI wafers with passivated and nonpassivated surfaces are derived. These analytical models show excellent agreement with measurement and simulation data. Index Terms-Coupling effects, material qualification, Poisson equation, pseudo-MOSFET (Ψ-MOSFET), semiconductor device models, silicon-on-insulator (SOI), threshold voltage.
IEEE Transactions on Electron Devices, 2010
Examples taken from ultrathin silicon-on-insulator (SOI) transistors tend to contradict the unive... more Examples taken from ultrathin silicon-on-insulator (SOI) transistors tend to contradict the universality of mobilityfield dependence. We revisit the meaning of the effective field concept and its implications on the universal mobility curve (UMC). Poisson-Schroedinger simulations point out the inappropriateness of the standard definitions of effective field when dealing with SOI or double-gate devices. Different carrier distributions can lead to the same value of the effective field breaking the foundation of the universality. The presence of two different gate stacks, the coexistence and coupling of two channels, and the spreading of carriers in the body are interesting nonlocal effects that are not accounted for by the UMC. Selected practical results showing the UMC failure in SOI metal-oxide-semiconductor field-effect transistors are presented. The actual behavior of the effective mobility is illustrated, shedding light on the limitations of the universal mobility/effective field representation.
Solid-state Electronics, 2007
ABSTRACT
Journal of Applied Physics, 2009
The effect of surface roughness of the Si/SiO2 interfaces on hole mobility in double gate silicon... more The effect of surface roughness of the Si/SiO2 interfaces on hole mobility in double gate silicon-on-insulator p-channel devices is studied. Wave functions and dispersion relationships of the hole subbands were computed self-consistently with the potential profile, ...
Journal of Computational Electronics, 2008
Electron transport in strained double gate silicon on insulator transistors has been studied by M... more Electron transport in strained double gate silicon on insulator transistors has been studied by Monte Carlo method. Poisson and Schroedinger equations have been self-consistently solved in these devices for different silicon layer thicknesses both for unstrained and strained silicon channels. The results show that the strain of the silicon layer leads to a larger population of the no-primed subbands, thus decreasing the average conduction effective mass. However, strain also contributes to a larger confinement of the charge close to the two Si/SiO2 interfaces, thus weakening the volume inversion effect, and limiting the potential increase of the phonon limited mobility.
IEEE Transactions on Electron Devices, 2007
An empirical expression is developed for the inversion layer centroid and the polysilicon-gate de... more An empirical expression is developed for the inversion layer centroid and the polysilicon-gate depletion region thickness for bulk MOSFETs with different crystallographic orientations. In particular, results for the most commonly used wafer orientations, i.e., (100), (110), and (111), are given. These expressions are used to accurately model the inversion charge (Q inv ) and the gate-to-channel capacitance (C gc ) of MOSFETs with gate oxides of nanometric thickness (t ox < 1 nm) and different surface orientations. The Poisson and Schrödinger equations are self-consistently solved for different values of silicon and polysilicon doping concentrations in these devices. Our results show important reductions of both Q inv and C gc because of the polysilicon depletion effect and the displacement of the inversion charge centroid from the interface to the silicon bulk as a consequence of quantum effects. These effects are very noticeable for gate-oxide thicknesses of around 1 nm and must be taken into account in the development of accurate MOSFET models. We show that this task can be performed by means of a corrected gate-oxide thickness, which includes both the effect of the inversion layer centroid Z I and the polydepletion region thickness Z D . To do this, we have developed an accurate model for Z I as a function of the inversion charge concentration, the depletion charge concentration, and the silicon doping concentration for the (100), (110), and (111) wafer orientations. The in-plane channel directions have been swept for each wafer orientation in order to study the validity of the model in depth. Similarly, we provide an expression for Z D as a function of the polydoping concentration. The gate-to-channel capacitance is also carefully and extensively analyzed. An analytical model for C gc is provided and tested for different values of oxide thickness, polysilicon doping, substrate doping, and gate voltage.
Applied Physics Letters, 2006
We show the importance of acoustic phonon confinement in ultrathin silicon-on-insulator inversion... more We show the importance of acoustic phonon confinement in ultrathin silicon-on-insulator inversion layers by comparing electron mobility calculated by the Monte Carlo method assuming a bulk acoustic phonon model (the usual procedure) with that obtained by using a confined acoustic phonon model developed in this work. Both freestanding and rigid boundary conditions are taken into account for the evaluation of the confined phonon dispersion in a three-layer structure. Mobility reductions of 30% are observed for silicon thicknesses of around 5-10nm when the confined acoustic phonon model is used.
Great improvements in MOSFET performance can be obtained when metal or fully silicided gates are ... more Great improvements in MOSFET performance can be obtained when metal or fully silicided gates are used rather than their polysilicon counterparts. However, we will show that although the non-metallic effects are partially suppressed, accumulation and depletion regions are still present, even when metal gates are used. Poisson and Schrodinger equations are self-consistently solved to study the actual charge physics underneath the metal or silicided gate. After introducing the physical context, we highlight the overestimation in the extraction of the oxide thickness from C-V measurements. An error of up to 15% in the evaluation of gate to channel capacitance was found due to the quantization of the holes in accumulation. Finally, the impact of a substoichiometric insulator layer and the band-gap narrowing of highly-doped polysilicon gates are also discussed.
La materia Ética y Valores pertenece al campo de conocimiento histórico-social, el cual está conf... more La materia Ética y Valores pertenece al campo de conocimiento histórico-social, el cual está conformado por un conjunto de asignaturas humanísticas y sociales que desde una perspectiva sistemática y rigurosa, ayudan al estudiante a comprender los fenómenos económicos, políticos, sociales y morales, a partir de su ubicación en un contexto histórico-cultural. Este campo aporta elementos teóricos y metodológicos que guían al bachiller en el proceso de construcción del conocimiento y lo facultan para interpretar dichos fenómenos con una visión humanística e integral. De especial manera, la materia Ética y Valores se incorpora en este campo de conocimiento, dado que la Ética, como rama de la Filosofía, busca la comprensión de los valores y principios morales que regulan la vida individual y social y ofrece una base para la reflexión sobre cualquier otra disciplina.
IEEE Electron Device Letters, 2010
ABSTRACT
IEEE Transactions on Electron Devices, 2010
A new analytical model is presented for the inversion charge of surrounding-gate transistors (SGT... more A new analytical model is presented for the inversion charge of surrounding-gate transistors (SGTs). Quantum effects are taken into account by means of a modified capacitance model that includes the inversion charge centroid and a correction to the threshold voltage. A drain current model for the SGT that includes velocity saturation, short channel, and velocity overshoot effects is also developed. The model accurately reproduces both simulated and experimental results for different silicon core radii and gate voltages.
Solid-state Electronics, 2009
Introducing metal or fully silicided gates in the semiconductor industry leads to improvements in... more Introducing metal or fully silicided gates in the semiconductor industry leads to improvements in MOSFET performance when compared to their polysilicon counterparts. However we will show, through PoissonSchroedinger simulations, that when silicides are not treated as ...
IEEE Electron Device Letters, 2008
Abstract We studied the electrical behavior of MOSFETs in both accumulation and inversion regions... more Abstract We studied the electrical behavior of MOSFETs in both accumulation and inversion regions when the poly doping concentration was increased up to a level emulating the metallic limit for silicides. Our Poisson-Schrodinger simulations reveal a lower ...
IEEE Electron Device Letters, 2009
We show that the effect of phonon confinement in ultrathin double-gate silicon-on-insulator (DGSO... more We show that the effect of phonon confinement in ultrathin double-gate silicon-on-insulator (DGSOI) transistors on hole mobility is weaker than that predicted for electron mobility. To do so, confined phonon modes in SOI devices are computed, employing an elastic continuum model of acoustic phonons in a three-layer structure. A self-consistent k middot p-Poisson solver has been developed for the valence-band
The carrier mobility in ultra-thin SOI transistors was measured at the front channel, back channe... more The carrier mobility in ultra-thin SOI transistors was measured at the front channel, back channel and in double gate mode (DG). A model for generalizing the mobility extraction method, based on the F-function, is proposed. In DG-mode the apparent mobility is the sum of front and back channel mobilities only if the two channels are independent (partially depleted or relatively
Journal of Computational Electronics, 2009
The Monte Carlo simulation method is used to analyze the behavior of electron and hole mobility i... more The Monte Carlo simulation method is used to analyze the behavior of electron and hole mobility in different nanoelectronic devices including double gate transistors and FinFETs. The impact of technological parameters on carrier mobility is broadly discussed, and its behavior physically explained. Our main goal is to show how mobility in multiple gate devices compares to that in single gate devices and to study different approaches to improve the performance of these devices. Simulations of ultrashort channel devices taking into account quantum effects are also shown.
Semiconductor Science and Technology, 2009
We develop a fully self-consistent solver for the six-band k sdot p Schrödinger and Poisson equat... more We develop a fully self-consistent solver for the six-band k sdot p Schrödinger and Poisson equations to compute the valence-band structure of Si and Ge devices with arbitrary substrate orientation and uniaxial or biaxial strain. This allows us to compute the potential, charge distribution and subband energy dispersion relation for hole inversion layers in different devices and, using a simplex
Microelectronic Engineering, 2011
ABSTRACT The electrical characterization of unprocessed fully depleted silicon-on-insulator (SOI)... more ABSTRACT The electrical characterization of unprocessed fully depleted silicon-on-insulator (SOI) layers relies on the pseudo-MOSFET (Ψ-MOSFET) technique. We propose three-interface models which are more appropriate for addressing the case of SOI wafers with ultrathin body and BOX (UTB2). The novel models for threshold voltage and subthreshold swing account for the channel-to-surface and channel-to-substrate coupling which are important effects, respectively, in ultrathin films and thin BOX. The influence of the density of traps at each of the three interfaces (free surface, channel/BOX and BOX/substrate) is discussed. The models are validated with experimental results from a range of SOI film thicknesses.Graphical abstractThe electrical characterization of unprocessed fully depleted Silicon-on-Insulator (SOI) layers relies on the Pseudo-MOSFET (Ψ-MOSFET) technique. We propose 3-interface models which are more appropriate for addressing the case of SOI wafers with ultrathin body and BOX (UTB2). The novel models for threshold voltage and subthreshold swing account for the channel-to-surface and channel-to-substrate coupling which are important effects, respectively in ultrathin films and thin BOX. The influence of the density of traps at each of the three interfaces (free surface, channel/BOX and BOX/substrate) is discussed. The models are validated with experimental results from a range of SOI film thicknesses.Research highlights► We propose three-interface models appropriate for addressing the case of SOI wafers with ultrathin body and BOX. ► The novel models for threshold voltage and subthreshold swing account for the channel-to-surface and channel-to-substrate coupling. ► The influence of the density of traps at each of the three interfaces (free surface, channel/BOX and BOX/substrate) is discussed. ► The models are validated with experimental results.
When the silicon film thickness of a DG-MOSFET is decreased, the electron transport is dominated ... more When the silicon film thickness of a DG-MOSFET is decreased, the electron transport is dominated by two opposite mechanisms: the intersubband modulation effect and the increase in the phonon scattering rate. We show that although the mobility is remarkably degraded by the phonon scattering, the electrons drift can profit from the velocity overshoot induced by the decrease in the conduction effective mass. This fact allows a more aggressive reduction in the device channel length in contrast to what is demonstrated considering only the low-field mobility behavior.
Semiconductor Science and Technology, 2007
The effect of remote scattering mechanisms (such as remote Coulomb scattering and remote surface-... more The effect of remote scattering mechanisms (such as remote Coulomb scattering and remote surface-roughness scattering) on electron mobility in ultra-thin oxide MOSFETs was studied. We highlighted the important role these scattering mechanisms play in state-of-the-art devices, mainly at low temperatures. As a consequence, the effects of these remote mechanisms on the electron mobility should be taken into account in accurate ultra-thin gate-oxide device simulations. We have developed a mobility model which takes into account the contribution of remote scattering mechanisms in ultra-thin oxide MOSFETs (including both the polysilicon-oxide surface-roughness and Coulomb scattering due to the polysilicon depletion charge). The proposed expression allowed us to reproduce the Monte Carlo simulation results obtained for several of these ultra-thin gate oxide devices. We also used this model along with previously developed models to account for the different scattering mechanisms usually included in mobility analytical calculations to reproduce the experimental results for very thin oxide MOSFETs.
IEEE Transactions on Electron Devices, 2009
The pseudo-MOS transistor (Ψ-MOSFET) is a simple and successful technique for the monitoring of s... more The pseudo-MOS transistor (Ψ-MOSFET) is a simple and successful technique for the monitoring of silicon-oninsulator (SOI) wafer quality. To characterize modern ultrathin films, a reconsideration and review of Ψ-MOSFET physics and models is required. Selected numerical simulations are presented, which shed light on the intriguing features governing Ψ-MOSFET characteristics. Updated models accounting for the density of interface states and channel-to-surface coupling effects in ultrathin SOI wafers with passivated and nonpassivated surfaces are derived. These analytical models show excellent agreement with measurement and simulation data. Index Terms-Coupling effects, material qualification, Poisson equation, pseudo-MOSFET (Ψ-MOSFET), semiconductor device models, silicon-on-insulator (SOI), threshold voltage.
IEEE Transactions on Electron Devices, 2010
Examples taken from ultrathin silicon-on-insulator (SOI) transistors tend to contradict the unive... more Examples taken from ultrathin silicon-on-insulator (SOI) transistors tend to contradict the universality of mobilityfield dependence. We revisit the meaning of the effective field concept and its implications on the universal mobility curve (UMC). Poisson-Schroedinger simulations point out the inappropriateness of the standard definitions of effective field when dealing with SOI or double-gate devices. Different carrier distributions can lead to the same value of the effective field breaking the foundation of the universality. The presence of two different gate stacks, the coexistence and coupling of two channels, and the spreading of carriers in the body are interesting nonlocal effects that are not accounted for by the UMC. Selected practical results showing the UMC failure in SOI metal-oxide-semiconductor field-effect transistors are presented. The actual behavior of the effective mobility is illustrated, shedding light on the limitations of the universal mobility/effective field representation.
Solid-state Electronics, 2007
ABSTRACT
Journal of Applied Physics, 2009
The effect of surface roughness of the Si/SiO2 interfaces on hole mobility in double gate silicon... more The effect of surface roughness of the Si/SiO2 interfaces on hole mobility in double gate silicon-on-insulator p-channel devices is studied. Wave functions and dispersion relationships of the hole subbands were computed self-consistently with the potential profile, ...
Journal of Computational Electronics, 2008
Electron transport in strained double gate silicon on insulator transistors has been studied by M... more Electron transport in strained double gate silicon on insulator transistors has been studied by Monte Carlo method. Poisson and Schroedinger equations have been self-consistently solved in these devices for different silicon layer thicknesses both for unstrained and strained silicon channels. The results show that the strain of the silicon layer leads to a larger population of the no-primed subbands, thus decreasing the average conduction effective mass. However, strain also contributes to a larger confinement of the charge close to the two Si/SiO2 interfaces, thus weakening the volume inversion effect, and limiting the potential increase of the phonon limited mobility.
IEEE Transactions on Electron Devices, 2007
An empirical expression is developed for the inversion layer centroid and the polysilicon-gate de... more An empirical expression is developed for the inversion layer centroid and the polysilicon-gate depletion region thickness for bulk MOSFETs with different crystallographic orientations. In particular, results for the most commonly used wafer orientations, i.e., (100), (110), and (111), are given. These expressions are used to accurately model the inversion charge (Q inv ) and the gate-to-channel capacitance (C gc ) of MOSFETs with gate oxides of nanometric thickness (t ox < 1 nm) and different surface orientations. The Poisson and Schrödinger equations are self-consistently solved for different values of silicon and polysilicon doping concentrations in these devices. Our results show important reductions of both Q inv and C gc because of the polysilicon depletion effect and the displacement of the inversion charge centroid from the interface to the silicon bulk as a consequence of quantum effects. These effects are very noticeable for gate-oxide thicknesses of around 1 nm and must be taken into account in the development of accurate MOSFET models. We show that this task can be performed by means of a corrected gate-oxide thickness, which includes both the effect of the inversion layer centroid Z I and the polydepletion region thickness Z D . To do this, we have developed an accurate model for Z I as a function of the inversion charge concentration, the depletion charge concentration, and the silicon doping concentration for the (100), (110), and (111) wafer orientations. The in-plane channel directions have been swept for each wafer orientation in order to study the validity of the model in depth. Similarly, we provide an expression for Z D as a function of the polydoping concentration. The gate-to-channel capacitance is also carefully and extensively analyzed. An analytical model for C gc is provided and tested for different values of oxide thickness, polysilicon doping, substrate doping, and gate voltage.
Applied Physics Letters, 2006
We show the importance of acoustic phonon confinement in ultrathin silicon-on-insulator inversion... more We show the importance of acoustic phonon confinement in ultrathin silicon-on-insulator inversion layers by comparing electron mobility calculated by the Monte Carlo method assuming a bulk acoustic phonon model (the usual procedure) with that obtained by using a confined acoustic phonon model developed in this work. Both freestanding and rigid boundary conditions are taken into account for the evaluation of the confined phonon dispersion in a three-layer structure. Mobility reductions of 30% are observed for silicon thicknesses of around 5-10nm when the confined acoustic phonon model is used.
Great improvements in MOSFET performance can be obtained when metal or fully silicided gates are ... more Great improvements in MOSFET performance can be obtained when metal or fully silicided gates are used rather than their polysilicon counterparts. However, we will show that although the non-metallic effects are partially suppressed, accumulation and depletion regions are still present, even when metal gates are used. Poisson and Schrodinger equations are self-consistently solved to study the actual charge physics underneath the metal or silicided gate. After introducing the physical context, we highlight the overestimation in the extraction of the oxide thickness from C-V measurements. An error of up to 15% in the evaluation of gate to channel capacitance was found due to the quantization of the holes in accumulation. Finally, the impact of a substoichiometric insulator layer and the band-gap narrowing of highly-doped polysilicon gates are also discussed.
La materia Ética y Valores pertenece al campo de conocimiento histórico-social, el cual está conf... more La materia Ética y Valores pertenece al campo de conocimiento histórico-social, el cual está conformado por un conjunto de asignaturas humanísticas y sociales que desde una perspectiva sistemática y rigurosa, ayudan al estudiante a comprender los fenómenos económicos, políticos, sociales y morales, a partir de su ubicación en un contexto histórico-cultural. Este campo aporta elementos teóricos y metodológicos que guían al bachiller en el proceso de construcción del conocimiento y lo facultan para interpretar dichos fenómenos con una visión humanística e integral. De especial manera, la materia Ética y Valores se incorpora en este campo de conocimiento, dado que la Ética, como rama de la Filosofía, busca la comprensión de los valores y principios morales que regulan la vida individual y social y ofrece una base para la reflexión sobre cualquier otra disciplina.