Philip G Tanner - Academia.edu (original) (raw)
Papers by Philip G Tanner
Materials Science Forum, 2019
In this paper we report temperature independent near-interface traps (NITs) in the gate oxide of ... more In this paper we report temperature independent near-interface traps (NITs) in the gate oxide of N-type MOS capacitors. The measurements were performed by a recently developed direct-measurement technique, which detected NITs with energy levels between 0.13 eV to 0.23 eV above the bottom of conduction band. These traps are also spatially localized close to the SiC surface, as evidenced by the fact that they are not observed at measurement frequencies below 6 MHz. The temperature independence indicates that this localized defect is different from the usually observed NITs whose density is increased by temperature-bias stress.
Scientific Reports, 2019
Attempts to model the current through Schottky barrier diodes using the two fundamental mechanism... more Attempts to model the current through Schottky barrier diodes using the two fundamental mechanisms of thermionic emission and tunnelling are adversely impacted by defects and second order effects. This has led to the publication of countless different models to account for these effects, including some with non-physical parameters. Recently, we have developed silicon carbide Schottky barrier diodes that do not suffer from second order effects, such as excessive leakage, carrier generation and recombination, and non-uniform barrier height. In this paper, we derive the foundational current equations to establish clear links between the fundamental current mechanisms and the governing parameters. Comparing these equations with measured current–voltage characteristics, we show that the fundamental equations for tunnelling and thermionic emission can accurately model 4H silicon carbide Schottky barrier diodes over a large temperature and voltage range. Based on the obtained results, we d...
IEEE Journal of the Electron Devices Society, 2018
This brief presents direct electrical measurement of active defects in the strong-accumulation re... more This brief presents direct electrical measurement of active defects in the strong-accumulation region of N-type 4H-SiC MOS capacitors, which corresponds to the strong-inversion region of N-channel MOSFETs. The results demonstrate the existence of an active defect in the gate oxide, located very close to the SiC surface, with localized energy levels between 0.13 eV and 0.23 eV above the bottom of the conduction band. The observed spatial and energy localizations indicates that this is a well-defined defect. INDEX TERMS 4H-SiC MOSFET, N-type SiC MOS capacitor, gate oxide, near-interface traps, trap measurement.
Procedia Engineering, 2016
In this paper, we deposited c-axis oriented ZnO thin films on top of epitaxial 3C-SiC/Si (100) su... more In this paper, we deposited c-axis oriented ZnO thin films on top of epitaxial 3C-SiC/Si (100) substrates using RF magnetron sputtering. We investigated the effect of O2/Ar ratio and the post-annealing temperature. The grazing angle incident x-ray diffraction results show that ZnO thin-films are highly oriented along the (002) crystalline direction between the O2/Ar ratio of 30 % to 50 %, at the post-annealing temperature of 600 ˚C in nitrogen environment. The recipe from this work can be used to develop low cost piezoelectric devices such as an energy harvester.
2015 12th China International Forum on Solid State Lighting (SSLCHINA), 2015
Efficiency droop remains a significant problem to be overcome if the performance of LEDs for soli... more Efficiency droop remains a significant problem to be overcome if the performance of LEDs for solid state lighting is to be improved. As more cost effective substrates such as silicon wafers are used on which to grow the LED active layers, the overall output efficiency and efficiency droop at high drive currents need to be monitored and better understood. This paper investigates the droop effect at elevated temperatures for an LED grown on silicon, compared with an LED grown on the more standard sapphire substrate. While the overall output efficiency decreases with increasing temperature, the efficiency droop is found to be relatively independent of temperature.
2006 25th International Conference on Microelectronics
This paper demonstrates the extraction of MOS capacitor minority carrier generation lifetime and ... more This paper demonstrates the extraction of MOS capacitor minority carrier generation lifetime and surface generation velocity from the measurement of deep-depletion capacitance transient. It is shown that the bulk generation lifetime, the lateral surface generation, and the surface generation under the gate can be separately determined by measuring test structures with different perimeter-to-area ratios.
Journal of Materials Chemistry C, 2015
This article reports the first results on the strain-induced pseudo-Hall effect in single crystal... more This article reports the first results on the strain-induced pseudo-Hall effect in single crystal 3C-SiC(111) four-terminal devices.
1997 21st International Conference on Microelectronics. Proceedings, 1997
This paper presents the results of ;YO nitridatioii of >'io1 grown on p-type 4H-Sic. N O iiitrida... more This paper presents the results of ;YO nitridatioii of >'io1 grown on p-type 4H-Sic. N O iiitridation has a briiefical effect on the quality of the oxides grown on p-type 4 H-S i C. The C-V curves become smoother and sharper aftkr N O annealing. Frequently observed ilrterface lwlge ik also removed from N O annealed Sampks.
1998 Conference on Optoelectronic and Microelectronic Materials and Devices. Proceedings (Cat. No.98EX140)
This paper presents results of the physical characterization of NO nitrided SiC/SiOz interfaces b... more This paper presents results of the physical characterization of NO nitrided SiC/SiOz interfaces by XPS analysis. The results show different interface chemistries between NO nitrided and Ar annealed SiC/SiOz interfaces. After NO nitridation, N builds up at the SiC/SiOz interface forming SPN bonds. The NO nitrided SiC/SiOZ interface is free of the complex interface oxidekarbon compounds which are suggested to be the reason for the inferiority of the SiC/SiOz interface compared to the Si/SiOz interface
MRS Proceedings, 1999
ABSTRACTThe necessity to decrease silicon wafer-processing temperatures substantially has stimula... more ABSTRACTThe necessity to decrease silicon wafer-processing temperatures substantially has stimulated research into new and innovative techniques for the formation of thin dielectric films. A photo-decomposition technique using Nitric Oxide (NO) is one such promising method. Thermally NO-grown and NO-annealed dielectric films have already shown very encouraging physical and electrical results. This study compares thermally NO-grown oxides with thermally NO grown and assisted by ultraviolet (UV) irradiation. Methods using UV and vacuum UV light generated from low-pressure mercury or deuterium lamps to stimulate the growth of ultrathin dielectric films are described. The oxynitridation of silicon is carried out by irradiating an ultraviolet beam on the heated silicon substrate covered by a thin layer of nitric oxide gas. Typical resultant film thickness were in the range 10 –40 A after oxynitridation for various times at 500°C. MIS devices were fabricated using these films as gate insu...
MRS Proceedings, 1996
With the requirement for reduced dielectric thickness and improved durability in silicon MOS devi... more With the requirement for reduced dielectric thickness and improved durability in silicon MOS devices, new growth techniques and material composition are constantly being developed. An important part of this development is the electrical characterisation of the dielectric material and in particular the properties of the dielectric-semiconductor interface.This paper presents a study of damage caused to the dielectrics of MOS capacitors which have been subjected to either constant current stressing or RF plasma etching. The density and energy position of fast interface states and fixed oxide charges were measured using standard capacitance-voltage techniques. These results are then compared with a new current transient technique, which has been developed to measure slow interface states having a range of response times. This new technique steps the surface Fermi level through the silicon bandgap and the resulting current transients provide information on trap response times at each ene...
RSC Advances, 2015
This study reports on the orientation dependence and shear piezoresistive coefficients of the pse... more This study reports on the orientation dependence and shear piezoresistive coefficients of the pseudo-Hall effect in p-type single crystalline 3C–SiC.
Materials Science Forum, 2013
In this work, we studied the effect of surface preparation and substrate temperature during sputt... more In this work, we studied the effect of surface preparation and substrate temperature during sputter deposition of Schottky contacts on N-GaN/SiC/Si substrates, looking at parameters such as on-resistance, reverse leakage, and contact barrier height. Ti, Ni and Mo were sputtered to form the contacts, and we characterized the I-V curves with the different substrate temperatures during the sputtering as shown in Figure 1. For the Ti Schottky contact, the substrate temperature of 100oC during the sputtering demonstrates the minimum series resistance with Rs about 0.04cm2, while temperatures greater than 3000C increased reverse bias leakage. The Mott-Schottky plot reveals a barrier height of 1.2V for this contact. Results for sputtered Ni contacts using different substrate temperatures will also be presented, as well as the effect of Ar sputter cleaning before contact deposition.
Applied Physics Express, 2015
ABSTRACT This article reports for the first time the electrical properties of fabricated n-3C-SiC... more ABSTRACT This article reports for the first time the electrical properties of fabricated n-3C-SiC/p-Si heterojunction diodes under external mechanical stress in the [110] direction. An anisotype heterojunction diode of n-3C-SiC/p-Si was fabricated by depositing 3C-SiC onto the Si substrate by low-pressure chemical vapor deposition. The mechanical stress significantly affected the scaling current density of the heterojunction. The scaling current density increases with stress and is explained in terms of a band offset reduction at the SiC/Si interface under applied stress. A reduction in the barrier height across the junction owing to applied stress is also explained quantitatively.
IEEE Electron Device Letters, 2015
ABSTRACT This letter reports for the first time the strain dependence of the offset voltage in p-... more ABSTRACT This letter reports for the first time the strain dependence of the offset voltage in p-type 3C-SiC van der Pauw square device. The p-type 3C-SiC thin film was epitaxially grown on a p-type Si(100) wafer by using low pressure chemical vapor deposition (LPCVD) followed by a conventional photolithography and dry etch processes, forming four-terminal van der Pauw device. The influence of applied tensile and compressive strain on the offset voltage of the van der Pauw device was investigated using the bending beam method. Experimental results showed that the offset voltage of the device is significantly changed by applied compressive and tensile strain, indicating the feasibility of using this effect for mechanical sensing applications. The sensitivity of the device to the applied strain has been found to be 70 (mV/A)/ppm.
Device and Process Technologies for MEMS and Microelectronics, 1999
ABSTRACT
Device and Process Technologies for MEMS and Microelectronics, 1999
ABSTRACT
Materials Science Forum, 2014
Power MOSFETs based on 4H-SiC have recently been commercialized and so circuit designers require ... more Power MOSFETs based on 4H-SiC have recently been commercialized and so circuit designers require SPICE models for simulation purposes in a range of applications including switch-mode power supplies. We present a selection of SPICE LEVEL 3 parameters and equations that can be used for effective circuit simulation of these MOSFETs, taking into account their unique characteristics for both static and dynamic operation.
Advanced Texts in Physics, 2004
Materials Science Forum, 2019
In this paper we report temperature independent near-interface traps (NITs) in the gate oxide of ... more In this paper we report temperature independent near-interface traps (NITs) in the gate oxide of N-type MOS capacitors. The measurements were performed by a recently developed direct-measurement technique, which detected NITs with energy levels between 0.13 eV to 0.23 eV above the bottom of conduction band. These traps are also spatially localized close to the SiC surface, as evidenced by the fact that they are not observed at measurement frequencies below 6 MHz. The temperature independence indicates that this localized defect is different from the usually observed NITs whose density is increased by temperature-bias stress.
Scientific Reports, 2019
Attempts to model the current through Schottky barrier diodes using the two fundamental mechanism... more Attempts to model the current through Schottky barrier diodes using the two fundamental mechanisms of thermionic emission and tunnelling are adversely impacted by defects and second order effects. This has led to the publication of countless different models to account for these effects, including some with non-physical parameters. Recently, we have developed silicon carbide Schottky barrier diodes that do not suffer from second order effects, such as excessive leakage, carrier generation and recombination, and non-uniform barrier height. In this paper, we derive the foundational current equations to establish clear links between the fundamental current mechanisms and the governing parameters. Comparing these equations with measured current–voltage characteristics, we show that the fundamental equations for tunnelling and thermionic emission can accurately model 4H silicon carbide Schottky barrier diodes over a large temperature and voltage range. Based on the obtained results, we d...
IEEE Journal of the Electron Devices Society, 2018
This brief presents direct electrical measurement of active defects in the strong-accumulation re... more This brief presents direct electrical measurement of active defects in the strong-accumulation region of N-type 4H-SiC MOS capacitors, which corresponds to the strong-inversion region of N-channel MOSFETs. The results demonstrate the existence of an active defect in the gate oxide, located very close to the SiC surface, with localized energy levels between 0.13 eV and 0.23 eV above the bottom of the conduction band. The observed spatial and energy localizations indicates that this is a well-defined defect. INDEX TERMS 4H-SiC MOSFET, N-type SiC MOS capacitor, gate oxide, near-interface traps, trap measurement.
Procedia Engineering, 2016
In this paper, we deposited c-axis oriented ZnO thin films on top of epitaxial 3C-SiC/Si (100) su... more In this paper, we deposited c-axis oriented ZnO thin films on top of epitaxial 3C-SiC/Si (100) substrates using RF magnetron sputtering. We investigated the effect of O2/Ar ratio and the post-annealing temperature. The grazing angle incident x-ray diffraction results show that ZnO thin-films are highly oriented along the (002) crystalline direction between the O2/Ar ratio of 30 % to 50 %, at the post-annealing temperature of 600 ˚C in nitrogen environment. The recipe from this work can be used to develop low cost piezoelectric devices such as an energy harvester.
2015 12th China International Forum on Solid State Lighting (SSLCHINA), 2015
Efficiency droop remains a significant problem to be overcome if the performance of LEDs for soli... more Efficiency droop remains a significant problem to be overcome if the performance of LEDs for solid state lighting is to be improved. As more cost effective substrates such as silicon wafers are used on which to grow the LED active layers, the overall output efficiency and efficiency droop at high drive currents need to be monitored and better understood. This paper investigates the droop effect at elevated temperatures for an LED grown on silicon, compared with an LED grown on the more standard sapphire substrate. While the overall output efficiency decreases with increasing temperature, the efficiency droop is found to be relatively independent of temperature.
2006 25th International Conference on Microelectronics
This paper demonstrates the extraction of MOS capacitor minority carrier generation lifetime and ... more This paper demonstrates the extraction of MOS capacitor minority carrier generation lifetime and surface generation velocity from the measurement of deep-depletion capacitance transient. It is shown that the bulk generation lifetime, the lateral surface generation, and the surface generation under the gate can be separately determined by measuring test structures with different perimeter-to-area ratios.
Journal of Materials Chemistry C, 2015
This article reports the first results on the strain-induced pseudo-Hall effect in single crystal... more This article reports the first results on the strain-induced pseudo-Hall effect in single crystal 3C-SiC(111) four-terminal devices.
1997 21st International Conference on Microelectronics. Proceedings, 1997
This paper presents the results of ;YO nitridatioii of >'io1 grown on p-type 4H-Sic. N O iiitrida... more This paper presents the results of ;YO nitridatioii of >'io1 grown on p-type 4H-Sic. N O iiitridation has a briiefical effect on the quality of the oxides grown on p-type 4 H-S i C. The C-V curves become smoother and sharper aftkr N O annealing. Frequently observed ilrterface lwlge ik also removed from N O annealed Sampks.
1998 Conference on Optoelectronic and Microelectronic Materials and Devices. Proceedings (Cat. No.98EX140)
This paper presents results of the physical characterization of NO nitrided SiC/SiOz interfaces b... more This paper presents results of the physical characterization of NO nitrided SiC/SiOz interfaces by XPS analysis. The results show different interface chemistries between NO nitrided and Ar annealed SiC/SiOz interfaces. After NO nitridation, N builds up at the SiC/SiOz interface forming SPN bonds. The NO nitrided SiC/SiOZ interface is free of the complex interface oxidekarbon compounds which are suggested to be the reason for the inferiority of the SiC/SiOz interface compared to the Si/SiOz interface
MRS Proceedings, 1999
ABSTRACTThe necessity to decrease silicon wafer-processing temperatures substantially has stimula... more ABSTRACTThe necessity to decrease silicon wafer-processing temperatures substantially has stimulated research into new and innovative techniques for the formation of thin dielectric films. A photo-decomposition technique using Nitric Oxide (NO) is one such promising method. Thermally NO-grown and NO-annealed dielectric films have already shown very encouraging physical and electrical results. This study compares thermally NO-grown oxides with thermally NO grown and assisted by ultraviolet (UV) irradiation. Methods using UV and vacuum UV light generated from low-pressure mercury or deuterium lamps to stimulate the growth of ultrathin dielectric films are described. The oxynitridation of silicon is carried out by irradiating an ultraviolet beam on the heated silicon substrate covered by a thin layer of nitric oxide gas. Typical resultant film thickness were in the range 10 –40 A after oxynitridation for various times at 500°C. MIS devices were fabricated using these films as gate insu...
MRS Proceedings, 1996
With the requirement for reduced dielectric thickness and improved durability in silicon MOS devi... more With the requirement for reduced dielectric thickness and improved durability in silicon MOS devices, new growth techniques and material composition are constantly being developed. An important part of this development is the electrical characterisation of the dielectric material and in particular the properties of the dielectric-semiconductor interface.This paper presents a study of damage caused to the dielectrics of MOS capacitors which have been subjected to either constant current stressing or RF plasma etching. The density and energy position of fast interface states and fixed oxide charges were measured using standard capacitance-voltage techniques. These results are then compared with a new current transient technique, which has been developed to measure slow interface states having a range of response times. This new technique steps the surface Fermi level through the silicon bandgap and the resulting current transients provide information on trap response times at each ene...
RSC Advances, 2015
This study reports on the orientation dependence and shear piezoresistive coefficients of the pse... more This study reports on the orientation dependence and shear piezoresistive coefficients of the pseudo-Hall effect in p-type single crystalline 3C–SiC.
Materials Science Forum, 2013
In this work, we studied the effect of surface preparation and substrate temperature during sputt... more In this work, we studied the effect of surface preparation and substrate temperature during sputter deposition of Schottky contacts on N-GaN/SiC/Si substrates, looking at parameters such as on-resistance, reverse leakage, and contact barrier height. Ti, Ni and Mo were sputtered to form the contacts, and we characterized the I-V curves with the different substrate temperatures during the sputtering as shown in Figure 1. For the Ti Schottky contact, the substrate temperature of 100oC during the sputtering demonstrates the minimum series resistance with Rs about 0.04cm2, while temperatures greater than 3000C increased reverse bias leakage. The Mott-Schottky plot reveals a barrier height of 1.2V for this contact. Results for sputtered Ni contacts using different substrate temperatures will also be presented, as well as the effect of Ar sputter cleaning before contact deposition.
Applied Physics Express, 2015
ABSTRACT This article reports for the first time the electrical properties of fabricated n-3C-SiC... more ABSTRACT This article reports for the first time the electrical properties of fabricated n-3C-SiC/p-Si heterojunction diodes under external mechanical stress in the [110] direction. An anisotype heterojunction diode of n-3C-SiC/p-Si was fabricated by depositing 3C-SiC onto the Si substrate by low-pressure chemical vapor deposition. The mechanical stress significantly affected the scaling current density of the heterojunction. The scaling current density increases with stress and is explained in terms of a band offset reduction at the SiC/Si interface under applied stress. A reduction in the barrier height across the junction owing to applied stress is also explained quantitatively.
IEEE Electron Device Letters, 2015
ABSTRACT This letter reports for the first time the strain dependence of the offset voltage in p-... more ABSTRACT This letter reports for the first time the strain dependence of the offset voltage in p-type 3C-SiC van der Pauw square device. The p-type 3C-SiC thin film was epitaxially grown on a p-type Si(100) wafer by using low pressure chemical vapor deposition (LPCVD) followed by a conventional photolithography and dry etch processes, forming four-terminal van der Pauw device. The influence of applied tensile and compressive strain on the offset voltage of the van der Pauw device was investigated using the bending beam method. Experimental results showed that the offset voltage of the device is significantly changed by applied compressive and tensile strain, indicating the feasibility of using this effect for mechanical sensing applications. The sensitivity of the device to the applied strain has been found to be 70 (mV/A)/ppm.
Device and Process Technologies for MEMS and Microelectronics, 1999
ABSTRACT
Device and Process Technologies for MEMS and Microelectronics, 1999
ABSTRACT
Materials Science Forum, 2014
Power MOSFETs based on 4H-SiC have recently been commercialized and so circuit designers require ... more Power MOSFETs based on 4H-SiC have recently been commercialized and so circuit designers require SPICE models for simulation purposes in a range of applications including switch-mode power supplies. We present a selection of SPICE LEVEL 3 parameters and equations that can be used for effective circuit simulation of these MOSFETs, taking into account their unique characteristics for both static and dynamic operation.
Advanced Texts in Physics, 2004