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Prabhat Mishra

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Papers by Prabhat Mishra

Research paper thumbnail of Methods, apparatuses and computer program products for efficiently recognizing faces of images associated with various illumination conditions

Research paper thumbnail of Reliability improvement in multicore architectures through computing in embedded memory

2011 IEEE 54th International Midwest Symposium on Circuits and Systems (MWSCAS), 2011

Nanoscal e devices provide the capability of gigascale inte­ gration in modem electronic systems.... more Nanoscal e devices provide the capability of gigascale inte­ gration in modem electronic systems. However, such systems suffer from high defect rates and large parametric variations that can adversely affect system reliability. Hardware duplication is an obvious direction but it incurs significant area overhead that is unacceptable in many scenarios. Memory­ based computing (MBC) is a promising alternative to improve

Research paper thumbnail of An efficient retargetable framework for instruction-set simulation

Research paper thumbnail of Instruction set compiled simulation: a technique for fast and flexible instruction set simulation

Research paper thumbnail of Functional Coverage Driven Test Generation for Validation of Pipelined Processors

Research paper thumbnail of Graph-Based Functional Test Program Generation for Pipelined Processors

Research paper thumbnail of Automatic Verification of InOrder Execution In Microprocessors with Fragmented Pipelines and Multicycle Functional Units

Research paper thumbnail of Functional abstraction driven design space exploration of heterogeneous programmable architectures

ABSTRACT Rapid Design Space Exploration (DSE) of a programmable architecture is feasible using an... more ABSTRACT Rapid Design Space Exploration (DSE) of a programmable architecture is feasible using an automatic toolkit (compiler, simulator, assembler) generation methodology driven by an Architecture Description Language (ADL). While many con-temporary ADLs can ...

Research paper thumbnail of Synthesis-driven Exploration of Pipelined Embedded Processors

... [11] O. Schliebusch et al. Architecture Implementation using the Machine Description Language... more ... [11] O. Schliebusch et al. Architecture Implementation using the Machine Description LanguageLISA. VLSI Design / ASP-DAC, 2002. [12] P. Mishra et al. Automatic Verification of In-Order Execution in Microprocessors with Fragmented Pipelines and Multicycle Functional Units. ...

Research paper thumbnail of Memory Subsystem Description in EXPRESSION

Research paper thumbnail of Modeling and Verification of Pipelined Embedded Processors in the Presence of Hazards and Exceptions

Embedded systems present a tremendous opportunity to customize designs by exploiting the applicat... more Embedded systems present a tremendous opportunity to customize designs by exploiting the application behavior. Due to increasing design complexity deeply pipelined high performance embedded processors are common today. In the presence of hazards and exceptions the validation of pipelined embedded processors is a major challenge. We extend a Finite State Machine (FSM) based modeling of pipelined processors to verify the pipeline specification in the presence of hazards and multiple exceptions. Our approach leverages the system architect's knowledge about the behavior of the pipelined processor, through Architecture Description Language (ADL) constructs, and thus allows a powerful top-down approach to pipeline verification. We applied this methodology to the DLX processor to demonstrate the usefulness of our approach

Research paper thumbnail of Functional Abstraction of Programmable Embedded Systems

... Prabhat Mishra Jonas Astrom Nikil Dutt Alex Nicolau ... Stron-gArm, 56K: Motorola 56K, c5x: T... more ... Prabhat Mishra Jonas Astrom Nikil Dutt Alex Nicolau ... Stron-gArm, 56K: Motorola 56K, c5x: TI C5x, c6x: TI C6x, MA: MAP1000A, SC: Star-core, R10: MIPS R10000, MP: Motorola MPC7450, U3: SUN UltraSparc IIi, α64: Alpha 21364, IA64: Intel IA-64, PS2: Sony PlayStation 2000 ...

Research paper thumbnail of Automatic Modeling and Validation of Pipeline Specifications driven by an Architecture Description Language

Research paper thumbnail of Architecture description languages for programmable embedded systems

Iee Proceedings-computers and Digital Techniques, 2005

... P. Mishra is with the Department of Computer and Information Science and Engineering, Univers... more ... P. Mishra is with the Department of Computer and Information Science and Engineering, University of Florida, Gainesville, FL 32611, USA N. Dutt is with the Center for Embedded Computer ... In this Section, we briefly describe three mixed ADLs: HMDES, EXPRESSION and LISA. ...

Research paper thumbnail of An efficient code compression technique using application-aware bitmask and dictionary selection methods

Research paper thumbnail of Processor-memory co-exploration driven by an architectural description language

Research paper thumbnail of Rapid Exploration of Pipelined Processors through Automatic Generation of Synthesizable RTL Models

... Proceedings of the 14th IEEE International Workshop on Rapid Systems Prototyping (RSP&amp... more ... Proceedings of the 14th IEEE International Workshop on Rapid Systems Prototyping (RSP'03) 1074 ... allowing for a reduction in the time for specification and exploration by at least ... decoder that uses information regarding individual instruction format and opcode mapping for each ...

Research paper thumbnail of Functional verification of programmable embedded architectures - a top-down approach

Prabhat Mishra Nikil D. Dutt University of Florida University of California, Irvine USA USA Funct... more Prabhat Mishra Nikil D. Dutt University of Florida University of California, Irvine USA USA Functional Verification of Programmable Embedded Architectures A Top-Down Approach ISBN 0-387-26143-5 e-ISBN 0-387-26399-3 Printed on acid-free paper. ISBN ...

Research paper thumbnail of An efficient retargetable framework for instruction-set simulation

Research paper thumbnail of HDLGen: Architecture Description Language driven HDL Generation for Pipelined Processors

... Architecture Implementation using the Machine Description Language LISA. In VLSI Design / ASP... more ... Architecture Implementation using the Machine Description Language LISA. In VLSI Design / ASPDAC, 2002. [14] O. Wahlen et al. Application Specific Compiler/Architecture Codesign: A Case Study. In LCTES-SCOPES, 2002. [15] P. Mishra and H. Tomiyama and N. Dutt and A ...

Research paper thumbnail of Methods, apparatuses and computer program products for efficiently recognizing faces of images associated with various illumination conditions

Research paper thumbnail of Reliability improvement in multicore architectures through computing in embedded memory

2011 IEEE 54th International Midwest Symposium on Circuits and Systems (MWSCAS), 2011

Nanoscal e devices provide the capability of gigascale inte­ gration in modem electronic systems.... more Nanoscal e devices provide the capability of gigascale inte­ gration in modem electronic systems. However, such systems suffer from high defect rates and large parametric variations that can adversely affect system reliability. Hardware duplication is an obvious direction but it incurs significant area overhead that is unacceptable in many scenarios. Memory­ based computing (MBC) is a promising alternative to improve

Research paper thumbnail of An efficient retargetable framework for instruction-set simulation

Research paper thumbnail of Instruction set compiled simulation: a technique for fast and flexible instruction set simulation

Research paper thumbnail of Functional Coverage Driven Test Generation for Validation of Pipelined Processors

Research paper thumbnail of Graph-Based Functional Test Program Generation for Pipelined Processors

Research paper thumbnail of Automatic Verification of InOrder Execution In Microprocessors with Fragmented Pipelines and Multicycle Functional Units

Research paper thumbnail of Functional abstraction driven design space exploration of heterogeneous programmable architectures

ABSTRACT Rapid Design Space Exploration (DSE) of a programmable architecture is feasible using an... more ABSTRACT Rapid Design Space Exploration (DSE) of a programmable architecture is feasible using an automatic toolkit (compiler, simulator, assembler) generation methodology driven by an Architecture Description Language (ADL). While many con-temporary ADLs can ...

Research paper thumbnail of Synthesis-driven Exploration of Pipelined Embedded Processors

... [11] O. Schliebusch et al. Architecture Implementation using the Machine Description Language... more ... [11] O. Schliebusch et al. Architecture Implementation using the Machine Description LanguageLISA. VLSI Design / ASP-DAC, 2002. [12] P. Mishra et al. Automatic Verification of In-Order Execution in Microprocessors with Fragmented Pipelines and Multicycle Functional Units. ...

Research paper thumbnail of Memory Subsystem Description in EXPRESSION

Research paper thumbnail of Modeling and Verification of Pipelined Embedded Processors in the Presence of Hazards and Exceptions

Embedded systems present a tremendous opportunity to customize designs by exploiting the applicat... more Embedded systems present a tremendous opportunity to customize designs by exploiting the application behavior. Due to increasing design complexity deeply pipelined high performance embedded processors are common today. In the presence of hazards and exceptions the validation of pipelined embedded processors is a major challenge. We extend a Finite State Machine (FSM) based modeling of pipelined processors to verify the pipeline specification in the presence of hazards and multiple exceptions. Our approach leverages the system architect's knowledge about the behavior of the pipelined processor, through Architecture Description Language (ADL) constructs, and thus allows a powerful top-down approach to pipeline verification. We applied this methodology to the DLX processor to demonstrate the usefulness of our approach

Research paper thumbnail of Functional Abstraction of Programmable Embedded Systems

... Prabhat Mishra Jonas Astrom Nikil Dutt Alex Nicolau ... Stron-gArm, 56K: Motorola 56K, c5x: T... more ... Prabhat Mishra Jonas Astrom Nikil Dutt Alex Nicolau ... Stron-gArm, 56K: Motorola 56K, c5x: TI C5x, c6x: TI C6x, MA: MAP1000A, SC: Star-core, R10: MIPS R10000, MP: Motorola MPC7450, U3: SUN UltraSparc IIi, α64: Alpha 21364, IA64: Intel IA-64, PS2: Sony PlayStation 2000 ...

Research paper thumbnail of Automatic Modeling and Validation of Pipeline Specifications driven by an Architecture Description Language

Research paper thumbnail of Architecture description languages for programmable embedded systems

Iee Proceedings-computers and Digital Techniques, 2005

... P. Mishra is with the Department of Computer and Information Science and Engineering, Univers... more ... P. Mishra is with the Department of Computer and Information Science and Engineering, University of Florida, Gainesville, FL 32611, USA N. Dutt is with the Center for Embedded Computer ... In this Section, we briefly describe three mixed ADLs: HMDES, EXPRESSION and LISA. ...

Research paper thumbnail of An efficient code compression technique using application-aware bitmask and dictionary selection methods

Research paper thumbnail of Processor-memory co-exploration driven by an architectural description language

Research paper thumbnail of Rapid Exploration of Pipelined Processors through Automatic Generation of Synthesizable RTL Models

... Proceedings of the 14th IEEE International Workshop on Rapid Systems Prototyping (RSP&amp... more ... Proceedings of the 14th IEEE International Workshop on Rapid Systems Prototyping (RSP'03) 1074 ... allowing for a reduction in the time for specification and exploration by at least ... decoder that uses information regarding individual instruction format and opcode mapping for each ...

Research paper thumbnail of Functional verification of programmable embedded architectures - a top-down approach

Prabhat Mishra Nikil D. Dutt University of Florida University of California, Irvine USA USA Funct... more Prabhat Mishra Nikil D. Dutt University of Florida University of California, Irvine USA USA Functional Verification of Programmable Embedded Architectures A Top-Down Approach ISBN 0-387-26143-5 e-ISBN 0-387-26399-3 Printed on acid-free paper. ISBN ...

Research paper thumbnail of An efficient retargetable framework for instruction-set simulation

Research paper thumbnail of HDLGen: Architecture Description Language driven HDL Generation for Pipelined Processors

... Architecture Implementation using the Machine Description Language LISA. In VLSI Design / ASP... more ... Architecture Implementation using the Machine Description Language LISA. In VLSI Design / ASPDAC, 2002. [14] O. Wahlen et al. Application Specific Compiler/Architecture Codesign: A Case Study. In LCTES-SCOPES, 2002. [15] P. Mishra and H. Tomiyama and N. Dutt and A ...

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