R JENILA - Academia.edu (original) (raw)

Papers by R JENILA

In the recent decade, decimal arithmetic has received a lot of attention. In existing research on... more In the recent decade, decimal arithmetic has received a lot of attention. In existing research on decimal multiplication, latency and area are two key factors.In any case, today's computerized frameworks and DSP applications; energy/power utilization is a pivotal thought.For quick DSP, low power and high speed multipliers are required. Because of its regular structure and ease of design, the array multiplier is one of the fastest multipliers. To boost multiplier speed and improve power dissipation with the least amount of delay, adders and CMOS power gating based CLA are employed. In the paired number framework, the significant issue in numbercrunching relates to convey. A higher rad-ix number framework, Quaternary Signed Digit (QSD), is utilized to perform number juggling tasks without convey.

In today's scenario uses of vehicles are increasing day by day along with the population, it crea... more In today's scenario uses of vehicles are increasing day by day along with the population, it creates a problem for vehicles. Finding a parking spot in most large cities is very challenging and irritating, especially during rush hour. Almost every major city in the globe has expensive parking, making it difficult to find a safe spot to leave the vehicle. To solve this problem, Smart parking meters are the main component to resolve the issue of management of parking systems and payments during parking vehicles. The proposed smart parking meter will automate the payment process, improve vehicle security within the parking area, and effectively manage traffic congestion by limiting the number of vehicles in the space at any given moment.In this paper, a finite state machine (FSM) based payment method of parking meters will be presented using Verilog language. The synthesis and simulation of the proposed smart parking meter is done using Xilinx VIVADO 2019.1. This proposed smart parking meter can be used in various applications such as shopping malls, movie theaters, public or private offices etc.

Precision agriculture is a type of innovative agriculture, based on new technologies, which aims ... more Precision agriculture is a type of innovative agriculture, based on new technologies, which aims to streamline the agricultural process. Parameters such as temperature, humidity, soil characteristics and nutrients all play a role in plant development. Numerous sensors are available to measure the environmental factors and depending on datum, the devices to monitor and to control the parameter changes for each crop. Some existing technologies are more complex and very complicated for farmers to implement. The main goal of this project is to produce a precision agriculture-based grid with high performance and low energy consumption. This is achieved by using DHT11 sensor for the measurement of temperature and humidity in the surrounding environment for the plant growth. With the help of Basys 3 Artix-7 FPGA Board, it is easy to monitor and an alert signal makes aware for control those environmental parameters.

On behalf of technology scaling, on-chip memories in a die undergoes bit errors because of single... more On behalf of technology scaling, on-chip memories in a die undergoes bit errors because of single events or multiple cell upsets by the ecological factors such as cosmic radiation, alpha, neutron particles or due to maximum temperature in space, leads to data corruption. Error detection and correction techniques (ECC) recognize and rectify the corrupted data over communication channel. In this paper, an advanced error correction 2-dimensional code based on divide-symbol is proposed to weaken radiation-induced MCUs in memory for space applications. For encoding data bits, diagonal bits, parity bits and check bits were analyzed by XOR operation. To recover the data, again XOR operation was performed between the encoded bits and the recalculated encoded bits. After analyzing, verification, selection and correction process takes place. The proposed scheme was simulated and synthesized using Xilinx Vivado implemented in Verilog HDL. Compared with the well known existing methods, this encoding-decoding process consumes low power and occupies minimum area and delay.

In the recent decade, decimal arithmetic has received a lot of attention. In existing research on... more In the recent decade, decimal arithmetic has received a lot of attention. In existing research on decimal multiplication, latency and area are two key factors.In any case, today's computerized frameworks and DSP applications; energy/power utilization is a pivotal thought.For quick DSP, low power and high speed multipliers are required. Because of its regular structure and ease of design, the array multiplier is one of the fastest multipliers. To boost multiplier speed and improve power dissipation with the least amount of delay, adders and CMOS power gating based CLA are employed. In the paired number framework, the significant issue in numbercrunching relates to convey. A higher rad-ix number framework, Quaternary Signed Digit (QSD), is utilized to perform number juggling tasks without convey.

In today's scenario uses of vehicles are increasing day by day along with the population, it crea... more In today's scenario uses of vehicles are increasing day by day along with the population, it creates a problem for vehicles. Finding a parking spot in most large cities is very challenging and irritating, especially during rush hour. Almost every major city in the globe has expensive parking, making it difficult to find a safe spot to leave the vehicle. To solve this problem, Smart parking meters are the main component to resolve the issue of management of parking systems and payments during parking vehicles. The proposed smart parking meter will automate the payment process, improve vehicle security within the parking area, and effectively manage traffic congestion by limiting the number of vehicles in the space at any given moment.In this paper, a finite state machine (FSM) based payment method of parking meters will be presented using Verilog language. The synthesis and simulation of the proposed smart parking meter is done using Xilinx VIVADO 2019.1. This proposed smart parking meter can be used in various applications such as shopping malls, movie theaters, public or private offices etc.

Precision agriculture is a type of innovative agriculture, based on new technologies, which aims ... more Precision agriculture is a type of innovative agriculture, based on new technologies, which aims to streamline the agricultural process. Parameters such as temperature, humidity, soil characteristics and nutrients all play a role in plant development. Numerous sensors are available to measure the environmental factors and depending on datum, the devices to monitor and to control the parameter changes for each crop. Some existing technologies are more complex and very complicated for farmers to implement. The main goal of this project is to produce a precision agriculture-based grid with high performance and low energy consumption. This is achieved by using DHT11 sensor for the measurement of temperature and humidity in the surrounding environment for the plant growth. With the help of Basys 3 Artix-7 FPGA Board, it is easy to monitor and an alert signal makes aware for control those environmental parameters.

On behalf of technology scaling, on-chip memories in a die undergoes bit errors because of single... more On behalf of technology scaling, on-chip memories in a die undergoes bit errors because of single events or multiple cell upsets by the ecological factors such as cosmic radiation, alpha, neutron particles or due to maximum temperature in space, leads to data corruption. Error detection and correction techniques (ECC) recognize and rectify the corrupted data over communication channel. In this paper, an advanced error correction 2-dimensional code based on divide-symbol is proposed to weaken radiation-induced MCUs in memory for space applications. For encoding data bits, diagonal bits, parity bits and check bits were analyzed by XOR operation. To recover the data, again XOR operation was performed between the encoded bits and the recalculated encoded bits. After analyzing, verification, selection and correction process takes place. The proposed scheme was simulated and synthesized using Xilinx Vivado implemented in Verilog HDL. Compared with the well known existing methods, this encoding-decoding process consumes low power and occupies minimum area and delay.