Egidio Ragonese - Academia.edu (original) (raw)
Papers by Egidio Ragonese
IEEE Transactions on Circuits and Systems II: Express Briefs
This brief presents a novel class-D oscillator topology conceived for galvanically isolated data ... more This brief presents a novel class-D oscillator topology conceived for galvanically isolated data transfer based on RF planar coupling. In its general implementation, it consists of n capacitively coupled stacked class-D oscillators, each one loaded by a primary transformer winding. Capacitive coupling between the oscillators guarantees robust frequency/phase synchronization. The oscillation voltages are combined at the secondary transformer winding, thus ideally producing the same oscillation amplitude of a class-D topology with a power consumption reduced by a factor of 1/n thanks to the current-reuse configuration. With respect to traditional topologies, capacitivecoupled stacked class-D oscillators also allow standard MOS transistors (i.e., with a low breakdown voltage) to be reliably operated at higher supply voltages. The oscillator advantages have been highlighted in comparison with the traditionally adopted complementary cross-coupled topology within an isolated data link based on RF planar coupling in a 0.18-μm CMOS technology.
IEEE Transactions on Circuits and Systems II: Express Briefs
This paper demonstrates a fully contactless wafer-level testing based on UHF RFID technology enri... more This paper demonstrates a fully contactless wafer-level testing based on UHF RFID technology enriched by high-quality on-chip antenna. The antenna, which uses exactly the same tag IC area (i.e., 0.45 mm 2), exploits a low-cost post-process consisting of a thick dielectric layer and a copper metal, thus significantly improving the quality factor with respect to a standard CMOS implementation. Contactless wafer-level testing of a tag array is performed by simultaneous inductive coupling with a customized near-field reader. With a 27-dBm standard UHF RFID reader, a reading range up to 2.5 mm is demonstrated at 865 MHz. Anti-collision algorithm and memorized x-y device coordinates allow IC identification on the wafer under test to be achieved. Thanks to its cost-effectiveness, the proposed approach can be easily extended to general purpose IC contactless testing.
Electronics
This paper presents a switched capacitor low-pass filter in a 28-nm fully depleted silicon on ins... more This paper presents a switched capacitor low-pass filter in a 28-nm fully depleted silicon on insulator CMOS technology for 77-GHz automotive radar applications. It is operated at a power supply as low as 1 V and guarantees 5-dB in-band voltage gain while providing out-of-band attenuation higher than 36 dB and a programmable passband up to 30 MHz. A double sampling technique is adopted, which allows high operating frequency to be achieved while saving power. Moreover, low-voltage biasing and common-mode feedback circuits are exploited to guarantee an almost rail-to-rail output voltage swing. The proposed filter provides an output 1-dB compression point as high as 8.7 dBm with a power consumption of 9 mW. To the authors’ knowledge, this is the first SC-based implementation of a low pass filter for automotive radar applications.
Bipolar/BiCMOS Circuits and Technology, 2004. Proceedings of the 2004 Meeting
A lumped model for monolithic stacked transformers on silicon is presented. It employs a novel to... more A lumped model for monolithic stacked transformers on silicon is presented. It employs a novel topology that combines tbe simplicity of lumped models aud the accuracy of distributed networks. Model parameters are calculated by means of closed-form expressions using geometrical and technological data. The accuracy of the proposed model is demonstrated by comparing simulations with on-wafer experimental measurements of several
IEEE Transactions on Microwave Theory and Techniques, 2021
This article presents a <inline-formula> <tex-math notation="LaTeX">$W$ <... more This article presents a <inline-formula> <tex-math notation="LaTeX">$W$ </tex-math></inline-formula>-band power amplifier (PA) for automotive radar applications. It was designed in a 28-nm fully depleted silicon-on-insulator CMOS technology with a transition frequency of around 270 GHz and a standard back-end-of-line. The circuit adopts a pseudo-differential topology with coupling transformers, which allow both compact matching networks and layout-optimized interstage interconnections. The power stage exploits a transformer-based folded-cascode structure that is very suitable for low-voltage mm-wave power applications. The PA is able to deliver a saturated output power as high as 13.5 dBm at 77 GHz with a power-added efficiency of 14.5%, while using a power supply as low as 1 V. The linear power gain is 26.5 dB and the current consumption is 150 mA. The PA occupies a core die size of <inline-formula> <tex-math notation="LaTeX">$700\,\,\mu \text{m}\,\,\times 200\,\,\mu \text{m}$ </tex-math></inline-formula>.
Electronics, 2022
This paper presents the design of on-chip micro-antennas for package-scale galvanic isolators bas... more This paper presents the design of on-chip micro-antennas for package-scale galvanic isolators based on RF planar coupling. A step-by-step design procedure is proposed, which aims at the maximization of the weak electromagnetic coupling between the RX and TX antennas integrated on side-by-side co-packaged chips to enable both high isolation rating and common-mode transient immunity thanks to the high dielectric strength and low capacitive parasitics of a molding compound-based galvanic barrier, respectively. Micro-antenna design guidelines are drawn, highlighting the main relationship between coil coupling performance and their layout parameters, which are often in contrast with respect to traditional integrated inductor ones.
2004 IEE Radio Frequency Integrated Circuits (RFIC) Systems. Digest of Papers
A monolithic down-converter for 5-6 GHz WLAN applications was designed using a 46-GHz-f/sub T/ si... more A monolithic down-converter for 5-6 GHz WLAN applications was designed using a 46-GHz-f/sub T/ silicon bipolar process. The circuit consists of a variable-gain low noise amplifier and a double-balanced mixer. In high-gain mode, the down-converter exhibits a 3 dB noise figure and a 23 dB power gain, with an input compression point of -20 dBm. In low-gain mode, the circuit provides a 7.5 dB noise figure and a power gain of 12 dB, with an input compression point of -10 dBm. Moreover, an excellent image rejection ratio is achieved by means of monolithic passive notch filters, still maintaining a noise figure lower than 4 dB.
Organic Flexible Electronics, 2021
Abstract This chapter provides a detailed overview of amplifier topologies that can be manufactur... more Abstract This chapter provides a detailed overview of amplifier topologies that can be manufactured using organic thin-film transistors (OTFTs). Advantages and drawbacks of unipolar and complementary OTFT technologies are discussed. In the rest of the chapter, unipolar and complementary amplifier solutions are presented in sequence. First elementary unipolar amplifiers are analyzed in detail, providing quantitative insight in their performance (including gain, linearity, output swing, speed, and noise) based on a simple analytical model of the OTFT. Then examples of multistage unipolar amplifiers providing higher gain are described. Amplifiers based on complementary transistors are analyzed later, focusing on their benchmarking against unipolar solutions. Several complementary organic amplifiers exploiting multistage topologies are finally discussed, providing an analysis of their performance and their experimental characterization.
2020 AEIT International Conference of Electrical and Electronic Technologies for Automotive (AEIT AUTOMOTIVE), 2020
This paper gives a summary of the design guidelines for silicon-integrated inductive components f... more This paper gives a summary of the design guidelines for silicon-integrated inductive components for short-range/long-range automotive radar applications in K- and W-bands. Configurations for integrated inductors and transformers are compared and main loss phenomena are discussed. A focus is given to the substrate shielding. An electromagnetic-based approach is proposed to evaluate the effectiveness of ground shield for operation in K- and W-bands.
Lecture Notes in Electrical Engineering, 2019
This paper presents a comparative analysis of integrated transformers for a 77-GHz down-converter... more This paper presents a comparative analysis of integrated transformers for a 77-GHz down-converter in a 28-nm fully depleted (FD) silicon-on-insulator (SOI) CMOS technology. The proposed down-converter, which is addressed to long-range automotive radar applications, is based on a fully differential mixer-first architecture and exploits two integrated transformers, i.e. an input transformer for single-endedto-differential conversion of the 77-GHz signal and an inter-stage transformer to feed a current-driven passive Gilbert-cell. Both transformers have been properly designed, while exploiting the most suitable spiral configuration to meet the stringent requirements of automotive applications. To this aim, stacked, interleaved, and interstacked transformers have been compared by means of extensive electromagnetic simulations at 77 GHz. The comparison has been carried out in terms of insertion loss (IL) and transformer characteristic resistance (TCR), which are the most suitable figures of merit. The interstacked configuration provides the lowest IL (i.e., 1.2 dB at 77 GHz), thus resulting the best choice as input balun. The interleaved topology has been chosen instead as inter-stage transformer thanks to its high TCR (i.e., 1.9 k at 77 GHz), which leads to better conversion gain.
2019 26th IEEE International Conference on Electronics, Circuits and Systems (ICECS), 2019
This focus paper gives a panorama of galvanically isolated power/data transfer systems. It starts... more This focus paper gives a panorama of galvanically isolated power/data transfer systems. It starts from a review of state-of-the-art isolation technologies and describes most advanced system architectures. Among these, approaches capable of reducing the number of isolated links, while preserving power and data functionalities will be presented. Main research aims such as the improvement of the isolation rating, data rate, isolated power level and power efficiency, along with the isolator size and cost will be considered.
ESSCIRC 2017 - 43rd IEEE European Solid State Circuits Conference, 2017
This paper presents a fully integrated dc-dc converter with on-chip double galvanic isolation. Th... more This paper presents a fully integrated dc-dc converter with on-chip double galvanic isolation. The converter exploits only two dice both fabricated in a 0.35-μm BCD technology with a thick-oxide back-end for 5-kV galvanic isolation. It uses a novel architecture to transmit power across two isolation barriers, which are performed by integrated capacitors and transformers. LC coupling inherently enables the resonant mode operation for the isolation network, thus increasing the conversion efficiency compared with merely series-connected isolation components. Measurements of the double isolated dc-dc converter, including a Schottky diode full-bridge rectifier, achieve 110-mW dc output power and a power efficiency of 17% setting 3.3 V for both power supply and output voltage.
This paper provides a survey about alternative approaches to implement silicon–integrated galvani... more This paper provides a survey about alternative approaches to implement silicon–integrated galvanic isolators with very high isolation rating (i.e., compliant with the reinforced isolation requirements). Traditional integrated galvanic isolators are based on chip–scale isolation capacitors or transformers, whose performance is limited by the adopted isolation technology (i.e., the dielectric material and its thickness). In this paper, two approaches for data and power transfer are discussed, which exploit the RF coupling between two isolated interfaces, while packaging/assembling techniques are used to guarantee high galvanic isolation.
Circuit design techniques for integrating low-power multi-standard WLAN transceivers are presente... more Circuit design techniques for integrating low-power multi-standard WLAN transceivers are presented in this paper. Several circuital approaches have been implemented and successfully demonstrated for the most critical blocks of a WLAN transceiver. The transmitter front-end is implemented by means of a current-reuse variable-gain up-converter. The circuit provides an output 1-dB compression point of 5.3 dBm, while consuming only 45 mA from a 3-V supply voltage. Moreover, a linear-in-dB gain control characteristic is achieved over a 35-dB dynamic range. In the receiver chain, a variable-gain LNA allows excellent noise figure and linearity performance to be achieved with low power consumption. The PLL makes use of a transformer-based VCO featuring low-phase noise and wide tuning range performance.
Electronics, 2021
This paper reviews state-of-the-art approaches for galvanically isolated DC-DC converters based o... more This paper reviews state-of-the-art approaches for galvanically isolated DC-DC converters based on radio frequency (RF) micro-transformer coupling. Isolation technology, integration level and fabrication issues are analyzed to highlight the pros and cons of fully integrated (i.e., two chips) and multichip systems-in-package (SiP) implementations. Specifically, two different basic isolation technologies are compared, which exploit thick-oxide integrated and polyimide standalone transformers, respectively. To this aim, previously available results achieved on a fully integrated isolation technology (i.e., thick-oxide integrated transformer) are compared with the experimental performance of a DC-DC converter for 20-V gate driver applications, specifically designed and implemented by exploiting a stand-alone polyimide transformer. The comparison highlights that similar performance in terms of power efficiency can be achieved at lower output power levels (i.e., about 200 mW), while the f...
Electronics, 2021
This paper reviews state-of-the-art architectures for galvanically isolated DC–DC converters with... more This paper reviews state-of-the-art architectures for galvanically isolated DC–DC converters with data transmission for low-power applications. Such applications do not have stringent requirements, in terms of power efficiency, but ask for very compact, highly integrated implementations. To this aim, architecture simplicity is crucial, especially when data transmission and/or output power regulation are required. Since the bottleneck of galvanically isolated systems is the isolation device (i.e., typically a stacked thick oxide or polyimide transformer), the reduction of the number of isolated links, while preserving both power and data functionalities, is the more effective strategy to increase the level of integration, reduce the form factor, and have a lower cost per channel. Specifically, this review compares the pros and cons of different architectures that address this challenge differently from traditional solutions.
IEEE Transactions on Microwave Theory and Techniques, 2021
This paper presents a 77-GHz automotive radar receiver in a 28-nm fully depleted silicon-on-insul... more This paper presents a 77-GHz automotive radar receiver in a 28-nm fully depleted silicon-on-insulator CMOS technology. It exploits a mixer-first direct-conversion architecture to trade-off noise and linearity performance. The receiver is composed of a 77-GHz downconverter, a variable-gain amplifier, and a switched-capacitor low-pass filter. It adopts an effective and robust approach for leakage suppression due to the TX to RX crosstalk, which overcomes both gain and linearity limitations. The receiver draws an overall quiescent current as low as 27 mA from a 1-V supply voltage and provides an overall gain up to 75 dB with a noise figure of 8.2 dB. Despite the low supply voltage, an excellent blocker immunity of −9.5 dBm is achieved along with an output 1-dB compression point as high as −1.5 dBV.
International Journal of RF and Microwave Computer-Aided Engineering, 2020
In this paper, the effect of a metal patterned ground shield (PGS) on the performance of monolith... more In this paper, the effect of a metal patterned ground shield (PGS) on the performance of monolithic inductors is investigated. To this aim, three spiral inductors integrated in a 28‐nm fully depleted (FD) silicon‐on‐insulator (SOI) CMOS technology are analyzed by means of a 3‐D FEM‐based commercial software. The inductors have been designed at different operating frequencies in the RF and mm‐wave ranges to better explore the effect of the PGS. Extensive analysis revealed that the shield is able to improve the quality factor (Q‐factor) only of the inductor operated at the lowest frequency (ie, K‐band). On the contrary, it has a detrimental effect on the Q‐factor of the inductors working at higher frequencies. This is mainly due to induced losses in the PGS itself, which are so high to frustrate the substrate loss reduction. This result gives a different perspective to the adoption of the PGS for CMOS integrated inductors, which is largely recommended to improve inductor performance in the current state of the art.
IEEE Transactions on Circuits and Systems II: Express Briefs
This brief presents a novel class-D oscillator topology conceived for galvanically isolated data ... more This brief presents a novel class-D oscillator topology conceived for galvanically isolated data transfer based on RF planar coupling. In its general implementation, it consists of n capacitively coupled stacked class-D oscillators, each one loaded by a primary transformer winding. Capacitive coupling between the oscillators guarantees robust frequency/phase synchronization. The oscillation voltages are combined at the secondary transformer winding, thus ideally producing the same oscillation amplitude of a class-D topology with a power consumption reduced by a factor of 1/n thanks to the current-reuse configuration. With respect to traditional topologies, capacitivecoupled stacked class-D oscillators also allow standard MOS transistors (i.e., with a low breakdown voltage) to be reliably operated at higher supply voltages. The oscillator advantages have been highlighted in comparison with the traditionally adopted complementary cross-coupled topology within an isolated data link based on RF planar coupling in a 0.18-μm CMOS technology.
IEEE Transactions on Circuits and Systems II: Express Briefs
This paper demonstrates a fully contactless wafer-level testing based on UHF RFID technology enri... more This paper demonstrates a fully contactless wafer-level testing based on UHF RFID technology enriched by high-quality on-chip antenna. The antenna, which uses exactly the same tag IC area (i.e., 0.45 mm 2), exploits a low-cost post-process consisting of a thick dielectric layer and a copper metal, thus significantly improving the quality factor with respect to a standard CMOS implementation. Contactless wafer-level testing of a tag array is performed by simultaneous inductive coupling with a customized near-field reader. With a 27-dBm standard UHF RFID reader, a reading range up to 2.5 mm is demonstrated at 865 MHz. Anti-collision algorithm and memorized x-y device coordinates allow IC identification on the wafer under test to be achieved. Thanks to its cost-effectiveness, the proposed approach can be easily extended to general purpose IC contactless testing.
Electronics
This paper presents a switched capacitor low-pass filter in a 28-nm fully depleted silicon on ins... more This paper presents a switched capacitor low-pass filter in a 28-nm fully depleted silicon on insulator CMOS technology for 77-GHz automotive radar applications. It is operated at a power supply as low as 1 V and guarantees 5-dB in-band voltage gain while providing out-of-band attenuation higher than 36 dB and a programmable passband up to 30 MHz. A double sampling technique is adopted, which allows high operating frequency to be achieved while saving power. Moreover, low-voltage biasing and common-mode feedback circuits are exploited to guarantee an almost rail-to-rail output voltage swing. The proposed filter provides an output 1-dB compression point as high as 8.7 dBm with a power consumption of 9 mW. To the authors’ knowledge, this is the first SC-based implementation of a low pass filter for automotive radar applications.
Bipolar/BiCMOS Circuits and Technology, 2004. Proceedings of the 2004 Meeting
A lumped model for monolithic stacked transformers on silicon is presented. It employs a novel to... more A lumped model for monolithic stacked transformers on silicon is presented. It employs a novel topology that combines tbe simplicity of lumped models aud the accuracy of distributed networks. Model parameters are calculated by means of closed-form expressions using geometrical and technological data. The accuracy of the proposed model is demonstrated by comparing simulations with on-wafer experimental measurements of several
IEEE Transactions on Microwave Theory and Techniques, 2021
This article presents a <inline-formula> <tex-math notation="LaTeX">$W$ <... more This article presents a <inline-formula> <tex-math notation="LaTeX">$W$ </tex-math></inline-formula>-band power amplifier (PA) for automotive radar applications. It was designed in a 28-nm fully depleted silicon-on-insulator CMOS technology with a transition frequency of around 270 GHz and a standard back-end-of-line. The circuit adopts a pseudo-differential topology with coupling transformers, which allow both compact matching networks and layout-optimized interstage interconnections. The power stage exploits a transformer-based folded-cascode structure that is very suitable for low-voltage mm-wave power applications. The PA is able to deliver a saturated output power as high as 13.5 dBm at 77 GHz with a power-added efficiency of 14.5%, while using a power supply as low as 1 V. The linear power gain is 26.5 dB and the current consumption is 150 mA. The PA occupies a core die size of <inline-formula> <tex-math notation="LaTeX">$700\,\,\mu \text{m}\,\,\times 200\,\,\mu \text{m}$ </tex-math></inline-formula>.
Electronics, 2022
This paper presents the design of on-chip micro-antennas for package-scale galvanic isolators bas... more This paper presents the design of on-chip micro-antennas for package-scale galvanic isolators based on RF planar coupling. A step-by-step design procedure is proposed, which aims at the maximization of the weak electromagnetic coupling between the RX and TX antennas integrated on side-by-side co-packaged chips to enable both high isolation rating and common-mode transient immunity thanks to the high dielectric strength and low capacitive parasitics of a molding compound-based galvanic barrier, respectively. Micro-antenna design guidelines are drawn, highlighting the main relationship between coil coupling performance and their layout parameters, which are often in contrast with respect to traditional integrated inductor ones.
2004 IEE Radio Frequency Integrated Circuits (RFIC) Systems. Digest of Papers
A monolithic down-converter for 5-6 GHz WLAN applications was designed using a 46-GHz-f/sub T/ si... more A monolithic down-converter for 5-6 GHz WLAN applications was designed using a 46-GHz-f/sub T/ silicon bipolar process. The circuit consists of a variable-gain low noise amplifier and a double-balanced mixer. In high-gain mode, the down-converter exhibits a 3 dB noise figure and a 23 dB power gain, with an input compression point of -20 dBm. In low-gain mode, the circuit provides a 7.5 dB noise figure and a power gain of 12 dB, with an input compression point of -10 dBm. Moreover, an excellent image rejection ratio is achieved by means of monolithic passive notch filters, still maintaining a noise figure lower than 4 dB.
Organic Flexible Electronics, 2021
Abstract This chapter provides a detailed overview of amplifier topologies that can be manufactur... more Abstract This chapter provides a detailed overview of amplifier topologies that can be manufactured using organic thin-film transistors (OTFTs). Advantages and drawbacks of unipolar and complementary OTFT technologies are discussed. In the rest of the chapter, unipolar and complementary amplifier solutions are presented in sequence. First elementary unipolar amplifiers are analyzed in detail, providing quantitative insight in their performance (including gain, linearity, output swing, speed, and noise) based on a simple analytical model of the OTFT. Then examples of multistage unipolar amplifiers providing higher gain are described. Amplifiers based on complementary transistors are analyzed later, focusing on their benchmarking against unipolar solutions. Several complementary organic amplifiers exploiting multistage topologies are finally discussed, providing an analysis of their performance and their experimental characterization.
2020 AEIT International Conference of Electrical and Electronic Technologies for Automotive (AEIT AUTOMOTIVE), 2020
This paper gives a summary of the design guidelines for silicon-integrated inductive components f... more This paper gives a summary of the design guidelines for silicon-integrated inductive components for short-range/long-range automotive radar applications in K- and W-bands. Configurations for integrated inductors and transformers are compared and main loss phenomena are discussed. A focus is given to the substrate shielding. An electromagnetic-based approach is proposed to evaluate the effectiveness of ground shield for operation in K- and W-bands.
Lecture Notes in Electrical Engineering, 2019
This paper presents a comparative analysis of integrated transformers for a 77-GHz down-converter... more This paper presents a comparative analysis of integrated transformers for a 77-GHz down-converter in a 28-nm fully depleted (FD) silicon-on-insulator (SOI) CMOS technology. The proposed down-converter, which is addressed to long-range automotive radar applications, is based on a fully differential mixer-first architecture and exploits two integrated transformers, i.e. an input transformer for single-endedto-differential conversion of the 77-GHz signal and an inter-stage transformer to feed a current-driven passive Gilbert-cell. Both transformers have been properly designed, while exploiting the most suitable spiral configuration to meet the stringent requirements of automotive applications. To this aim, stacked, interleaved, and interstacked transformers have been compared by means of extensive electromagnetic simulations at 77 GHz. The comparison has been carried out in terms of insertion loss (IL) and transformer characteristic resistance (TCR), which are the most suitable figures of merit. The interstacked configuration provides the lowest IL (i.e., 1.2 dB at 77 GHz), thus resulting the best choice as input balun. The interleaved topology has been chosen instead as inter-stage transformer thanks to its high TCR (i.e., 1.9 k at 77 GHz), which leads to better conversion gain.
2019 26th IEEE International Conference on Electronics, Circuits and Systems (ICECS), 2019
This focus paper gives a panorama of galvanically isolated power/data transfer systems. It starts... more This focus paper gives a panorama of galvanically isolated power/data transfer systems. It starts from a review of state-of-the-art isolation technologies and describes most advanced system architectures. Among these, approaches capable of reducing the number of isolated links, while preserving power and data functionalities will be presented. Main research aims such as the improvement of the isolation rating, data rate, isolated power level and power efficiency, along with the isolator size and cost will be considered.
ESSCIRC 2017 - 43rd IEEE European Solid State Circuits Conference, 2017
This paper presents a fully integrated dc-dc converter with on-chip double galvanic isolation. Th... more This paper presents a fully integrated dc-dc converter with on-chip double galvanic isolation. The converter exploits only two dice both fabricated in a 0.35-μm BCD technology with a thick-oxide back-end for 5-kV galvanic isolation. It uses a novel architecture to transmit power across two isolation barriers, which are performed by integrated capacitors and transformers. LC coupling inherently enables the resonant mode operation for the isolation network, thus increasing the conversion efficiency compared with merely series-connected isolation components. Measurements of the double isolated dc-dc converter, including a Schottky diode full-bridge rectifier, achieve 110-mW dc output power and a power efficiency of 17% setting 3.3 V for both power supply and output voltage.
This paper provides a survey about alternative approaches to implement silicon–integrated galvani... more This paper provides a survey about alternative approaches to implement silicon–integrated galvanic isolators with very high isolation rating (i.e., compliant with the reinforced isolation requirements). Traditional integrated galvanic isolators are based on chip–scale isolation capacitors or transformers, whose performance is limited by the adopted isolation technology (i.e., the dielectric material and its thickness). In this paper, two approaches for data and power transfer are discussed, which exploit the RF coupling between two isolated interfaces, while packaging/assembling techniques are used to guarantee high galvanic isolation.
Circuit design techniques for integrating low-power multi-standard WLAN transceivers are presente... more Circuit design techniques for integrating low-power multi-standard WLAN transceivers are presented in this paper. Several circuital approaches have been implemented and successfully demonstrated for the most critical blocks of a WLAN transceiver. The transmitter front-end is implemented by means of a current-reuse variable-gain up-converter. The circuit provides an output 1-dB compression point of 5.3 dBm, while consuming only 45 mA from a 3-V supply voltage. Moreover, a linear-in-dB gain control characteristic is achieved over a 35-dB dynamic range. In the receiver chain, a variable-gain LNA allows excellent noise figure and linearity performance to be achieved with low power consumption. The PLL makes use of a transformer-based VCO featuring low-phase noise and wide tuning range performance.
Electronics, 2021
This paper reviews state-of-the-art approaches for galvanically isolated DC-DC converters based o... more This paper reviews state-of-the-art approaches for galvanically isolated DC-DC converters based on radio frequency (RF) micro-transformer coupling. Isolation technology, integration level and fabrication issues are analyzed to highlight the pros and cons of fully integrated (i.e., two chips) and multichip systems-in-package (SiP) implementations. Specifically, two different basic isolation technologies are compared, which exploit thick-oxide integrated and polyimide standalone transformers, respectively. To this aim, previously available results achieved on a fully integrated isolation technology (i.e., thick-oxide integrated transformer) are compared with the experimental performance of a DC-DC converter for 20-V gate driver applications, specifically designed and implemented by exploiting a stand-alone polyimide transformer. The comparison highlights that similar performance in terms of power efficiency can be achieved at lower output power levels (i.e., about 200 mW), while the f...
Electronics, 2021
This paper reviews state-of-the-art architectures for galvanically isolated DC–DC converters with... more This paper reviews state-of-the-art architectures for galvanically isolated DC–DC converters with data transmission for low-power applications. Such applications do not have stringent requirements, in terms of power efficiency, but ask for very compact, highly integrated implementations. To this aim, architecture simplicity is crucial, especially when data transmission and/or output power regulation are required. Since the bottleneck of galvanically isolated systems is the isolation device (i.e., typically a stacked thick oxide or polyimide transformer), the reduction of the number of isolated links, while preserving both power and data functionalities, is the more effective strategy to increase the level of integration, reduce the form factor, and have a lower cost per channel. Specifically, this review compares the pros and cons of different architectures that address this challenge differently from traditional solutions.
IEEE Transactions on Microwave Theory and Techniques, 2021
This paper presents a 77-GHz automotive radar receiver in a 28-nm fully depleted silicon-on-insul... more This paper presents a 77-GHz automotive radar receiver in a 28-nm fully depleted silicon-on-insulator CMOS technology. It exploits a mixer-first direct-conversion architecture to trade-off noise and linearity performance. The receiver is composed of a 77-GHz downconverter, a variable-gain amplifier, and a switched-capacitor low-pass filter. It adopts an effective and robust approach for leakage suppression due to the TX to RX crosstalk, which overcomes both gain and linearity limitations. The receiver draws an overall quiescent current as low as 27 mA from a 1-V supply voltage and provides an overall gain up to 75 dB with a noise figure of 8.2 dB. Despite the low supply voltage, an excellent blocker immunity of −9.5 dBm is achieved along with an output 1-dB compression point as high as −1.5 dBV.
International Journal of RF and Microwave Computer-Aided Engineering, 2020
In this paper, the effect of a metal patterned ground shield (PGS) on the performance of monolith... more In this paper, the effect of a metal patterned ground shield (PGS) on the performance of monolithic inductors is investigated. To this aim, three spiral inductors integrated in a 28‐nm fully depleted (FD) silicon‐on‐insulator (SOI) CMOS technology are analyzed by means of a 3‐D FEM‐based commercial software. The inductors have been designed at different operating frequencies in the RF and mm‐wave ranges to better explore the effect of the PGS. Extensive analysis revealed that the shield is able to improve the quality factor (Q‐factor) only of the inductor operated at the lowest frequency (ie, K‐band). On the contrary, it has a detrimental effect on the Q‐factor of the inductors working at higher frequencies. This is mainly due to induced losses in the PGS itself, which are so high to frustrate the substrate loss reduction. This result gives a different perspective to the adoption of the PGS for CMOS integrated inductors, which is largely recommended to improve inductor performance in the current state of the art.