Soonshin Kwon - Academia.edu (original) (raw)

Papers by Soonshin Kwon

Si and Ge nanowires and their heterostructure have been received widespread attention in various ... more Si and Ge nanowires and their heterostructure have been received widespread attention in various research fields because of the inherent advantages and the major historical roles played by these materials in contemporary microelectronics. From decades of research on two materials, integrated in-depth knowledge on the nature of material properties and manufacture process provide useful guidelines to design nanostructures and related devices with increased structural and functional complexity. In this dissertation, synthesis and applications of Ge and Si based nanowires and nanotubes in electronics, photonics, biochemical sensor, and thermoelectrics are discussed. In chapter 2, self-organizing characteristics of misfit- guided Ge quantum dots growth on Si core nanowires are systematically demonstrated. Unique Ge quantum dots growth mode caused by strain supperlattice along the Si nanowire backbone can be controlled by the choice of core diameter. Such strain-guided growth opens up a n...

Nano Letters, 2012

Misfit-strain guided growth of periodic quantum dot (QD) arrays in planar thin film epitaxy has b... more Misfit-strain guided growth of periodic quantum dot (QD) arrays in planar thin film epitaxy has been a popular nanostructure fabrication method. Engineering misfit-guided QD growth on a nanoscale substrate such as the small curvature surface of a nanowire represents a new approach to self-organized nanostructure preparation. Perhaps more profoundly, the periodic stress underlying each QD and the resulting modulation of electro-optical properties inside the nanowire backbone promise to provide a new platform for novel mechano-electronic, thermoelectronic, and optoelectronic devices. Herein, we report a first experimental demonstration of self-organized and self-limited growth of coherent, periodic Ge QDs on a one dimensional Si nanowire substrate. Systematic characterizations reveal several distinctively different modes of Ge QD ordering on the Si nanowire substrate depending on the core diameter. In particular, Ge QD arrays on Si nanowires of around 20 nm diameter predominantly exhibit an anti-correlated pattern whose wavelength agrees with theoretical predictions. The correlated pattern can be attributed to propagation and correlation of misfit strain across the diameter of the thin nanowire substrate. The QD array growth is self-limited as the wavelength of the QDs remains unchanged even after prolonged Ge deposition. Furthermore, we demonstrate a direct kinetic transformation from a uniform Ge shell layer to discrete QD arrays by a post-growth annealing process.

ACS Nano

Amorphous Si (a-Si) nanostructures are ubiquitous in numerous electronic and optoelectronic devic... more Amorphous Si (a-Si) nanostructures are ubiquitous in numerous electronic and optoelectronic devices. Amorphous materials are considered to possess the lower limit to the thermal conductivity κ , which is ~1 W.m-1 K-1 for a-Si. However, recent work suggested that κ of micron-thick a-Si films can be greater than 3 W.m-1 K-1 , which is contributed by propagating vibrational modes, referred to as "propagons". However, precise determination of κ in a-Si has been elusive. Here, we used novel structures of a-Si nanotubes and suspended a-Si films that enabled precise in-plane thermal conductivity (∥) measurement within a wide thickness range of 5 nm to 1.7 µm. We showed unexpectedly high ∥ in a-Si nanostructures, reaching ~3.0 and 5.3 W.m-1 K-1 at ~100 nm and 1.7 µm, respectively. Furthermore, the measured ∥ is significantly higher than the cross-plane on the same films. This unusually high and anisotropic thermal conductivity in the amorphous Si nanostructure manifests the surprisingly broad propagon mean free path distribution, which is found to range from 10 nm to 10 µm, in the disordered and atomically isotropic structure. This result provides an unambiguous answer to the century-old problem regarding mean free path distribution of propagons and also sheds light on the design and performance of numerous a-Si based electronic and optoelectronic devices.

Nano Letters

We show that amorphous silica and Si nanotubes can flow at room temperature under Giga-Pascal ord... more We show that amorphous silica and Si nanotubes can flow at room temperature under Giga-Pascal order stress when going to the nanometer scale. This creep behavior is unique for the amorphous nanotubes and is absent in crystalline Si nanotubes of similar dimensions. A core-shell model shows that there exists an approximately 1 nm thick viscoelastic "fluid-like" surface layer, which exhibits a room temperature viscosity equivalent to that of bulk glass above 1000 °C.

Semiconductor Science and Technology

Nanoscale, Jan 21, 2016

Reducing semiconductor materials to sizes comparable to the characteristic lengths of phonons, su... more Reducing semiconductor materials to sizes comparable to the characteristic lengths of phonons, such as the mean-free-path (MFP) and wavelength, has unveiled new physical phenomena and engineering capabilities for thermal energy management and conversion systems. These developments have been enabled by the increasing sophistication of chemical synthesis, microfabrication, and atomistic simulation techniques to understand the underlying mechanisms of phonon transport. Modifying thermal properties by scaling physical size is particularly effective for materials which have large phonon MFPs, such as crystalline Si and Ge. Through nanostructuring, materials that are traditionally good thermal conductors can become good candidates for applications requiring thermal insulation such as thermoelectrics. Precise understanding of nanoscale thermal transport in Si and Ge, the leading materials of the modern semiconductor industry, is increasingly important due to more stringent thermal conditio...

Nanoscale, 2016

Designing optical components such as polarizers on substrates with high mechanical deformability ... more Designing optical components such as polarizers on substrates with high mechanical deformability have potential to realize new device platforms in photonics, wearable electronics, and sensors. Conventional manufacturing approaches that rely highly on topdown lithography, deposition and the etching process can easily confront compatibility issues and high fabrication complexity. Therefore, an alternative integration scheme is necessary. Here, we demonstrate fabrication of highly flexible and stretchable wire grid polarizers (WGPs) by printing bottom-up grown Ge or Ge/Si core/ shell nanowires (NWs) on device substrates in a highly dense and aligned fashion. The maximum contrast ratio of 104 between transverse electric (TE) and transverse magnetic (TM) fields and above 99% (maximum 99.7%) of light blocking efficiency across the visible spectrum range are achieved. Further systematic analyses are performed both in experimental and numerical models to reveal the correspondence between physical factors (coverage ratio of NW arrays and diameter) and polarization efficiency. Moreover, we demonstrate distinctive merits of our approach: (i) high flexibility in the choice of substrates such as glass, plastic, or elastomer; (ii) easy combination with additional novel functionalities, for example, air permeability, flexibility/stretchability, biocompatibility, and a skin-like low mechanical modulus; (iii) selective printing of polarizers on a designated local area. † Electronic supplementary information (ESI) available. See

Nano letters, Jan 16, 2015

Thermal transport behavior in nanostructures has become increasingly important for understanding ... more Thermal transport behavior in nanostructures has become increasingly important for understanding and designing next generation electronic and energy devices. This has fueled vibrant research targeting both the causes and ability to induce extraordinary reductions of thermal conductivity in crystalline materials, which has predominantly been achieved by understanding that the phonon mean free path (MFP) is limited by the characteristic size of crystalline nanostructures, known as the boundary scattering or Casimir limit. Herein, by using a highly sensitive measurement system, we show that crystalline Si (c-Si) nanotubes (NTs) with shell thickness as thin as ∼5 nm exhibit a low thermal conductivity of ∼1.1 W m(-1) K(-1). Importantly, this value is lower than the apparent boundary scattering limit and is even about 30% lower than the measured value for amorphous Si (a-Si) NTs with similar geometries. This finding diverges from the prevailing general notion that amorphous materials repr...

2013 Third Berkeley Symposium on Energy Efficient Electronic Systems (E3S), 2013

71st Device Research Conference, 2013

ABSTRACT Significant physical challenges remain for CMOS technology to increase I on and decrease... more ABSTRACT Significant physical challenges remain for CMOS technology to increase I on and decrease I off as transistor dimension and power supply voltages continue downscaling. For I off , a physical barrier exists as exhibited in the subthreshold slope = |(()/()| = • which is limited to > 60 mV/dec at room temperature due to electron thermal distribution. To circumvent this fundamental thermodynamical limit, we have designed the first integration of semiconductor nanowires (NWs) and nanoelectromechanical system (NEMS) field effect transistor structure (NW-NEMFET). We have previously demonstrated 0.5 ps intrinsic delay and near ballistic operation in quantum confined semiconductor heterostructure NWFETs with diameters less than 15 nm.[1] The current design uses high performance suspended semiconductor NWs as the conduction channel, while the electrostatic pull-in of the NW towards the gate stack enables abrupt switching to the off-state leading to high frequency, low power nanoelectronics. We show that compared to planar suspended-gate FET (SGFET) design [2], NW-NEMFET allows zero SS with 10 15

The effect of varying annealing temperature and Al layer thickness on the structural and electric... more The effect of varying annealing temperature and Al layer thickness on the structural and electrical characteristics of AuPtAlTi/AlGaN/GaN ohmic contact structures has been systematically investigated. The relationship between annealing temperature, Al content, interfacial microstructure, surface planarity and contact resistance is examined. In particular, the presence of a detrimental low temperature Pt-Al reaction is identified. This is implicated in both the requirement for a higher Al:Ti ratio than is required for related AuPdAlTi contact schemes and through the degraded temperature dependent resistance behaviour of the annealed AuPtAlTi contacts.

Nanoscale, 2014

Crystalline silicon nanotubes exhibit high electrical mobility, while demonstrating loading of bi... more Crystalline silicon nanotubes exhibit high electrical mobility, while demonstrating loading of biomolecules inside for the first time.

Nano Letters, 2014

We report the first experimental demonstration of a three-terminal nanoelectromechanical field ef... more We report the first experimental demonstration of a three-terminal nanoelectromechanical field effect transistor (NEMFET) with measurable subthreshold slope as small as 6 mV/dec at room temperature and a switching voltage window of under 2 V. The device operates by modulating drain current through a suspended nanowire channel via an insulated gate electrode, thus eliminating the need for a conducting moving electrode, and yields devices that reliably switch on/off for up to 130 cycles. Radio-frequency measurements have confirmed operation at 125 MHz. Our measurements and simulations suggest that the NEMFET design is scalable toward sub-1 V ultrahigh-frequency operation for future low-power computing systems.

Nano Letters, 2008

Surface-architecture-controlled ZnO nanowires were grown using a vapor transport method on variou... more Surface-architecture-controlled ZnO nanowires were grown using a vapor transport method on various ZnO buffer film coated c-plane sapphire substrates with or without Au catalysts. The ZnO nanowires that were grown showed two different types of geometric properties: corrugated ZnO nanowires having a relatively smaller diameter and a strong deep-level emission photoluminescence (PL) peak and smooth ZnO nanowires having a relatively larger diameter and a weak deep-level emission PL peak. The surface morphology and size-dependent tunable electronic transport properties of the ZnO nanowires were characterized using a nanowire field effect transistor (FET) device structure. The FETs made from smooth ZnO nanowires with a larger diameter exhibited negative threshold voltages, indicating n-channel depletion-mode behavior, whereas those made from corrugated ZnO nanowires with a smaller diameter had positive threshold voltages, indicating n-channel enhancementmode behavior.

IEEE Transactions on Electron Devices, 2000

A review on the tunable electrical properties of ZnO nanowire field-effect transistors (FETs) is ... more A review on the tunable electrical properties of ZnO nanowire field-effect transistors (FETs) is presented. The FETs made from surface-tailored ZnO nanowire exhibit two different types of operation modes, which are distinguished as depletion and enhancement modes in terms of the polarity of the threshold voltage. We demonstrate that the transport properties of ZnO nanowire FETs are associated with the influence of nanowire size and surface roughness associated with the presence of surface trap states at the interfaces as well as the surface chemistry in environments.

Applied Surface Science, 2008

We have systematically investigated the effects of surface roughness on the electrical characteri... more We have systematically investigated the effects of surface roughness on the electrical characteristics of ZnO nanowire field effect transistors (FETs) before and after passivation by poly (methyl metahacrylate)(PMMA), a polymer-insulating layer. To control the surface ...

Applied Physics Letters, 2007

... Seok-In Na, Seok-Soon Kim, Soon-Shin Kwon, Jang Jo, Juhwan Kim, Takhee Lee, Dong-Yu Kim. ... ... more ... Seok-In Na, Seok-Soon Kim, Soon-Shin Kwon, Jang Jo, Juhwan Kim, Takhee Lee, Dong-Yu Kim. ... active layer are achieved by a soft lithographic approach using photoinduced surface-relief gratings (SRGs) on azo polymer films and poly(dimethylsiloxane) as a master and stamp ...

Applied Physics Letters, 2008

We report the effects of gate bias sweep rate on the electronic characteristics of ZnO nanowire f... more We report the effects of gate bias sweep rate on the electronic characteristics of ZnO nanowire field-effect transistors (FETs) under different environments. As the device was swept at slower gate bias sweep rates, the current decreased and threshold voltage shifted to a positive gate bias direction. These phenomena are attributed to increased adsorption of oxygen on the nanowire surface by the longer gate biasing time. Adsorbed oxygens capture electrons and cause a surface depletion in the nanowire channel. Different electrical trends were observed for ZnO nanowire FETs under different oxygen environments of ambient air, N2, and passivation.

Applied Physics Letters, 2005

Electrical properties of ZnO nanowire field effect transistors characterized with scanning probes... more Electrical properties of ZnO nanowire field effect transistors characterized with scanning probes. [Applied Physics Letters 86, 032111 (2005)]. Zhiyong Fan, Jia G. Lu. Abstract. Single nanowires are configured as field effect transistors ...

Si and Ge nanowires and their heterostructure have been received widespread attention in various ... more Si and Ge nanowires and their heterostructure have been received widespread attention in various research fields because of the inherent advantages and the major historical roles played by these materials in contemporary microelectronics. From decades of research on two materials, integrated in-depth knowledge on the nature of material properties and manufacture process provide useful guidelines to design nanostructures and related devices with increased structural and functional complexity. In this dissertation, synthesis and applications of Ge and Si based nanowires and nanotubes in electronics, photonics, biochemical sensor, and thermoelectrics are discussed. In chapter 2, self-organizing characteristics of misfit- guided Ge quantum dots growth on Si core nanowires are systematically demonstrated. Unique Ge quantum dots growth mode caused by strain supperlattice along the Si nanowire backbone can be controlled by the choice of core diameter. Such strain-guided growth opens up a n...

Nano Letters, 2012

Misfit-strain guided growth of periodic quantum dot (QD) arrays in planar thin film epitaxy has b... more Misfit-strain guided growth of periodic quantum dot (QD) arrays in planar thin film epitaxy has been a popular nanostructure fabrication method. Engineering misfit-guided QD growth on a nanoscale substrate such as the small curvature surface of a nanowire represents a new approach to self-organized nanostructure preparation. Perhaps more profoundly, the periodic stress underlying each QD and the resulting modulation of electro-optical properties inside the nanowire backbone promise to provide a new platform for novel mechano-electronic, thermoelectronic, and optoelectronic devices. Herein, we report a first experimental demonstration of self-organized and self-limited growth of coherent, periodic Ge QDs on a one dimensional Si nanowire substrate. Systematic characterizations reveal several distinctively different modes of Ge QD ordering on the Si nanowire substrate depending on the core diameter. In particular, Ge QD arrays on Si nanowires of around 20 nm diameter predominantly exhibit an anti-correlated pattern whose wavelength agrees with theoretical predictions. The correlated pattern can be attributed to propagation and correlation of misfit strain across the diameter of the thin nanowire substrate. The QD array growth is self-limited as the wavelength of the QDs remains unchanged even after prolonged Ge deposition. Furthermore, we demonstrate a direct kinetic transformation from a uniform Ge shell layer to discrete QD arrays by a post-growth annealing process.

ACS Nano

Amorphous Si (a-Si) nanostructures are ubiquitous in numerous electronic and optoelectronic devic... more Amorphous Si (a-Si) nanostructures are ubiquitous in numerous electronic and optoelectronic devices. Amorphous materials are considered to possess the lower limit to the thermal conductivity κ , which is ~1 W.m-1 K-1 for a-Si. However, recent work suggested that κ of micron-thick a-Si films can be greater than 3 W.m-1 K-1 , which is contributed by propagating vibrational modes, referred to as "propagons". However, precise determination of κ in a-Si has been elusive. Here, we used novel structures of a-Si nanotubes and suspended a-Si films that enabled precise in-plane thermal conductivity (∥) measurement within a wide thickness range of 5 nm to 1.7 µm. We showed unexpectedly high ∥ in a-Si nanostructures, reaching ~3.0 and 5.3 W.m-1 K-1 at ~100 nm and 1.7 µm, respectively. Furthermore, the measured ∥ is significantly higher than the cross-plane on the same films. This unusually high and anisotropic thermal conductivity in the amorphous Si nanostructure manifests the surprisingly broad propagon mean free path distribution, which is found to range from 10 nm to 10 µm, in the disordered and atomically isotropic structure. This result provides an unambiguous answer to the century-old problem regarding mean free path distribution of propagons and also sheds light on the design and performance of numerous a-Si based electronic and optoelectronic devices.

Nano Letters

We show that amorphous silica and Si nanotubes can flow at room temperature under Giga-Pascal ord... more We show that amorphous silica and Si nanotubes can flow at room temperature under Giga-Pascal order stress when going to the nanometer scale. This creep behavior is unique for the amorphous nanotubes and is absent in crystalline Si nanotubes of similar dimensions. A core-shell model shows that there exists an approximately 1 nm thick viscoelastic "fluid-like" surface layer, which exhibits a room temperature viscosity equivalent to that of bulk glass above 1000 °C.

Semiconductor Science and Technology

Nanoscale, Jan 21, 2016

Reducing semiconductor materials to sizes comparable to the characteristic lengths of phonons, su... more Reducing semiconductor materials to sizes comparable to the characteristic lengths of phonons, such as the mean-free-path (MFP) and wavelength, has unveiled new physical phenomena and engineering capabilities for thermal energy management and conversion systems. These developments have been enabled by the increasing sophistication of chemical synthesis, microfabrication, and atomistic simulation techniques to understand the underlying mechanisms of phonon transport. Modifying thermal properties by scaling physical size is particularly effective for materials which have large phonon MFPs, such as crystalline Si and Ge. Through nanostructuring, materials that are traditionally good thermal conductors can become good candidates for applications requiring thermal insulation such as thermoelectrics. Precise understanding of nanoscale thermal transport in Si and Ge, the leading materials of the modern semiconductor industry, is increasingly important due to more stringent thermal conditio...

Nanoscale, 2016

Designing optical components such as polarizers on substrates with high mechanical deformability ... more Designing optical components such as polarizers on substrates with high mechanical deformability have potential to realize new device platforms in photonics, wearable electronics, and sensors. Conventional manufacturing approaches that rely highly on topdown lithography, deposition and the etching process can easily confront compatibility issues and high fabrication complexity. Therefore, an alternative integration scheme is necessary. Here, we demonstrate fabrication of highly flexible and stretchable wire grid polarizers (WGPs) by printing bottom-up grown Ge or Ge/Si core/ shell nanowires (NWs) on device substrates in a highly dense and aligned fashion. The maximum contrast ratio of 104 between transverse electric (TE) and transverse magnetic (TM) fields and above 99% (maximum 99.7%) of light blocking efficiency across the visible spectrum range are achieved. Further systematic analyses are performed both in experimental and numerical models to reveal the correspondence between physical factors (coverage ratio of NW arrays and diameter) and polarization efficiency. Moreover, we demonstrate distinctive merits of our approach: (i) high flexibility in the choice of substrates such as glass, plastic, or elastomer; (ii) easy combination with additional novel functionalities, for example, air permeability, flexibility/stretchability, biocompatibility, and a skin-like low mechanical modulus; (iii) selective printing of polarizers on a designated local area. † Electronic supplementary information (ESI) available. See

Nano letters, Jan 16, 2015

Thermal transport behavior in nanostructures has become increasingly important for understanding ... more Thermal transport behavior in nanostructures has become increasingly important for understanding and designing next generation electronic and energy devices. This has fueled vibrant research targeting both the causes and ability to induce extraordinary reductions of thermal conductivity in crystalline materials, which has predominantly been achieved by understanding that the phonon mean free path (MFP) is limited by the characteristic size of crystalline nanostructures, known as the boundary scattering or Casimir limit. Herein, by using a highly sensitive measurement system, we show that crystalline Si (c-Si) nanotubes (NTs) with shell thickness as thin as ∼5 nm exhibit a low thermal conductivity of ∼1.1 W m(-1) K(-1). Importantly, this value is lower than the apparent boundary scattering limit and is even about 30% lower than the measured value for amorphous Si (a-Si) NTs with similar geometries. This finding diverges from the prevailing general notion that amorphous materials repr...

2013 Third Berkeley Symposium on Energy Efficient Electronic Systems (E3S), 2013

71st Device Research Conference, 2013

ABSTRACT Significant physical challenges remain for CMOS technology to increase I on and decrease... more ABSTRACT Significant physical challenges remain for CMOS technology to increase I on and decrease I off as transistor dimension and power supply voltages continue downscaling. For I off , a physical barrier exists as exhibited in the subthreshold slope = |(()/()| = • which is limited to > 60 mV/dec at room temperature due to electron thermal distribution. To circumvent this fundamental thermodynamical limit, we have designed the first integration of semiconductor nanowires (NWs) and nanoelectromechanical system (NEMS) field effect transistor structure (NW-NEMFET). We have previously demonstrated 0.5 ps intrinsic delay and near ballistic operation in quantum confined semiconductor heterostructure NWFETs with diameters less than 15 nm.[1] The current design uses high performance suspended semiconductor NWs as the conduction channel, while the electrostatic pull-in of the NW towards the gate stack enables abrupt switching to the off-state leading to high frequency, low power nanoelectronics. We show that compared to planar suspended-gate FET (SGFET) design [2], NW-NEMFET allows zero SS with 10 15

The effect of varying annealing temperature and Al layer thickness on the structural and electric... more The effect of varying annealing temperature and Al layer thickness on the structural and electrical characteristics of AuPtAlTi/AlGaN/GaN ohmic contact structures has been systematically investigated. The relationship between annealing temperature, Al content, interfacial microstructure, surface planarity and contact resistance is examined. In particular, the presence of a detrimental low temperature Pt-Al reaction is identified. This is implicated in both the requirement for a higher Al:Ti ratio than is required for related AuPdAlTi contact schemes and through the degraded temperature dependent resistance behaviour of the annealed AuPtAlTi contacts.

Nanoscale, 2014

Crystalline silicon nanotubes exhibit high electrical mobility, while demonstrating loading of bi... more Crystalline silicon nanotubes exhibit high electrical mobility, while demonstrating loading of biomolecules inside for the first time.

Nano Letters, 2014

We report the first experimental demonstration of a three-terminal nanoelectromechanical field ef... more We report the first experimental demonstration of a three-terminal nanoelectromechanical field effect transistor (NEMFET) with measurable subthreshold slope as small as 6 mV/dec at room temperature and a switching voltage window of under 2 V. The device operates by modulating drain current through a suspended nanowire channel via an insulated gate electrode, thus eliminating the need for a conducting moving electrode, and yields devices that reliably switch on/off for up to 130 cycles. Radio-frequency measurements have confirmed operation at 125 MHz. Our measurements and simulations suggest that the NEMFET design is scalable toward sub-1 V ultrahigh-frequency operation for future low-power computing systems.

Nano Letters, 2008

Surface-architecture-controlled ZnO nanowires were grown using a vapor transport method on variou... more Surface-architecture-controlled ZnO nanowires were grown using a vapor transport method on various ZnO buffer film coated c-plane sapphire substrates with or without Au catalysts. The ZnO nanowires that were grown showed two different types of geometric properties: corrugated ZnO nanowires having a relatively smaller diameter and a strong deep-level emission photoluminescence (PL) peak and smooth ZnO nanowires having a relatively larger diameter and a weak deep-level emission PL peak. The surface morphology and size-dependent tunable electronic transport properties of the ZnO nanowires were characterized using a nanowire field effect transistor (FET) device structure. The FETs made from smooth ZnO nanowires with a larger diameter exhibited negative threshold voltages, indicating n-channel depletion-mode behavior, whereas those made from corrugated ZnO nanowires with a smaller diameter had positive threshold voltages, indicating n-channel enhancementmode behavior.

IEEE Transactions on Electron Devices, 2000

A review on the tunable electrical properties of ZnO nanowire field-effect transistors (FETs) is ... more A review on the tunable electrical properties of ZnO nanowire field-effect transistors (FETs) is presented. The FETs made from surface-tailored ZnO nanowire exhibit two different types of operation modes, which are distinguished as depletion and enhancement modes in terms of the polarity of the threshold voltage. We demonstrate that the transport properties of ZnO nanowire FETs are associated with the influence of nanowire size and surface roughness associated with the presence of surface trap states at the interfaces as well as the surface chemistry in environments.

Applied Surface Science, 2008

We have systematically investigated the effects of surface roughness on the electrical characteri... more We have systematically investigated the effects of surface roughness on the electrical characteristics of ZnO nanowire field effect transistors (FETs) before and after passivation by poly (methyl metahacrylate)(PMMA), a polymer-insulating layer. To control the surface ...

Applied Physics Letters, 2007

... Seok-In Na, Seok-Soon Kim, Soon-Shin Kwon, Jang Jo, Juhwan Kim, Takhee Lee, Dong-Yu Kim. ... ... more ... Seok-In Na, Seok-Soon Kim, Soon-Shin Kwon, Jang Jo, Juhwan Kim, Takhee Lee, Dong-Yu Kim. ... active layer are achieved by a soft lithographic approach using photoinduced surface-relief gratings (SRGs) on azo polymer films and poly(dimethylsiloxane) as a master and stamp ...

Applied Physics Letters, 2008

We report the effects of gate bias sweep rate on the electronic characteristics of ZnO nanowire f... more We report the effects of gate bias sweep rate on the electronic characteristics of ZnO nanowire field-effect transistors (FETs) under different environments. As the device was swept at slower gate bias sweep rates, the current decreased and threshold voltage shifted to a positive gate bias direction. These phenomena are attributed to increased adsorption of oxygen on the nanowire surface by the longer gate biasing time. Adsorbed oxygens capture electrons and cause a surface depletion in the nanowire channel. Different electrical trends were observed for ZnO nanowire FETs under different oxygen environments of ambient air, N2, and passivation.

Applied Physics Letters, 2005

Electrical properties of ZnO nanowire field effect transistors characterized with scanning probes... more Electrical properties of ZnO nanowire field effect transistors characterized with scanning probes. [Applied Physics Letters 86, 032111 (2005)]. Zhiyong Fan, Jia G. Lu. Abstract. Single nanowires are configured as field effect transistors ...