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Papers by Stefan Lauxtermann

Research paper thumbnail of The SATIN infrared detector development program and the road to HELLSTAR

X-Ray, Optical, and Infrared Detectors for Astronomy X

Research paper thumbnail of A Fully Depleted Backside Illuminated CMOS Imager with VGA Resolution and 15 micron Pixel Pitch

Presented is the development of a monolithic backside illuminated CMOS image sensor with a resolu... more Presented is the development of a monolithic backside illuminated CMOS image sensor with a resolution of 640 x 512 pixels, fabricated on high resistivity silicon. Wafers with fully processed CMOS circuitry on the front side are thinned and a backside contact is added. By applying a bias voltage of 100V to this backside contact, the up to 200 micron thick silicon membrane can be fully depleted and a quantum efficiency up to 60% at a wavelength of 1000nm be achieved. The vertical PIN photodiode is predicted to have a characteristic response time of 2.8 nsec at that thickness and bias voltage, a bulk limited dark current of 4nA/cm at room temperature and can be read out with very little noise due to its small specific capacitance of only a few aF/pixel. With the implemented charge domain 2x2 binning the signal to noise ratio increases by a factor 4, just like in CCD’s. Different from CCDs though, also the frame rate increases by a factor 4 in our CMOS sensor. The highly programmable de...

Research paper thumbnail of active cell with an analog memory for a photosensitive sensor implemented in CMOS technology

The invention concerns a cell comprising a photosensitive element (1), first addressable means (2... more The invention concerns a cell comprising a photosensitive element (1), first addressable means (2) for deactivating said photosensitive element after an exposure phase, second addressable means (9, 10) for, during said exploration phase, retrieving from the cell the luminance signal generated by the photosensitive element, third addressable means (6) for transferring the luminance signal from the photosensitive element to the second addressable means, storage means (cp1 to cp3) for preserving the luminance signal between the exposure phase and the time when the cell is addressed for activating the second addressable means and fourth addressable means (14) for unloading said storage means after the cell has been read. The invention is characterised in that the third (6) and fourth (14) means are placed in a casing arranged in the substrate and having a type of conductivity opposite to that of the substrate.

Research paper thumbnail of CMOS active image sensor with analog memory

Research paper thumbnail of Hybridized MAPS with an in-pixel A-to-D conversion readout ASIC

Nuclear Instruments and Methods in Physics Research Section A: Accelerators, Spectrometers, Detectors and Associated Equipment, 2019

Research paper thumbnail of Radiation Hard CMOS Sensors for Detector at High Energy Colliders

Research paper thumbnail of Low noise correlated double sampling amplifier for 4T technology

Research paper thumbnail of Method for detecting electromagnetic radiation using an optoelectronic sensor

Research paper thumbnail of Active cell with analog storage for a CMOS technology photosensitive sensor

Research paper thumbnail of Imaging system with low noise pixel array column buffer

Research paper thumbnail of Buried via Technology for Three Dimensional Integrated Circuits

Research paper thumbnail of Low noise readout apparatus and method with snapshot shutter and correlated double sampling

Research paper thumbnail of High-sensitivity high-dynamic digital CMOS imager

Research paper thumbnail of A mega-pixel high speed CMOS imager with sustainable Gigapixel/sec readout rate

A high-speed active pixel (APS) imager with a physical resolution of 1024x768 pixels is presented... more A high-speed active pixel (APS) imager with a physical resolution of 1024x768 pixels is presented which acquires up to 1000 frames/sec. The imager has a physical resolution of 1024x768 pixels and acquires up to 1000 frames/sec. The light sensitive photodiodes in the array are arranged in a chessboard like pattern and are color masked with an RGB Bayer pattern. Interpolation then leads to a resolution of 1536x1024 pixels. Analog data are transmitted off-chip through 32 output channels that operate at over 30 MHz each. For electronic exposure control the sensor can be operated with a rolling line as well as a global shutter. Also, the photo response is programmable to have a linear, logarithmic or combined lin-log characteristic. For processing a standard 0.5µm CMOS technology was chosen. The chip has physical dimensions of 14 x 20 mm 2 and dissipates 600 mW at full resolution and maximum speed. The sensor resolution can be reduced without having to modify the analog output rate, as l...

Research paper thumbnail of Sweep Photogate: Optimized Photosensors for Optical Spectrometry in CMOS

I. Limitations of Classical Photosensors C LASSICAL photosensors principally consist of a zero or... more I. Limitations of Classical Photosensors C LASSICAL photosensors principally consist of a zero or reverse biased photodiode connected to an amplify-ing transistor as shown in fig.1. Impinging photons gener-ate electron-hole pairs in the photodiode which are sepa-rated due to the electric field in the space charge region of the pn + -junction. The associated charge transport results in a signal dependent photocurrent i ph = q/t. The transistor either serves as a signal amplifier for the voltage caused by the collected charge on the capacitance at its gate, or it is used as a sense amplifier for a regulation feed-back which produces a constant photodiode voltage and transports the collected charge to a separate conversion node. High resolution and high dynamic range requirements at the typical low light intensities in optical spectrometry demand large photosensitive areas because high levels of signal charge have to be reached in order to avoid shot noise limitations. Large photodiode...

Research paper thumbnail of Automatic in-unit cell offset subtraction for MWIR and LWIR HgCdTe detectors

SPIE Proceedings, 2006

Imaging instruments with state-of-the-art HgCdTe MWIR and LWIR detectors often have limited cooli... more Imaging instruments with state-of-the-art HgCdTe MWIR and LWIR detectors often have limited cooling resources. Therefore, they may need to deal with large detector dark currents and/or optics thermal emission currents. The sum of dark and thermal emission currents form an undesirable "offset" to the desired signal current, which can be orders of magnitude greater than the signal. With modest instrument

Research paper thumbnail of <title>Low-power digital image sensor for still-picture image acquisition</title>

Sensors and Camera Systems for Scientific, Industrial, and Digital Photography Applications II, 2001

ABSTRACT This article presents the design and realization of a CMOS digital image sensor optimize... more ABSTRACT This article presents the design and realization of a CMOS digital image sensor optimized for button-battery powered applications. First, a pixel with local analog memory was designed, allowing efficient sensor global shutter operation. The exposure time becomes independent on the readout speed and a lower readout frequency can be used without causing image distortion. Second, a multi-path readout architecture was developed, allowing an efficient use of the power consumption in sub-sampling modes. These techniques were integrated in a 0.5 um CMOS digital image senor with a resolution of 648 by 648 pixels. The peak supply current is 7 mA for a readout frequency of 4 Mpixel/s at Vdd equals 3V. Die size is 55 mm2 and overall SNR is 55 dB. The global shutter performance was demonstrated by acquiring pictures of fast moving objects without observing any distortion, even at a low readout frequency of 4 MHz.

Research paper thumbnail of Megapixel CMOS imager with charge binning

SPIE Proceedings, 2001

An active pixel sensor array (APS) with programmable resolution was realized in standard 0.5 micr... more An active pixel sensor array (APS) with programmable resolution was realized in standard 0.5 micrometers CMOS technology. For operation under poor lighting conditions, the change of sub-regions of 2 by 2 respectively 4 by 4 pixels can be summed, yielding a corresponding sensitivity enhancement. In that way the maximum resolution of 1024 by 1024 can be reduced to 512 by 512 or 256 by 256. Based on a charge skimming mechanism, the required circuitry can be implemented in any logic CMOS technology without process modifications. Output through 1, 2 or 4 analog channels clocked at a pixel at up to 40 MHz each allows a frame rate up to 160 frames/sec at an overall power dissipation of 70 mW.

Research paper thumbnail of Demodulation pixels in CCD and CMOS technologies for time-of-flight ranging

SPIE Proceedings, 2000

ABSTRACT A new generation of smart pixels, so-called demodulation or lock-in pixels is introduced... more ABSTRACT A new generation of smart pixels, so-called demodulation or lock-in pixels is introduced in this paper. These devices are capable of measuring phase, amplitude and offset of modulated light up to some tens of MHz, making them ideally suited to be used as ...

Research paper thumbnail of Optical characterization methods for solid-state image sensors

Optics and Lasers in Engineering, 2001

The accurate measurement of the optoelectronic properties of imaging sensors is of utmost importa... more The accurate measurement of the optoelectronic properties of imaging sensors is of utmost importance for their appropriate use in various modern application fields, such as in metrology, quality control, environmental monitoring, medicine or for automotive applications. Key sensor parameters include spatial resolution, uniformity, sensitivity, linearity, signal to noise ratio and dynamic range. Today high-end optical systems mostly rely on charge

Research paper thumbnail of The SATIN infrared detector development program and the road to HELLSTAR

X-Ray, Optical, and Infrared Detectors for Astronomy X

Research paper thumbnail of A Fully Depleted Backside Illuminated CMOS Imager with VGA Resolution and 15 micron Pixel Pitch

Presented is the development of a monolithic backside illuminated CMOS image sensor with a resolu... more Presented is the development of a monolithic backside illuminated CMOS image sensor with a resolution of 640 x 512 pixels, fabricated on high resistivity silicon. Wafers with fully processed CMOS circuitry on the front side are thinned and a backside contact is added. By applying a bias voltage of 100V to this backside contact, the up to 200 micron thick silicon membrane can be fully depleted and a quantum efficiency up to 60% at a wavelength of 1000nm be achieved. The vertical PIN photodiode is predicted to have a characteristic response time of 2.8 nsec at that thickness and bias voltage, a bulk limited dark current of 4nA/cm at room temperature and can be read out with very little noise due to its small specific capacitance of only a few aF/pixel. With the implemented charge domain 2x2 binning the signal to noise ratio increases by a factor 4, just like in CCD’s. Different from CCDs though, also the frame rate increases by a factor 4 in our CMOS sensor. The highly programmable de...

Research paper thumbnail of active cell with an analog memory for a photosensitive sensor implemented in CMOS technology

The invention concerns a cell comprising a photosensitive element (1), first addressable means (2... more The invention concerns a cell comprising a photosensitive element (1), first addressable means (2) for deactivating said photosensitive element after an exposure phase, second addressable means (9, 10) for, during said exploration phase, retrieving from the cell the luminance signal generated by the photosensitive element, third addressable means (6) for transferring the luminance signal from the photosensitive element to the second addressable means, storage means (cp1 to cp3) for preserving the luminance signal between the exposure phase and the time when the cell is addressed for activating the second addressable means and fourth addressable means (14) for unloading said storage means after the cell has been read. The invention is characterised in that the third (6) and fourth (14) means are placed in a casing arranged in the substrate and having a type of conductivity opposite to that of the substrate.

Research paper thumbnail of CMOS active image sensor with analog memory

Research paper thumbnail of Hybridized MAPS with an in-pixel A-to-D conversion readout ASIC

Nuclear Instruments and Methods in Physics Research Section A: Accelerators, Spectrometers, Detectors and Associated Equipment, 2019

Research paper thumbnail of Radiation Hard CMOS Sensors for Detector at High Energy Colliders

Research paper thumbnail of Low noise correlated double sampling amplifier for 4T technology

Research paper thumbnail of Method for detecting electromagnetic radiation using an optoelectronic sensor

Research paper thumbnail of Active cell with analog storage for a CMOS technology photosensitive sensor

Research paper thumbnail of Imaging system with low noise pixel array column buffer

Research paper thumbnail of Buried via Technology for Three Dimensional Integrated Circuits

Research paper thumbnail of Low noise readout apparatus and method with snapshot shutter and correlated double sampling

Research paper thumbnail of High-sensitivity high-dynamic digital CMOS imager

Research paper thumbnail of A mega-pixel high speed CMOS imager with sustainable Gigapixel/sec readout rate

A high-speed active pixel (APS) imager with a physical resolution of 1024x768 pixels is presented... more A high-speed active pixel (APS) imager with a physical resolution of 1024x768 pixels is presented which acquires up to 1000 frames/sec. The imager has a physical resolution of 1024x768 pixels and acquires up to 1000 frames/sec. The light sensitive photodiodes in the array are arranged in a chessboard like pattern and are color masked with an RGB Bayer pattern. Interpolation then leads to a resolution of 1536x1024 pixels. Analog data are transmitted off-chip through 32 output channels that operate at over 30 MHz each. For electronic exposure control the sensor can be operated with a rolling line as well as a global shutter. Also, the photo response is programmable to have a linear, logarithmic or combined lin-log characteristic. For processing a standard 0.5µm CMOS technology was chosen. The chip has physical dimensions of 14 x 20 mm 2 and dissipates 600 mW at full resolution and maximum speed. The sensor resolution can be reduced without having to modify the analog output rate, as l...

Research paper thumbnail of Sweep Photogate: Optimized Photosensors for Optical Spectrometry in CMOS

I. Limitations of Classical Photosensors C LASSICAL photosensors principally consist of a zero or... more I. Limitations of Classical Photosensors C LASSICAL photosensors principally consist of a zero or reverse biased photodiode connected to an amplify-ing transistor as shown in fig.1. Impinging photons gener-ate electron-hole pairs in the photodiode which are sepa-rated due to the electric field in the space charge region of the pn + -junction. The associated charge transport results in a signal dependent photocurrent i ph = q/t. The transistor either serves as a signal amplifier for the voltage caused by the collected charge on the capacitance at its gate, or it is used as a sense amplifier for a regulation feed-back which produces a constant photodiode voltage and transports the collected charge to a separate conversion node. High resolution and high dynamic range requirements at the typical low light intensities in optical spectrometry demand large photosensitive areas because high levels of signal charge have to be reached in order to avoid shot noise limitations. Large photodiode...

Research paper thumbnail of Automatic in-unit cell offset subtraction for MWIR and LWIR HgCdTe detectors

SPIE Proceedings, 2006

Imaging instruments with state-of-the-art HgCdTe MWIR and LWIR detectors often have limited cooli... more Imaging instruments with state-of-the-art HgCdTe MWIR and LWIR detectors often have limited cooling resources. Therefore, they may need to deal with large detector dark currents and/or optics thermal emission currents. The sum of dark and thermal emission currents form an undesirable "offset" to the desired signal current, which can be orders of magnitude greater than the signal. With modest instrument

Research paper thumbnail of <title>Low-power digital image sensor for still-picture image acquisition</title>

Sensors and Camera Systems for Scientific, Industrial, and Digital Photography Applications II, 2001

ABSTRACT This article presents the design and realization of a CMOS digital image sensor optimize... more ABSTRACT This article presents the design and realization of a CMOS digital image sensor optimized for button-battery powered applications. First, a pixel with local analog memory was designed, allowing efficient sensor global shutter operation. The exposure time becomes independent on the readout speed and a lower readout frequency can be used without causing image distortion. Second, a multi-path readout architecture was developed, allowing an efficient use of the power consumption in sub-sampling modes. These techniques were integrated in a 0.5 um CMOS digital image senor with a resolution of 648 by 648 pixels. The peak supply current is 7 mA for a readout frequency of 4 Mpixel/s at Vdd equals 3V. Die size is 55 mm2 and overall SNR is 55 dB. The global shutter performance was demonstrated by acquiring pictures of fast moving objects without observing any distortion, even at a low readout frequency of 4 MHz.

Research paper thumbnail of Megapixel CMOS imager with charge binning

SPIE Proceedings, 2001

An active pixel sensor array (APS) with programmable resolution was realized in standard 0.5 micr... more An active pixel sensor array (APS) with programmable resolution was realized in standard 0.5 micrometers CMOS technology. For operation under poor lighting conditions, the change of sub-regions of 2 by 2 respectively 4 by 4 pixels can be summed, yielding a corresponding sensitivity enhancement. In that way the maximum resolution of 1024 by 1024 can be reduced to 512 by 512 or 256 by 256. Based on a charge skimming mechanism, the required circuitry can be implemented in any logic CMOS technology without process modifications. Output through 1, 2 or 4 analog channels clocked at a pixel at up to 40 MHz each allows a frame rate up to 160 frames/sec at an overall power dissipation of 70 mW.

Research paper thumbnail of Demodulation pixels in CCD and CMOS technologies for time-of-flight ranging

SPIE Proceedings, 2000

ABSTRACT A new generation of smart pixels, so-called demodulation or lock-in pixels is introduced... more ABSTRACT A new generation of smart pixels, so-called demodulation or lock-in pixels is introduced in this paper. These devices are capable of measuring phase, amplitude and offset of modulated light up to some tens of MHz, making them ideally suited to be used as ...

Research paper thumbnail of Optical characterization methods for solid-state image sensors

Optics and Lasers in Engineering, 2001

The accurate measurement of the optoelectronic properties of imaging sensors is of utmost importa... more The accurate measurement of the optoelectronic properties of imaging sensors is of utmost importance for their appropriate use in various modern application fields, such as in metrology, quality control, environmental monitoring, medicine or for automotive applications. Key sensor parameters include spatial resolution, uniformity, sensitivity, linearity, signal to noise ratio and dynamic range. Today high-end optical systems mostly rely on charge