Steven Redant - Academia.edu (original) (raw)

Papers by Steven Redant

This paper describes a mixed-signal LEON3FT microcontroller ASIC (Application Specific Integrated... more This paper describes a mixed-signal LEON3FT microcontroller ASIC (Application Specific Integrated Circuit) targeting embedded control applications with hard real-time requirements. The prototype device is currently in development at Cobham Gaisler, Sweden, and IMEC, Belgium, in the activity Microcontroller for embedded space applications, initiated and funded by the European Space Agency (ESA). The presentation and paper will describe the architecture and functionality of the device. This abstract describes an on-going development where the devices are in the architectural design stage before detailed implementation phase. The presentation and final paper will contain further details on the device and will describe the latest progress made within the activity.

1. Abstract Future cochlear implant devices demand an ultra low power, high performance signal pr... more 1. Abstract Future cochlear implant devices demand an ultra low power, high performance signal processing unit to enhance the patient's comfort, to optimize the speech intelligibility and to improve sound quality. To meet this goal, the Champ-LP chip with a DSP-pool of 16 ...

ELECTRONICS: Science, Technology, Business, 2018

Recent trends show the growing need for more analog, mixed-signal and high-voltage IP to enhance ... more Recent trends show the growing need for more analog, mixed-signal and high-voltage IP to enhance the intelligence and reduce the cost of satellites. This paper presents the set of radiation hard, mixed-signal and high-voltage IP that is part of the imec DARE solution and that is developed in UMC 0.18um, XFAB XH018 and On Semiconductor i3t80 technology. The IP is conceived to enable rad-hard SoC developments and consists of ADCs, PLLs, clocks, linear regulators, bandgap references with current reference and temperature sensors, high-voltage DCDC converters to convert the satellite main supply to analog and digital on-chip voltages and several high-power and high-voltage switches and drivers. The IP is versatile to be useful in a myriad of applications and is part of the DARE platform. The IP in UMC 0.18um has been successfully silicon proven and radiation tested. First-time-right radiation hardness is achieved through a proprietary under-radiation simulation approach developed by ICs...

Recent trends show the growing need for more analog and mixed-signal IP to enhance the intelligen... more Recent trends show the growing need for more analog and mixed-signal IP to enhance the intelligence and reduce the cost of satellites. This paper presents the current state of the imec DARE solution with a focus on the strong increase in mixed-signal and analog IP blocks. In addition, the DARE solution is being extended to high-voltage technology targeting a similar mixed-signal IP offering in a different foundry technology. First the recent improvements and additions to the DARE library are presented. Secondly radiation test results on technology level are presented showing the extensive level of analogue characterization of the DARE solution. The mixed-signal expansion is illustrated with a software controlled SOC ASIC project. This ASIC contains, amongst others, improved, hardened PLL and ADC blocks. These blocks will be discussed together with the under-radiation simulation approach. DARE+ ACTIVITY The Design Against Radiation Effects (DARE) library is being further developed in...

Previously there have been difficulties in accurately establishing the time correlation between e... more Previously there have been difficulties in accurately establishing the time correlation between events reported on ground via packet telemetry data and their actual time of occurrence in an onboard application. The Local Time Management System is a radiation hard component enabling users to overcome this problem by time stamping data at source. The high resolution and precision of the local time reference, with which data may be time stamped, is maintained automatically by this new component. 1 INTRODUCTION With the advent of packet telemetry, the time correlation between the generation of onboard data and its reception on ground has become more complex compared to previous use of fixed frame protocols. Packet telemetry allows dynamic bandwidth allocation schemes, buffering etc., making it flexible and adaptable. This however leads to an asynchronous delivery system which is no longer fully deterministic in that the sampling instant is not related to a position in the transfer frame...

This paper presents the LEONDARE device, a new generation of processor perfectly suitable for spa... more This paper presents the LEONDARE device, a new generation of processor perfectly suitable for spacecraft control and instrument applications. Around a Gaisler LEON3-FT processor and its associated AMBA 2.0 bus, it implements peripherals such as a dual SpaceWire link supporting the Remote Memory Access Protocol (RMAP), a CAN Bus 2.0 Controller with redundant bus interfaces, UARTs with Debug Support Unit and a memory controller with EDAC interfacing PROM, SRAM and SDRAM. The design is manufactured using the Design Against Radiation Effects (DARE) developed under European Space Agency (ESA) funds in a UMC 0.18 commercial process. Validation and evaluation phase following ESA standards are part of the LEONDARE development.

Development of a dedicated parallel DSP-core system for hearing implant applications

This paper describes a low power low noise mixed analog-digital PDFE (particle detector front-end... more This paper describes a low power low noise mixed analog-digital PDFE (particle detector front-end) custom chip developed by IMEC for ESA and intended for scientific energetic particle space born instrumentation (spectroscopy). The ASIC (application-specific integrated circuit) is designed in a standard 0.7-µm CMOS process. The chip comprises a charge sensitive amplifier, a semi-gaussian pulse-shaping amplifier, a peak detector, a discriminator, an 8-bit ADC and control logic. A second channel is provided for (anti-)coincidence purposes. For cost reasons the circuit is made as versatile as possible by providing several digitally programmable configurations. ENC (equivalent noise charge) is 800eØUPV DW S) GHWHFWRU FDSDFLWDQFH Q$ GHWHFWRU OHDNDJH DQG D VKDSHU SHDNLQJ WLPH RI µs. Conversion gain is 30mV/fC and full scale input is 0.1pC. Power consumption is 50mW when all blocks are enabled; power supply is 5V. The die area measures 31mm². A baseline shift of 15mV is realised at 250Ksamples/s (this is the maximum counting rate) for inputs limited to 2.5fC and at 25Ksamples/s for full scale inputs. Radiation hardness is implemented both at the transistor level and at the architectural level. lists the main specifications.

Future cochlear implant devices demand an ultra low power, high performance signal processing uni... more Future cochlear implant devices demand an ultra low power, high performance signal processing unit to enhance the patient's comfort, to optimize the speech intelligibility and to improve sound quality. To meet this goal, the CHAMP-LP1 speech processor chip was developed using low power design techniques and dedicated processing architectures. This paper presents a few of the techniques used to meet

2014 International SpaceWire Conference (SpaceWire), 2014

IEEE Transactions on Nuclear Science, 2000

This paper describes the first use of a Radiation Hardened by Design (DARE: Design Against Radiat... more This paper describes the first use of a Radiation Hardened by Design (DARE: Design Against Radiation Effects) library for the UMC 180 nm CMOS six-layer metal technology in a telecom application specific integrated circuit (ASIC). An innovative adapted "design for test" approach has been used to allow the evaluation of the behavior of this ASIC under radiation. Radiation tests results and conclusions on future use of this library are also presented.

This paper presents the LEONDARE device, a new generation of processor perfectly suitable for spa... more This paper presents the LEONDARE device, a new generation of processor perfectly suitable for spacecraft control and instrument applications. Around a Gaisler LEON3-FT processor and its associated AMBA 2.0 bus, it implements peripherals such as a dual SpaceWire link supporting the Remote Memory Access Protocol (RMAP), a CAN Bus 2.0 Controller with redundant bus interfaces, UARTs with Debug Support Unit and a memory controller with EDAC interfacing PROM, SRAM and SDRAM. The design is manufactured using the Design Against Radiation Effects (DARE) developed under European Space Agency (ESA) funds in a UMC 0.18 commercial process. Validation and evaluation phase following ESA standards are part of the LEONDARE development.

This paper describes a mixed-signal LEON3FT microcontroller ASIC (Application Specific Integrated... more This paper describes a mixed-signal LEON3FT microcontroller ASIC (Application Specific Integrated Circuit) targeting embedded control applications with hard real-time requirements. The prototype device is currently in development at Cobham Gaisler, Sweden, and IMEC, Belgium, in the activity Microcontroller for embedded space applications, initiated and funded by the European Space Agency (ESA). The presentation and paper will describe the architecture and functionality of the device. This abstract describes an on-going development where the devices are in the architectural design stage before detailed implementation phase. The presentation and final paper will contain further details on the device and will describe the latest progress made within the activity.

1. Abstract Future cochlear implant devices demand an ultra low power, high performance signal pr... more 1. Abstract Future cochlear implant devices demand an ultra low power, high performance signal processing unit to enhance the patient's comfort, to optimize the speech intelligibility and to improve sound quality. To meet this goal, the Champ-LP chip with a DSP-pool of 16 ...

ELECTRONICS: Science, Technology, Business, 2018

Recent trends show the growing need for more analog, mixed-signal and high-voltage IP to enhance ... more Recent trends show the growing need for more analog, mixed-signal and high-voltage IP to enhance the intelligence and reduce the cost of satellites. This paper presents the set of radiation hard, mixed-signal and high-voltage IP that is part of the imec DARE solution and that is developed in UMC 0.18um, XFAB XH018 and On Semiconductor i3t80 technology. The IP is conceived to enable rad-hard SoC developments and consists of ADCs, PLLs, clocks, linear regulators, bandgap references with current reference and temperature sensors, high-voltage DCDC converters to convert the satellite main supply to analog and digital on-chip voltages and several high-power and high-voltage switches and drivers. The IP is versatile to be useful in a myriad of applications and is part of the DARE platform. The IP in UMC 0.18um has been successfully silicon proven and radiation tested. First-time-right radiation hardness is achieved through a proprietary under-radiation simulation approach developed by ICs...

Recent trends show the growing need for more analog and mixed-signal IP to enhance the intelligen... more Recent trends show the growing need for more analog and mixed-signal IP to enhance the intelligence and reduce the cost of satellites. This paper presents the current state of the imec DARE solution with a focus on the strong increase in mixed-signal and analog IP blocks. In addition, the DARE solution is being extended to high-voltage technology targeting a similar mixed-signal IP offering in a different foundry technology. First the recent improvements and additions to the DARE library are presented. Secondly radiation test results on technology level are presented showing the extensive level of analogue characterization of the DARE solution. The mixed-signal expansion is illustrated with a software controlled SOC ASIC project. This ASIC contains, amongst others, improved, hardened PLL and ADC blocks. These blocks will be discussed together with the under-radiation simulation approach. DARE+ ACTIVITY The Design Against Radiation Effects (DARE) library is being further developed in...

Previously there have been difficulties in accurately establishing the time correlation between e... more Previously there have been difficulties in accurately establishing the time correlation between events reported on ground via packet telemetry data and their actual time of occurrence in an onboard application. The Local Time Management System is a radiation hard component enabling users to overcome this problem by time stamping data at source. The high resolution and precision of the local time reference, with which data may be time stamped, is maintained automatically by this new component. 1 INTRODUCTION With the advent of packet telemetry, the time correlation between the generation of onboard data and its reception on ground has become more complex compared to previous use of fixed frame protocols. Packet telemetry allows dynamic bandwidth allocation schemes, buffering etc., making it flexible and adaptable. This however leads to an asynchronous delivery system which is no longer fully deterministic in that the sampling instant is not related to a position in the transfer frame...

This paper presents the LEONDARE device, a new generation of processor perfectly suitable for spa... more This paper presents the LEONDARE device, a new generation of processor perfectly suitable for spacecraft control and instrument applications. Around a Gaisler LEON3-FT processor and its associated AMBA 2.0 bus, it implements peripherals such as a dual SpaceWire link supporting the Remote Memory Access Protocol (RMAP), a CAN Bus 2.0 Controller with redundant bus interfaces, UARTs with Debug Support Unit and a memory controller with EDAC interfacing PROM, SRAM and SDRAM. The design is manufactured using the Design Against Radiation Effects (DARE) developed under European Space Agency (ESA) funds in a UMC 0.18 commercial process. Validation and evaluation phase following ESA standards are part of the LEONDARE development.

Development of a dedicated parallel DSP-core system for hearing implant applications

This paper describes a low power low noise mixed analog-digital PDFE (particle detector front-end... more This paper describes a low power low noise mixed analog-digital PDFE (particle detector front-end) custom chip developed by IMEC for ESA and intended for scientific energetic particle space born instrumentation (spectroscopy). The ASIC (application-specific integrated circuit) is designed in a standard 0.7-µm CMOS process. The chip comprises a charge sensitive amplifier, a semi-gaussian pulse-shaping amplifier, a peak detector, a discriminator, an 8-bit ADC and control logic. A second channel is provided for (anti-)coincidence purposes. For cost reasons the circuit is made as versatile as possible by providing several digitally programmable configurations. ENC (equivalent noise charge) is 800eØUPV DW S) GHWHFWRU FDSDFLWDQFH Q$ GHWHFWRU OHDNDJH DQG D VKDSHU SHDNLQJ WLPH RI µs. Conversion gain is 30mV/fC and full scale input is 0.1pC. Power consumption is 50mW when all blocks are enabled; power supply is 5V. The die area measures 31mm². A baseline shift of 15mV is realised at 250Ksamples/s (this is the maximum counting rate) for inputs limited to 2.5fC and at 25Ksamples/s for full scale inputs. Radiation hardness is implemented both at the transistor level and at the architectural level. lists the main specifications.

Future cochlear implant devices demand an ultra low power, high performance signal processing uni... more Future cochlear implant devices demand an ultra low power, high performance signal processing unit to enhance the patient's comfort, to optimize the speech intelligibility and to improve sound quality. To meet this goal, the CHAMP-LP1 speech processor chip was developed using low power design techniques and dedicated processing architectures. This paper presents a few of the techniques used to meet

2014 International SpaceWire Conference (SpaceWire), 2014

IEEE Transactions on Nuclear Science, 2000

This paper describes the first use of a Radiation Hardened by Design (DARE: Design Against Radiat... more This paper describes the first use of a Radiation Hardened by Design (DARE: Design Against Radiation Effects) library for the UMC 180 nm CMOS six-layer metal technology in a telecom application specific integrated circuit (ASIC). An innovative adapted "design for test" approach has been used to allow the evaluation of the behavior of this ASIC under radiation. Radiation tests results and conclusions on future use of this library are also presented.

This paper presents the LEONDARE device, a new generation of processor perfectly suitable for spa... more This paper presents the LEONDARE device, a new generation of processor perfectly suitable for spacecraft control and instrument applications. Around a Gaisler LEON3-FT processor and its associated AMBA 2.0 bus, it implements peripherals such as a dual SpaceWire link supporting the Remote Memory Access Protocol (RMAP), a CAN Bus 2.0 Controller with redundant bus interfaces, UARTs with Debug Support Unit and a memory controller with EDAC interfacing PROM, SRAM and SDRAM. The design is manufactured using the Design Against Radiation Effects (DARE) developed under European Space Agency (ESA) funds in a UMC 0.18 commercial process. Validation and evaluation phase following ESA standards are part of the LEONDARE development.