Takatomo ENOKI - Academia.edu (original) (raw)
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Papers by Takatomo ENOKI
Proceedings of the Society Conference of IEICE, Aug 29, 2001
16th IPRM. 2004 International Conference on Indium Phosphide and Related Materials, 2004.
In this paper we present the correlation between the impact ionization gate current with the S22 ... more In this paper we present the correlation between the impact ionization gate current with the S22 scattering parameter measured in the 50 MHz - 6 GHz frequency range in InAlAs/InGaAs/InP HEMTs. Devices with shorter gate length presenting larger I.I. gate current have shown larger inductive component in the output admittance Y22 at low frequencies.
This paper presents state-of-the-art ultra-high-speed InP-based heterostructure de vice technolog... more This paper presents state-of-the-art ultra-high-speed InP-based heterostructure de vice technologies. InP-based HFET (Heterostructure Field-Effect Transistors) and HBT (Heterojunction Bipolar Transistors) device technologies are discussed with application to integrated circuits and optoelectronic integrated circuits.
Extended Abstracts of the 2004 International Conference on Solid State Devices and Materials, 2004
Extended Abstracts of the 2004 International Conference on Solid State Devices and Materials, 2004
Extended Abstracts of the1985 Conference on Solid State Devices and Materials, 1985
Proceedings of International Electron Devices Meeting
Forty-GHz operation of SCFL static binary frequency dividers is demonstrated by monolithically in... more Forty-GHz operation of SCFL static binary frequency dividers is demonstrated by monolithically integrating 0.1-μm-gate InAlAs/InGaAs HEMTs and p-n diodes for the first time. The HEMT has an InP-recess-etch stopper in the InAlAs barrier and the standard deviation of the threshold voltage in a 2-inch wafer is reduced to 44 mV. The p-n diode is used as a level-shift diode because
physica status solidi (a), 2006
Microwave and Optical Technology Letters, 1996
Japanese Journal of Applied Physics, 1999
IEEE Transactions on Electron Devices, 1986
The circuit design, fabrication, and performance of ultra-high-frequency dividers with buffer FET... more The circuit design, fabrication, and performance of ultra-high-frequency dividers with buffer FET logic (BFL) circuits are described. Using air-bridge technology and a new, self-aligned-gate, GaAs FET process, called advanced SAINT, which avoids excess gate metal overlap on the dielectric film, 10.6-GHz operation at 258 mW is achieved. This performance is made possible by a reduction of gate and interconnection parasitic capacitance. Furthermore, the possibility of operation above 20 GHz for GaAs MESFET frequency dividers is predicted on the basis of circuit optimization and FET improvements including parasitic capacitance reduction and transconductance enhancement.
IEEE Transactions on Electron Devices, 2002
IEEE Transactions on Electron Devices, 2007
IEEE Transactions on Electron Devices, 1996
IEEE Transactions on Device and Materials Reliability, 2008
We examined the issue of reliability of InP-based high-electron mobility transistors (HEMTs), foc... more We examined the issue of reliability of InP-based high-electron mobility transistors (HEMTs), focusing on the increase of drain resistance Rd. In investigations of the mechanism of Rd increase, we took note of contaminant incorporation and of the relations between the device lifetime and the strength of the channel electric field. In the fabrication process, reducing contaminants, especially fluorine, significantly suppressed the increase of source and drain resistances. Cross-sectional views of the gate of improved devices, which had a long lifetime, confirmed an almost contaminant-free surface around the gate. In acceleration tests, the most negative impact on drain resistance stability among several bias conditions was found when the current density was high and the channel electric field was large at the same time. The dependence of drain-gate electric field strength E showed that the device lifetimes of HEMTs determined from Rd increase obeyed exp(1/E), which means that impact ionization was the main cause of degradation. We elucidate that the interactions of hot carriers with contaminants around the gate are the main causes of the Rd increase in HEMTs. Suppression of device degradation was achieved by optimizing the fabrication process around the gate. In this way, device lifetime was remarkably enhanced.
IEEE Microwave and Guided Wave Letters, 1996
IEEE Microwave and Guided Wave Letters, 1994
Proceedings of the Society Conference of IEICE, Aug 29, 2001
16th IPRM. 2004 International Conference on Indium Phosphide and Related Materials, 2004.
In this paper we present the correlation between the impact ionization gate current with the S22 ... more In this paper we present the correlation between the impact ionization gate current with the S22 scattering parameter measured in the 50 MHz - 6 GHz frequency range in InAlAs/InGaAs/InP HEMTs. Devices with shorter gate length presenting larger I.I. gate current have shown larger inductive component in the output admittance Y22 at low frequencies.
This paper presents state-of-the-art ultra-high-speed InP-based heterostructure de vice technolog... more This paper presents state-of-the-art ultra-high-speed InP-based heterostructure de vice technologies. InP-based HFET (Heterostructure Field-Effect Transistors) and HBT (Heterojunction Bipolar Transistors) device technologies are discussed with application to integrated circuits and optoelectronic integrated circuits.
Extended Abstracts of the 2004 International Conference on Solid State Devices and Materials, 2004
Extended Abstracts of the 2004 International Conference on Solid State Devices and Materials, 2004
Extended Abstracts of the1985 Conference on Solid State Devices and Materials, 1985
Proceedings of International Electron Devices Meeting
Forty-GHz operation of SCFL static binary frequency dividers is demonstrated by monolithically in... more Forty-GHz operation of SCFL static binary frequency dividers is demonstrated by monolithically integrating 0.1-μm-gate InAlAs/InGaAs HEMTs and p-n diodes for the first time. The HEMT has an InP-recess-etch stopper in the InAlAs barrier and the standard deviation of the threshold voltage in a 2-inch wafer is reduced to 44 mV. The p-n diode is used as a level-shift diode because
physica status solidi (a), 2006
Microwave and Optical Technology Letters, 1996
Japanese Journal of Applied Physics, 1999
IEEE Transactions on Electron Devices, 1986
The circuit design, fabrication, and performance of ultra-high-frequency dividers with buffer FET... more The circuit design, fabrication, and performance of ultra-high-frequency dividers with buffer FET logic (BFL) circuits are described. Using air-bridge technology and a new, self-aligned-gate, GaAs FET process, called advanced SAINT, which avoids excess gate metal overlap on the dielectric film, 10.6-GHz operation at 258 mW is achieved. This performance is made possible by a reduction of gate and interconnection parasitic capacitance. Furthermore, the possibility of operation above 20 GHz for GaAs MESFET frequency dividers is predicted on the basis of circuit optimization and FET improvements including parasitic capacitance reduction and transconductance enhancement.
IEEE Transactions on Electron Devices, 2002
IEEE Transactions on Electron Devices, 2007
IEEE Transactions on Electron Devices, 1996
IEEE Transactions on Device and Materials Reliability, 2008
We examined the issue of reliability of InP-based high-electron mobility transistors (HEMTs), foc... more We examined the issue of reliability of InP-based high-electron mobility transistors (HEMTs), focusing on the increase of drain resistance Rd. In investigations of the mechanism of Rd increase, we took note of contaminant incorporation and of the relations between the device lifetime and the strength of the channel electric field. In the fabrication process, reducing contaminants, especially fluorine, significantly suppressed the increase of source and drain resistances. Cross-sectional views of the gate of improved devices, which had a long lifetime, confirmed an almost contaminant-free surface around the gate. In acceleration tests, the most negative impact on drain resistance stability among several bias conditions was found when the current density was high and the channel electric field was large at the same time. The dependence of drain-gate electric field strength E showed that the device lifetimes of HEMTs determined from Rd increase obeyed exp(1/E), which means that impact ionization was the main cause of degradation. We elucidate that the interactions of hot carriers with contaminants around the gate are the main causes of the Rd increase in HEMTs. Suppression of device degradation was achieved by optimizing the fabrication process around the gate. In this way, device lifetime was remarkably enhanced.
IEEE Microwave and Guided Wave Letters, 1996
IEEE Microwave and Guided Wave Letters, 1994