Carl Taussig - Academia.edu (original) (raw)

Papers by Carl Taussig

La presente invention concerne la fabrication de circuit qui utilise un masque multiniveau pour p... more La presente invention concerne la fabrication de circuit qui utilise un masque multiniveau pour produire le motif d'une premiere couche de conducteur d'un circuit multicouche. Le premier conducteur produisant le motif doit procurer une isolation electrique entre la premiere couche de conducteur et une seconde couche de conducteur, de sorte que l'une d'elles recouvre le masque multiniveau et se trouve au-dessous du masque multiniveau. Quand la seconde couche de conducteur recouvre le masque multiniveau, l'isolation electrique est procuree par coupe inferieure du masque multiniveau. De maniere alternative, quand le second conducteur se trouve au-dessous du masque multiniveau, le premier conducteur contient un conducteur a intervalles pontes et l'isolation electrique peut etre procuree par le conducteur a intervalles pontes et par une couche isolante entre la seconde couche de conducteur et la premiere couche de conducteur.

The concept of magnetically active regeneration is explored in a prototype magnetic refrigerator ... more The concept of magnetically active regeneration is explored in a prototype magnetic refrigerator which has produced a refrigeration of 0.40 W at 3.79 K while rejecting 3.0 W to a 5.51 K sink. The prototype refrigerator consists of a gadolinium-gallium-garnet(Gd(3)Ga(5)O(12))regenerator core excited by an AC superconducting solenoid. A reversing flow of 3 atm supercritical helium carries the heat of magnetization to the hot reservoir and refrigerates the cold reservoir with the cooling of demagnetization.

A method for generating a plurality of thin-film devices, comprising the steps of: Providing (110... more A method for generating a plurality of thin-film devices, comprising the steps of: Providing (110) a flexible substrate (401; 515; 1115); and Using (120) a self-aligned imprint lithography process to the plurality of thin-film devices (410) on the flexible substrate (401; 515; 1115) to generate wherein the self-aligned imprint lithography process comprising the steps of: Depositing (121) a sequence of layers (402-405; 511-514; 1111-1114) from a plurality of materials on the flexible substrate (401; 515; 1115); Forming (122) a three-dimensional mask (510; 1110) over the sequence of layers (402-405; 511-514; 1111-1114), the three-dimensional mask (510; 1110) having a plurality of portions having different thicknesses; and Patterning (123) the sequence of layers (402-405; 511- 514; 1111-1114) according to the desired characteristics of the plurality of thin-film devices (410) using the three-dimensional mask (510; 1110), wherein the sequence of layers (402-405; 511-514; 1111-1114) is s...

A microelectromechanical system comprises a first wafer, a second wafer comprising a movable port... more A microelectromechanical system comprises a first wafer, a second wafer comprising a movable portion, and a third wafer. The movable portion is movable between the first wafer and the third wafer. The first wafer, the second wafer and the third wafer bonded to each other.

SID Symposium Digest of Technical Papers, 2013

Self-aligned imprint lithography (SAIL) is currently being upgraded to a next stage to better add... more Self-aligned imprint lithography (SAIL) is currently being upgraded to a next stage to better address the needs for rollto-roll compatible manufacturing of large-sized flexible OLED display backplanes. Cu and oxide semiconductors are preferred choices of materials, and control of process and yield becomes even more important an issue.

ECS Transactions, 2007

This paper presents Self-Aligned Imprint Lithography (SAIL), a technology for producing submicron... more This paper presents Self-Aligned Imprint Lithography (SAIL), a technology for producing submicron layer-to-layer alignments on large, dimensionally variable flexible plastic structures. The roll-to-roll compatible process is used to make 1 μm channel length transistors and active matrix arrays using a-Si and zinc-tin-oxide (ZTO) with electrical characteristics that nearly match those obtained using photolithography. The remaining issues for commercialization are discussed

Journal of Nanoscience and Nanotechnology, 2010

This paper describes an approach of combining nanofabrication techniques with roll-to-roll fabric... more This paper describes an approach of combining nanofabrication techniques with roll-to-roll fabrication of thin film transistor backplanes for flexible display applications.

PURPOSE: An addressing circuitry is provided to access a memory device in a crossing-point diode ... more PURPOSE: An addressing circuitry is provided to access a memory device in a crossing-point diode memory array by creating circuit elements at the crossing-points of two layers of electrode conductors that are separated by a layer of a semiconductor material. CONSTITUTION: The circuit elements formed at the crossing-points functions as data storage devices in the memory array, and function as connections for a permuted addressing scheme for addressing the elements in the memory array. The electrode conductors are fabricated with a controlled geometry at selected crossing-points such that selected circuit elements have increased or decreased cross-sectional area, so that the addressing circuitry is constructed. The electrical characteristics(e.g. resistance) of selected circuit elements can be changed according to the controlled electrode geometry by applying a programming electrical signal to the electrodes.

La presente invention concerne la fabrication de circuit qui utilise un masque multiniveau pour p... more La presente invention concerne la fabrication de circuit qui utilise un masque multiniveau pour produire le motif d'une premiere couche de conducteur d'un circuit multicouche. Le premier conducteur produisant le motif doit procurer une isolation electrique entre la premiere couche de conducteur et une seconde couche de conducteur, de sorte que l'une d'elles recouvre le masque multiniveau et se trouve au-dessous du masque multiniveau. Quand la seconde couche de conducteur recouvre le masque multiniveau, l'isolation electrique est procuree par coupe inferieure du masque multiniveau. De maniere alternative, quand le second conducteur se trouve au-dessous du masque multiniveau, le premier conducteur contient un conducteur a intervalles pontes et l'isolation electrique peut etre procuree par le conducteur a intervalles pontes et par une couche isolante entre la seconde couche de conducteur et la premiere couche de conducteur.

The concept of magnetically active regeneration is explored in a prototype magnetic refrigerator ... more The concept of magnetically active regeneration is explored in a prototype magnetic refrigerator which has produced a refrigeration of 0.40 W at 3.79 K while rejecting 3.0 W to a 5.51 K sink. The prototype refrigerator consists of a gadolinium-gallium-garnet(Gd(3)Ga(5)O(12))regenerator core excited by an AC superconducting solenoid. A reversing flow of 3 atm supercritical helium carries the heat of magnetization to the hot reservoir and refrigerates the cold reservoir with the cooling of demagnetization.

A method for generating a plurality of thin-film devices, comprising the steps of: Providing (110... more A method for generating a plurality of thin-film devices, comprising the steps of: Providing (110) a flexible substrate (401; 515; 1115); and Using (120) a self-aligned imprint lithography process to the plurality of thin-film devices (410) on the flexible substrate (401; 515; 1115) to generate wherein the self-aligned imprint lithography process comprising the steps of: Depositing (121) a sequence of layers (402-405; 511-514; 1111-1114) from a plurality of materials on the flexible substrate (401; 515; 1115); Forming (122) a three-dimensional mask (510; 1110) over the sequence of layers (402-405; 511-514; 1111-1114), the three-dimensional mask (510; 1110) having a plurality of portions having different thicknesses; and Patterning (123) the sequence of layers (402-405; 511- 514; 1111-1114) according to the desired characteristics of the plurality of thin-film devices (410) using the three-dimensional mask (510; 1110), wherein the sequence of layers (402-405; 511-514; 1111-1114) is s...

A microelectromechanical system comprises a first wafer, a second wafer comprising a movable port... more A microelectromechanical system comprises a first wafer, a second wafer comprising a movable portion, and a third wafer. The movable portion is movable between the first wafer and the third wafer. The first wafer, the second wafer and the third wafer bonded to each other.

SID Symposium Digest of Technical Papers, 2013

Self-aligned imprint lithography (SAIL) is currently being upgraded to a next stage to better add... more Self-aligned imprint lithography (SAIL) is currently being upgraded to a next stage to better address the needs for rollto-roll compatible manufacturing of large-sized flexible OLED display backplanes. Cu and oxide semiconductors are preferred choices of materials, and control of process and yield becomes even more important an issue.

ECS Transactions, 2007

This paper presents Self-Aligned Imprint Lithography (SAIL), a technology for producing submicron... more This paper presents Self-Aligned Imprint Lithography (SAIL), a technology for producing submicron layer-to-layer alignments on large, dimensionally variable flexible plastic structures. The roll-to-roll compatible process is used to make 1 μm channel length transistors and active matrix arrays using a-Si and zinc-tin-oxide (ZTO) with electrical characteristics that nearly match those obtained using photolithography. The remaining issues for commercialization are discussed

Journal of Nanoscience and Nanotechnology, 2010

This paper describes an approach of combining nanofabrication techniques with roll-to-roll fabric... more This paper describes an approach of combining nanofabrication techniques with roll-to-roll fabrication of thin film transistor backplanes for flexible display applications.

PURPOSE: An addressing circuitry is provided to access a memory device in a crossing-point diode ... more PURPOSE: An addressing circuitry is provided to access a memory device in a crossing-point diode memory array by creating circuit elements at the crossing-points of two layers of electrode conductors that are separated by a layer of a semiconductor material. CONSTITUTION: The circuit elements formed at the crossing-points functions as data storage devices in the memory array, and function as connections for a permuted addressing scheme for addressing the elements in the memory array. The electrode conductors are fabricated with a controlled geometry at selected crossing-points such that selected circuit elements have increased or decreased cross-sectional area, so that the addressing circuitry is constructed. The electrical characteristics(e.g. resistance) of selected circuit elements can be changed according to the controlled electrode geometry by applying a programming electrical signal to the electrodes.