Theodore Antonakopoulos - Academia.edu (original) (raw)

Papers by Theodore Antonakopoulos

The aim of this paper is to present a flexible and versatile environment for developing, analyzin... more The aim of this paper is to present a flexible and versatile environment for developing, analyzing and prototyping dat a communication and signal processing systems. This envi- ronment is based on the Matlab/Simulink tools and a recon- figurable hardware platform that includes reprogrammable and digital processing circuits. The hardware platform communicates with the Matlab workspace via a dynamic data exchange

The concept of pDSL networking, presented in this work, facilitates the realization of high speed... more The concept of pDSL networking, presented in this work, facilitates the realization of high speed broadband communications over power lines in the indoor environment. A pDSL network consists of a set of virtual high-speed links between a PLC Gateway and multiple pDSL devices. pDSL devices exploit a network response-estimation model and channel training procedures to allocate bandwidth to each virtual link. The paper describes the characteristics of initial and inbound training processes and presents the criteria for performing optimum bandwidth allocation to all active links on a pDSL network.

6th Int. Symp. Power-Line …, 2002

The objective of this work is to establish the basic setup and methodology for analyzing the effe... more The objective of this work is to establish the basic setup and methodology for analyzing the effect of common disturbances on the residential power line channel response regarding time and network topology. Such information is necessary in the process of ...

Workshop on Rapid System Prototyping, 2000

The aim of rapid development of communication systems is to automate the process of transforming ... more The aim of rapid development of communication systems is to automate the process of transforming the high level description of a protocol into hardware and software that would implement the actual system. This paper describes a methodology used to implement medium access protocols based on a microprocessor core and a general parameterized architecture which contains configurable hardware blocks that can

2014 6th International Symposium on Communications, Control and Signal Processing (ISCCSP), 2014

ABSTRACT The reliability of multilevel NAND Flash memories, which are used extensively on solid-s... more ABSTRACT The reliability of multilevel NAND Flash memories, which are used extensively on solid-state drives, is strongly affected by their aging, ie. the number of applied program/erase cycles (P/E). A multilevel memory uses discrete voltage levels to represent the various bit patterns and, at the beginning of the life-time of such a device, these voltage levels demonstrate distributions with very small variances, resulting to very low symbol and bit-error-ratio (BER). As the number of applied P/E cycles increases, the variance of the voltage levels also increases and that results to increased BER. In this paper, we present a general model for four-level NAND Flash memories that can be used to estimate the memories' BER as a function of the used NAND technology and the aging process. For that purpose, we use asymmetric Pulse Amplitude Modulation with data-dependent channel noise and we provide analytic expressions for the behavior of such memories, and we associate their aging with noise conditions and used technology.

Lecture Notes in Computer Science, 2000

The increasing demand of networking applications has imposed a new category of electronic circuit... more The increasing demand of networking applications has imposed a new category of electronic circuits that integrate powerful CPU processing, networking and system support functions in a single, low cost chip. These integrated circuits, called Network Processors, are optimized for tasks such as access protocol implementation, data queuing and forwarding, traffic shaping and Quality of Service (QoS) support. This paper presents the use of Field Programmable System Level Integrated Circuits that combine the flexibility of programmable cores and the high performance of dedicated hardware, to implement network processors used for medium access protocols.

2011 19th Mediterranean Conference on Control & Automation (MED), 2011

High precision nanopositioning is a crucial func- tion of high-density probe-based storage device... more High precision nanopositioning is a crucial func- tion of high-density probe-based storage devices and its perfor- mance affects determinatively the device's reliability. The use of non-conventional nanopositioning schemes for achieving much higher data rates imposes new requirements on the control algorithms. In this work we analyze in terms of accuracy and stability an H2 controller combined with a sliding peak-filter

2010 17th IEEE International Conference on Electronics, Circuits and Systems, 2010

ABSTRACT Reliability and I/O performance are the two basic metrics that determine the quality of ... more ABSTRACT Reliability and I/O performance are the two basic metrics that determine the quality of solid-state drives (SSDs), especially in enterprize storage systems. Flash memories, the most popular non-volatile memory used in today's solid-state drives, demonstrate a time-varying behavior in terms of raw bit errors per program/erase cycle. This paper presents experimental results regarding the time-varying behavior as well as the statistical characteristics of single and multiple level cell flash memories. A new method that exploits these characteristics and uses the flash memories as Single Input Multiple Output channels for extending the lifetime of storage devices based on single level cell technology is presented. The method's efficiency is highlighted and its effect on the system's I/O performance is discussed.

2014 17th Euromicro Conference on Digital System Design, 2014

2013 IEEE Third International Conference on Consumer Electronics ¿ Berlin (ICCE-Berlin), 2013

ABSTRACT Solid-State Drives (SSDs) use non-volatile memories (NVM) for storing and retrieving inf... more ABSTRACT Solid-State Drives (SSDs) use non-volatile memories (NVM) for storing and retrieving information in the form of sectors and/or pages. For achieving high capacity, consumer SSDs use high density multi-level cells (MLC) memories that experience high read and write times. The maximum achieved I/O performance and the minimum response time depends on the used NVM technology, which determines the read and write times, and other system parameters, like the number of simultaneously accessed NVM channels, the SSD controller architecture, its functionality, the supported commands and the applied workload. Most of these parameters remain unchanged during the lifetime of an SSD, except for the read and write times which vary as the lifetime of the device progresses and higher variability is observed. By defining the basic equations of the maximum SSD performance and using experimental results, we determine how the increase of the NVM response time affects the performance of a consumer SSD and under what conditions this is observed by the SSD's user.

Proceedings. 15th IEEE International Workshop on Rapid System Prototyping, 2004., 2004

In this paper we describe an efficient methodology for rapid prototyping of data transmission sys... more In this paper we describe an efficient methodology for rapid prototyping of data transmission systems based on Stateflow/Simulink models using a multi-level system devel- opment and testing approach. Transmission systems incor- porate multi-domain functions and algorithms, i.e. physical layer circuits and communication protocol controllers. The Stateflow/Simulink environment enables the development of precise simulation models that include signal and protocol processing units. The proposed prototyping methodology is based on the progressive translation of high-level model blocks into hardware/software modules of the prototype ar- chitecture using custom and/or automated code generation tools. A custom data exchange and synchronization inter- face between the Stateflow/Simulink workspace and the cir- cuit modules enables the integration of the simulation model and the prototyping platform into a complete functional sys- tem. The application of the proposed methodology in the development of an ADSL modem in a custom prototyping platform is also described.

Proceedings LCN 2001. 26th Annual IEEE Conference on Local Computer Networks, 2001

14th IEEE International Workshop on Rapid Systems Prototyping, 2003. Proceedings., 2003

In this paper we describe the methodology and architecture of a flexible modular environment for ... more In this paper we describe the methodology and architecture of a flexible modular environment for prototyping data transmission systems and its application on xDSL systems. The development environment is based on custom and commercially available software tools and a custom hardware emulation platform for mapping the basic data-pump modules of xDSL systems into hardware/software functional modules. The road-map from a high-level xDSL system model to the actual prototype is based on the progressive substitution of high-level submodules of the initial model with their respective hardware/software counterparts, and their integration into a complete functional system. A library of custom blocks is used for data exchange and synchronization between the high-level model and the emulation platform, and for real-time visualization of the critical parameters of the emulated system as well. The application of the proposed development environment in the implementation and testing of an emulator of a bundle of DSL lines and of a centralized bit-loading algorithm for multicarrier ADSL systems is also described.

11th IEEE Mediterranean Electrotechnical Conference (IEEE Cat. No.02CH37379), 2002

The theoretical performance of CSMA/CA, as it is used in IEEE802.11 wireless LANs, is investigate... more The theoretical performance of CSMA/CA, as it is used in IEEE802.11 wireless LANs, is investigated in this paper. We adopt and modify a previously presented analytical approach for CSMA/CA protocols in wireless LANs with finite number of stations and find closed-form equations for throughput and delay. The presented numerical results highlight the characteristics of both CSMA/CA methods and define how their performance depends on the number of stations and on traffic conditions.

Proceedings of the 2003 International Symposium on Circuits and Systems, 2003. ISCAS '03., 2003

Lecture Notes in Computer Science, 2001

Proceedings. 24th EUROMICRO Conference (Cat. No.98EX204), 1998

This paper presents a real-time entropy compression/decompression unit for disparity map informat... more This paper presents a real-time entropy compression/decompression unit for disparity map information used in 3D teleconferencing systems. The disparity map data form a constant bit rate data stream which has to be transmitted through an ATM channel supporting lower data rates. The selection of the proper compression algorithm must be based on the durability of the regenerated data to various

IEEE International Symposium on Intelligent Signal Processing, 2003, 2003

2014 IEEE Fourth International Conference on Consumer Electronics Berlin (ICCE-Berlin), 2014

2007 14th IEEE International Conference on Electronics, Circuits and Systems, 2007

This paper addresses the problem of efficient resource allocation for multiuser orthogonal freque... more This paper addresses the problem of efficient resource allocation for multiuser orthogonal frequency division multiplexing over frequency selective channels. For wideband applications, such as power line communications and wireless networks, the development of low-complexity and fast execution time algorithms is important due to the time-varying behavior of the channel environment and the need to adapt the bandwidth allocation to the channel conditions. This paper presents a multiuser bandwidth allocation algorithm, examines its complexity and presents a computationally efficient implementation. Numerical results demonstrate the improvement achieved with the proposed implementation, in terms of complexity.