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Papers by Timothy Monaghan
Proceeding International Conference on Dependable Systems and Networks. DSN 2000
This experience report presents a study on the faulttolerance (FT) support capabilities of variou... more This experience report presents a study on the faulttolerance (FT) support capabilities of various COTSstandards prior to their inclusion in design of dependablesystems. A standalone analysis and relative comparisonof the FT attributes for SCI, ATM, Futurebus+ and Fiber Channel is presented.1 Introduction & ObjectivesRecent military programs specically target reducingthe cost of design, acquisition and upgrade ofsystems through the use of
1996 IEEE Aerospace Applications Conference. Proceedings
IEEE/AIAA 10th Digital Avionics Systems Conference
The fault tolerant aspects of the evaluations and trade studies done in the concept evaluation st... more The fault tolerant aspects of the evaluations and trade studies done in the concept evaluation stage of a mission avionics system are discussed. These studies are considered from the point of view of the government program office in charge of the RFP, SOW, design review and milestone deliverables. The author touches on some of the possible fault-tolerant specifications, a fault-tolerant evaluation criteria for the qualitative analysis of the design in the system requirements review (SRR) and system design review (SDR), and the wide range of possible fault injection methods and validation techniques.<<ETX>>
AIAA/IEEE Digital Avionics Systems Conference. 13th DASC
The Navy's Advanced Avionics Subsystem Technology (AAST) Fault Tolerant program is clarifyin the ... more The Navy's Advanced Avionics Subsystem Technology (AAST) Fault Tolerant program is clarifyin the Navy's fault tolerant avionics specifications mekods and acceptance tests. The goal of the program will be clarify the Specification and Statement of Work language needed in future procurements and to demonstrate fault tolerant validation tools on an avionics design. A set of tool features will then be developed that spans the needs of fault tolerant computer system design from early concept studies to full scale production and operational support, both hardware and software. The paper will give an overview of the AAST Fault Tolerant Demonstration and focus on two tools that are being used in the demonstration: FERRARI a software fault injector that will be used to validate the fault tolerance of the Common Integrated Processor (CIP), the F-22 Mission Processor and GRIND a concept evaluation tool that will be used to evaluate the overall CIP architecture.
[1993 Proceedings] AIAA/IEEE Digital Avionics Systems Conference
The Springer International Series in Engineering and Computer Science
The DoD is entering a radically new era of weapon systems procurement. The Cold War is over and n... more The DoD is entering a radically new era of weapon systems procurement. The Cold War is over and new scenarios and new force structures are changing the requirements of the next generation of weapon systems. The major drivers shaping this new era of weapon system procurement are: decreasing military budgets, stretched out development cycles, an emphasis on prototypes and demonstrations, open systems standards, and intensive modeling and simulation before any hardware is built. The next generation of computer based weapon systems will be designed using a high percentage of commercial off-the-shelf parts. A key focus in this next generation of computer based weapon systems will be the fault tolerant features of the system’s design. Studies have shown that a system can actually be more dependable, even though it uses less reliable parts, if adequate attention is paid to the fault handling features of the system’s design. [1]
Abstract : This report examines the hardware interface required for an efficient implementation o... more Abstract : This report examines the hardware interface required for an efficient implementation of the Macro Function Language (MFL). Traditionally, computer systems were developed by designing hardware, then writing microcode, assembly language, and on up to a common programing language such as ADA or Pascal. This emphasis on hardware was due to the relative high cost of hardware. In the current state of the art, software costs are far greater than hardware over the life of a signal processor. Because of this, the MFL attempts to standardize the software interface to hardware. This interface will standardize the software between signal processors designed to run MFL down to the microcode level.... Macro Function Language (MFL), Signal Processing, Primitives, Multisensor Standard Macro Study.
This paper describes two 6.3 and 6.4 efforts that are attempting to clarify the Navy's management... more This paper describes two 6.3 and 6.4 efforts that are attempting to clarify the Navy's management of the design of complex, computer based, weapon and avionic systems. The 6.3 effort, the Advanced Avionics Technical Demonstration (AATD) Fault Tolerance Demonstration is focused on the fault tolerant specifications, validation techniques and acceptance tests of any future Naval Avionic system and the 6.4 effort, the Next Generation Computer Resources (NGCR) Fault Tolerant Task Group is concerned with the fault tolerance features of the Navy's next generation open system computer standards.
We investigate the fault-tolerance issue of networking and propose a layered solution to it. By e... more We investigate the fault-tolerance issue of networking and propose a layered solution to it. By evaluating the performance of fault-handling schemes at each layer of a protocol stack, we can find a set of fault-handling schemes whose combined performance will guarantee the required end-to-end delay bound for real-time communication services while maintaining a certain level of fault-tolerance. The Survivable Adaptable Fiber Embedded Network (SAFENET) is used as the main vehicle of this study
Proceeding International Conference on Dependable Systems and Networks. DSN 2000
This experience report presents a study on the faulttolerance (FT) support capabilities of variou... more This experience report presents a study on the faulttolerance (FT) support capabilities of various COTSstandards prior to their inclusion in design of dependablesystems. A standalone analysis and relative comparisonof the FT attributes for SCI, ATM, Futurebus+ and Fiber Channel is presented.1 Introduction &amp;amp; ObjectivesRecent military programs specically target reducingthe cost of design, acquisition and upgrade ofsystems through the use of
1996 IEEE Aerospace Applications Conference. Proceedings
IEEE/AIAA 10th Digital Avionics Systems Conference
The fault tolerant aspects of the evaluations and trade studies done in the concept evaluation st... more The fault tolerant aspects of the evaluations and trade studies done in the concept evaluation stage of a mission avionics system are discussed. These studies are considered from the point of view of the government program office in charge of the RFP, SOW, design review and milestone deliverables. The author touches on some of the possible fault-tolerant specifications, a fault-tolerant evaluation criteria for the qualitative analysis of the design in the system requirements review (SRR) and system design review (SDR), and the wide range of possible fault injection methods and validation techniques.<<ETX>>
AIAA/IEEE Digital Avionics Systems Conference. 13th DASC
The Navy's Advanced Avionics Subsystem Technology (AAST) Fault Tolerant program is clarifyin the ... more The Navy's Advanced Avionics Subsystem Technology (AAST) Fault Tolerant program is clarifyin the Navy's fault tolerant avionics specifications mekods and acceptance tests. The goal of the program will be clarify the Specification and Statement of Work language needed in future procurements and to demonstrate fault tolerant validation tools on an avionics design. A set of tool features will then be developed that spans the needs of fault tolerant computer system design from early concept studies to full scale production and operational support, both hardware and software. The paper will give an overview of the AAST Fault Tolerant Demonstration and focus on two tools that are being used in the demonstration: FERRARI a software fault injector that will be used to validate the fault tolerance of the Common Integrated Processor (CIP), the F-22 Mission Processor and GRIND a concept evaluation tool that will be used to evaluate the overall CIP architecture.
[1993 Proceedings] AIAA/IEEE Digital Avionics Systems Conference
The Springer International Series in Engineering and Computer Science
The DoD is entering a radically new era of weapon systems procurement. The Cold War is over and n... more The DoD is entering a radically new era of weapon systems procurement. The Cold War is over and new scenarios and new force structures are changing the requirements of the next generation of weapon systems. The major drivers shaping this new era of weapon system procurement are: decreasing military budgets, stretched out development cycles, an emphasis on prototypes and demonstrations, open systems standards, and intensive modeling and simulation before any hardware is built. The next generation of computer based weapon systems will be designed using a high percentage of commercial off-the-shelf parts. A key focus in this next generation of computer based weapon systems will be the fault tolerant features of the system’s design. Studies have shown that a system can actually be more dependable, even though it uses less reliable parts, if adequate attention is paid to the fault handling features of the system’s design. [1]
Abstract : This report examines the hardware interface required for an efficient implementation o... more Abstract : This report examines the hardware interface required for an efficient implementation of the Macro Function Language (MFL). Traditionally, computer systems were developed by designing hardware, then writing microcode, assembly language, and on up to a common programing language such as ADA or Pascal. This emphasis on hardware was due to the relative high cost of hardware. In the current state of the art, software costs are far greater than hardware over the life of a signal processor. Because of this, the MFL attempts to standardize the software interface to hardware. This interface will standardize the software between signal processors designed to run MFL down to the microcode level.... Macro Function Language (MFL), Signal Processing, Primitives, Multisensor Standard Macro Study.
This paper describes two 6.3 and 6.4 efforts that are attempting to clarify the Navy's management... more This paper describes two 6.3 and 6.4 efforts that are attempting to clarify the Navy's management of the design of complex, computer based, weapon and avionic systems. The 6.3 effort, the Advanced Avionics Technical Demonstration (AATD) Fault Tolerance Demonstration is focused on the fault tolerant specifications, validation techniques and acceptance tests of any future Naval Avionic system and the 6.4 effort, the Next Generation Computer Resources (NGCR) Fault Tolerant Task Group is concerned with the fault tolerance features of the Navy's next generation open system computer standards.
We investigate the fault-tolerance issue of networking and propose a layered solution to it. By e... more We investigate the fault-tolerance issue of networking and propose a layered solution to it. By evaluating the performance of fault-handling schemes at each layer of a protocol stack, we can find a set of fault-handling schemes whose combined performance will guarantee the required end-to-end delay bound for real-time communication services while maintaining a certain level of fault-tolerance. The Survivable Adaptable Fiber Embedded Network (SAFENET) is used as the main vehicle of this study