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Research paper thumbnail of Study of threats associated with cloud infrastructure systems

IOP Conference Series: Materials Science and Engineering, 2020

Cloud infrastructure is the new euphemism in professional developers view these days round the cl... more Cloud infrastructure is the new euphemism in professional developers view these days round the clock. The rewards of cloud storage and its unique functionalities are absolutely massive and as such it is a concern of phenomenal significance. It offers various outstanding features such as Multi-tenancy, on-demand support, pay per use etc. This paper generates a report on the possible consequences of cloud computing. Processing infrastructure-as-a-Service illustrates the distribution of threats and how cloud doing so can affect their performance. The cloud infrastructure addresses the various situations where the attacks exist also the steps should be followed to mitigate the attacks. The research also tries at classifying steps have to take when using cloud services to reduce the impacts of undesirable consequences and to safeguard data integrity.

Research paper thumbnail of Performance analysis of a novel 8T SRAM cell

INTERNATIONAL CONFERENCE ON RESEARCH IN SCIENCES, ENGINEERING & TECHNOLOGY

Research paper thumbnail of Low Power 8T SRAM Cell Design For High Stability Video Applications

In this paper work has been carried out for a novel low power 8T Static Random Access Memory (SRA... more In this paper work has been carried out for a novel low power 8T Static Random Access Memory (SRAM) cell to enhance the stability and to save the SRAM power in real time video applications. For the validation of our proposed 8T SRAM cell, we compared our results with reported data. The size of the proposed cell is comparable to the existing 8T SRAM cell at same technology and design rules. In the proposed 8T SRAM cell, write operation done by charging / discharging single Bit Line (BL), which results in reduction of dynamic power consumption. The proposed 8T SRAM cell reduces the dynamic power 31.57% and leakage power 27.53%, comparing with the existing 8T SRAM cell. The existing 9T, 10T and higher transistor count, SRAM cells enhances the read stability with area and power penalty. In this paper stability has been also analyzed using N-curve metrics.

Research paper thumbnail of Extensive evaluation of the MIMO along with sliced multi modulus algorithm and estimate strategies in the direction of MIMO OFDM solutions

IOP Conference Series: Materials Science and Engineering, 2020

Research paper thumbnail of Diététique et alimentation des élites princières dans l'Italie médiévale

Cahiers De La Villa Kerylos, 2008

Nicoud Marilyn. Diététique et alimentation des élites princières dans l'Italie médiévale. In:... more Nicoud Marilyn. Diététique et alimentation des élites princières dans l'Italie médiévale. In: Pratiques et discours alimentaires en Méditerranée de l'Antiquité à la Renaissance. Actes du 18ème colloque de la Villa Kérylos à Beaulieu-sur-Mer les 4, 5 et 6 octobre 2007. Paris : Académie des Inscriptions et Belles-Lettres, 2008. pp. 317-336. (Cahiers de la Villa Kérylos, 19

Research paper thumbnail of Designing of Phase and Frequency Detector for low Jitter and high speed applications

2015 International Conference on Electrical, Electronics, Signals, Communication and Optimization (EESCO), 2015

Research paper thumbnail of A 90-nm CMOS 5-Mbps Crystal-Less RF-Powered Transceiver for Wireless Sensor Network Nodes

IEEE Journal of Solid-State Circuits, 2014

This paper presents a 90-nm CMOS batteryless transceiver for RF-powered wireless sensor networks.... more This paper presents a 90-nm CMOS batteryless transceiver for RF-powered wireless sensor networks. The circuit is made up of a RF energy harvesting module that is implemented through a multi-stage rectifier, a power management unit, and a PLL-based RF front-end that enables TX carrier synthesis by exploiting the RF input signal as a reference frequency. This avoids the use of a local crystal oscillator, thus implementing a highly integrated low-cost wireless transceiver. An active narrowband transmission scheme is adopted with the aim of overcoming the reader self-jamming that limits the operating range of backscattering-based RF-powered devices. The circuit supports a 915-MHz FSK downlink and a 2.45-GHz OOK uplink, while achieving a data rate up to 5 Mbps. It operates with an RF input power as low as-17.1 dBm.

Research paper thumbnail of Aadhaar Enabled Electronic Voting Mechanism

Aadhaar based identification systems are gaining momentum and it is used in several authenticatio... more Aadhaar based identification systems are gaining momentum and it is used in several authentication mechanisms. In many democratic countries, the electoral system is still in its juvenile stage and operating in a manual mechanism which consumes huge resources for every voting. In this work, we propose a mechanism which uses Aadhaar based identification to enable a voter to vote. The connection between the voting machine and Aadhaar database is fully secured and encrypted. To avoid intentional hacking, the whole system is computerized and does not require human intervention.

Research paper thumbnail of A robust, ultra low-power, data-dependent-power-supplied 11T SRAM cell with expanded read/write stabilities for internet-of-things applications

Analog Integrated Circuits and Signal Processing, 2018

With the increased requirement of on-chip data computations in internet of things based applicati... more With the increased requirement of on-chip data computations in internet of things based applications, the embedded onchip SRAM memory has been under its renovation stage to overcome the classical problems like stability and poor energy efficiency. In this work, a data-dependent-power-supply mechanism for a new 11T SRAM cell is proposed with ultra-low leakage and improved read/write stability against the process-voltage-temperature variations. The proposed cell consumes static power in the fraction of picowatt range and has considerable enhancement in the value of write static noise margin (WSNM). In addition, the use of associated read decoupling approach, with the column-based read buffer, further improves the read stability of the proposed cell and make it comparable with the hold stability value. The percentage reduction in the leakage power of proposed 11T cell is 99:97%, 99:93% and 99:97%, while the WSNM 1 is 6:98Â, 3:12Â and 1:46Â, and WSNM 0 is 5:55Â, 1:25Â and 1:16Â larger when operating at 0.4 V and compared to the conventional 6T and threshold voltage techniques based VTH_9T and data aware write assist (DAWA) 12T SRAM cell structures respectively. I read =I leak ratio for the proposed cell has improved by 6:55Â, 6:22Â and 5:11Â when compared with the 6T, VTH_9T and DAWA12T SRAM to increase the memory density. Further, the post-layout Monte Carlo simulation results (2000 samples) confirm the robustness of the proposed cell against the process variations. Keywords static random access memory (SRAM) Á Ultra-low power Á Static noise margin (SNM) Á Write ability Á Internet of things (IoT)

Research paper thumbnail of Novel Hybrid MIMO Detector for Spatial Multiplexed MIMO System

IOP Conference Series: Materials Science and Engineering

Research paper thumbnail of IoT Based Solar Power Monitoring System

IOP Conference Series: Materials Science and Engineering

Research paper thumbnail of SiGe Asymmetric Dual-k Spacer FinFETs-Based 6T SRAM Cell to Mitigate Read-Write Conflict

Journal of Nanoelectronics and Optoelectronics

Research paper thumbnail of Impact of varying carbon concentration in SiC S/D asymmetric dual-k spacer for high performance and reliable FinFET

Journal of Semiconductors

Research paper thumbnail of Half-Select Free Bit-Line Sharing 12T SRAM with Double-Adjacent Bits Soft Error Correction and A Reconfigurable FPGA for Low-Power Applications

AEU - International Journal of Electronics and Communications

Research paper thumbnail of A 220 mV robust read-decoupled partial feedback cutting based low-leakage 9T SRAM for Internet of Things (IoT) applications

AEU - International Journal of Electronics and Communications

Research paper thumbnail of Evaluation of static noise margin of 6T SRAM cell using SiGe/SiC asymmetric dual-k spacer FinFETs

Research paper thumbnail of Effect of asymmetric doping on asymmetric underlap Dual-k spacer FinFET

2015 Annual IEEE India Conference (INDICON), 2015

Research paper thumbnail of 8T SRAM Cell Design for Dynamic and Leakage Power Reduction

International Journal of Computer Applications, 2013

This paper addresses a, novel eight transistor (8T) CMOS SRAM cell design to enhance the stabilit... more This paper addresses a, novel eight transistor (8T) CMOS SRAM cell design to enhance the stability and to reduce dynamic and leakage power. For the validation of proposed 8T SRAM cell, compared results with reported data. The parameters used in the proposed cell are comparable to the existing 8T SRAM cell at same technology and design rules. The stability of the proposed cell has been analyzed using N-curve metrics. Write operation is achieved in the proposed 8T SRAM cell by charging / discharging single Bit Line (BL), which results in reduction of dynamic power consumption. The proposed 8T SRAM cell has achieved 38.33% dynamic power reduction and 25.31% reduction in leakage power comparing with the reported data of 8T SRAM cell, which validate the desired design approach.

Research paper thumbnail of 8T SRAM Cell Design for Dynamic and Leakage Power Reduction

International Journal of Computer Applications, Jun 26, 2013

This paper addresses a, novel eight transistor (8T) CMOS SRAM cell design to enhance the stabilit... more This paper addresses a, novel eight transistor (8T) CMOS SRAM cell design to enhance the stability and to reduce dynamic and leakage power. For the validation of proposed 8T SRAM cell, compared results with reported data. The parameters used in the proposed cell are comparable to the existing 8T SRAM cell at same technology and design rules. The stability of the proposed cell has been analyzed using N-curve metrics. Write operation is achieved in the proposed 8T SRAM cell by charging / discharging single Bit Line (BL), which results in reduction of dynamic power consumption. The proposed 8T SRAM cell has achieved 38.33% dynamic power reduction and 25.31% reduction in leakage power comparing with the reported data of 8T SRAM cell, which validate the desired design approach.

Research paper thumbnail of A 90-nm CMOS 5-Mbps Crystal-Less RF-Powered Transceiver for Wireless Sensor Network Nodes

This paper presents a 90-nm CMOS batteryless transceiver for RF-powered wireless sensor networks.... more This paper presents a 90-nm CMOS batteryless transceiver for RF-powered wireless sensor networks. The circuit is made up of a RF energy harvesting module that is implemented through a multi-stage rectifier, a power management unit, and a PLL-based RF front-end that enables TX carrier synthesis by exploiting the RF input signal as a reference frequency. This avoids the use of a local crystal oscillator, thus implementing a highly integrated low-cost wireless transceiver. An active narrowband transmission scheme is adopted with the aim of overcoming the reader self-jamming that limits the operating range of backscattering-based RF-powered devices. The circuit supports a 915-MHz FSK downlink and a 2.45-GHz OOK uplink, while achieving a data rate up to 5 Mbps. It operates with an RF input power as low as -17.1 dBm.

Research paper thumbnail of Study of threats associated with cloud infrastructure systems

IOP Conference Series: Materials Science and Engineering, 2020

Cloud infrastructure is the new euphemism in professional developers view these days round the cl... more Cloud infrastructure is the new euphemism in professional developers view these days round the clock. The rewards of cloud storage and its unique functionalities are absolutely massive and as such it is a concern of phenomenal significance. It offers various outstanding features such as Multi-tenancy, on-demand support, pay per use etc. This paper generates a report on the possible consequences of cloud computing. Processing infrastructure-as-a-Service illustrates the distribution of threats and how cloud doing so can affect their performance. The cloud infrastructure addresses the various situations where the attacks exist also the steps should be followed to mitigate the attacks. The research also tries at classifying steps have to take when using cloud services to reduce the impacts of undesirable consequences and to safeguard data integrity.

Research paper thumbnail of Performance analysis of a novel 8T SRAM cell

INTERNATIONAL CONFERENCE ON RESEARCH IN SCIENCES, ENGINEERING & TECHNOLOGY

Research paper thumbnail of Low Power 8T SRAM Cell Design For High Stability Video Applications

In this paper work has been carried out for a novel low power 8T Static Random Access Memory (SRA... more In this paper work has been carried out for a novel low power 8T Static Random Access Memory (SRAM) cell to enhance the stability and to save the SRAM power in real time video applications. For the validation of our proposed 8T SRAM cell, we compared our results with reported data. The size of the proposed cell is comparable to the existing 8T SRAM cell at same technology and design rules. In the proposed 8T SRAM cell, write operation done by charging / discharging single Bit Line (BL), which results in reduction of dynamic power consumption. The proposed 8T SRAM cell reduces the dynamic power 31.57% and leakage power 27.53%, comparing with the existing 8T SRAM cell. The existing 9T, 10T and higher transistor count, SRAM cells enhances the read stability with area and power penalty. In this paper stability has been also analyzed using N-curve metrics.

Research paper thumbnail of Extensive evaluation of the MIMO along with sliced multi modulus algorithm and estimate strategies in the direction of MIMO OFDM solutions

IOP Conference Series: Materials Science and Engineering, 2020

Research paper thumbnail of Diététique et alimentation des élites princières dans l'Italie médiévale

Cahiers De La Villa Kerylos, 2008

Nicoud Marilyn. Diététique et alimentation des élites princières dans l'Italie médiévale. In:... more Nicoud Marilyn. Diététique et alimentation des élites princières dans l'Italie médiévale. In: Pratiques et discours alimentaires en Méditerranée de l'Antiquité à la Renaissance. Actes du 18ème colloque de la Villa Kérylos à Beaulieu-sur-Mer les 4, 5 et 6 octobre 2007. Paris : Académie des Inscriptions et Belles-Lettres, 2008. pp. 317-336. (Cahiers de la Villa Kérylos, 19

Research paper thumbnail of Designing of Phase and Frequency Detector for low Jitter and high speed applications

2015 International Conference on Electrical, Electronics, Signals, Communication and Optimization (EESCO), 2015

Research paper thumbnail of A 90-nm CMOS 5-Mbps Crystal-Less RF-Powered Transceiver for Wireless Sensor Network Nodes

IEEE Journal of Solid-State Circuits, 2014

This paper presents a 90-nm CMOS batteryless transceiver for RF-powered wireless sensor networks.... more This paper presents a 90-nm CMOS batteryless transceiver for RF-powered wireless sensor networks. The circuit is made up of a RF energy harvesting module that is implemented through a multi-stage rectifier, a power management unit, and a PLL-based RF front-end that enables TX carrier synthesis by exploiting the RF input signal as a reference frequency. This avoids the use of a local crystal oscillator, thus implementing a highly integrated low-cost wireless transceiver. An active narrowband transmission scheme is adopted with the aim of overcoming the reader self-jamming that limits the operating range of backscattering-based RF-powered devices. The circuit supports a 915-MHz FSK downlink and a 2.45-GHz OOK uplink, while achieving a data rate up to 5 Mbps. It operates with an RF input power as low as-17.1 dBm.

Research paper thumbnail of Aadhaar Enabled Electronic Voting Mechanism

Aadhaar based identification systems are gaining momentum and it is used in several authenticatio... more Aadhaar based identification systems are gaining momentum and it is used in several authentication mechanisms. In many democratic countries, the electoral system is still in its juvenile stage and operating in a manual mechanism which consumes huge resources for every voting. In this work, we propose a mechanism which uses Aadhaar based identification to enable a voter to vote. The connection between the voting machine and Aadhaar database is fully secured and encrypted. To avoid intentional hacking, the whole system is computerized and does not require human intervention.

Research paper thumbnail of A robust, ultra low-power, data-dependent-power-supplied 11T SRAM cell with expanded read/write stabilities for internet-of-things applications

Analog Integrated Circuits and Signal Processing, 2018

With the increased requirement of on-chip data computations in internet of things based applicati... more With the increased requirement of on-chip data computations in internet of things based applications, the embedded onchip SRAM memory has been under its renovation stage to overcome the classical problems like stability and poor energy efficiency. In this work, a data-dependent-power-supply mechanism for a new 11T SRAM cell is proposed with ultra-low leakage and improved read/write stability against the process-voltage-temperature variations. The proposed cell consumes static power in the fraction of picowatt range and has considerable enhancement in the value of write static noise margin (WSNM). In addition, the use of associated read decoupling approach, with the column-based read buffer, further improves the read stability of the proposed cell and make it comparable with the hold stability value. The percentage reduction in the leakage power of proposed 11T cell is 99:97%, 99:93% and 99:97%, while the WSNM 1 is 6:98Â, 3:12Â and 1:46Â, and WSNM 0 is 5:55Â, 1:25Â and 1:16Â larger when operating at 0.4 V and compared to the conventional 6T and threshold voltage techniques based VTH_9T and data aware write assist (DAWA) 12T SRAM cell structures respectively. I read =I leak ratio for the proposed cell has improved by 6:55Â, 6:22Â and 5:11Â when compared with the 6T, VTH_9T and DAWA12T SRAM to increase the memory density. Further, the post-layout Monte Carlo simulation results (2000 samples) confirm the robustness of the proposed cell against the process variations. Keywords static random access memory (SRAM) Á Ultra-low power Á Static noise margin (SNM) Á Write ability Á Internet of things (IoT)

Research paper thumbnail of Novel Hybrid MIMO Detector for Spatial Multiplexed MIMO System

IOP Conference Series: Materials Science and Engineering

Research paper thumbnail of IoT Based Solar Power Monitoring System

IOP Conference Series: Materials Science and Engineering

Research paper thumbnail of SiGe Asymmetric Dual-k Spacer FinFETs-Based 6T SRAM Cell to Mitigate Read-Write Conflict

Journal of Nanoelectronics and Optoelectronics

Research paper thumbnail of Impact of varying carbon concentration in SiC S/D asymmetric dual-k spacer for high performance and reliable FinFET

Journal of Semiconductors

Research paper thumbnail of Half-Select Free Bit-Line Sharing 12T SRAM with Double-Adjacent Bits Soft Error Correction and A Reconfigurable FPGA for Low-Power Applications

AEU - International Journal of Electronics and Communications

Research paper thumbnail of A 220 mV robust read-decoupled partial feedback cutting based low-leakage 9T SRAM for Internet of Things (IoT) applications

AEU - International Journal of Electronics and Communications

Research paper thumbnail of Evaluation of static noise margin of 6T SRAM cell using SiGe/SiC asymmetric dual-k spacer FinFETs

Research paper thumbnail of Effect of asymmetric doping on asymmetric underlap Dual-k spacer FinFET

2015 Annual IEEE India Conference (INDICON), 2015

Research paper thumbnail of 8T SRAM Cell Design for Dynamic and Leakage Power Reduction

International Journal of Computer Applications, 2013

This paper addresses a, novel eight transistor (8T) CMOS SRAM cell design to enhance the stabilit... more This paper addresses a, novel eight transistor (8T) CMOS SRAM cell design to enhance the stability and to reduce dynamic and leakage power. For the validation of proposed 8T SRAM cell, compared results with reported data. The parameters used in the proposed cell are comparable to the existing 8T SRAM cell at same technology and design rules. The stability of the proposed cell has been analyzed using N-curve metrics. Write operation is achieved in the proposed 8T SRAM cell by charging / discharging single Bit Line (BL), which results in reduction of dynamic power consumption. The proposed 8T SRAM cell has achieved 38.33% dynamic power reduction and 25.31% reduction in leakage power comparing with the reported data of 8T SRAM cell, which validate the desired design approach.

Research paper thumbnail of 8T SRAM Cell Design for Dynamic and Leakage Power Reduction

International Journal of Computer Applications, Jun 26, 2013

This paper addresses a, novel eight transistor (8T) CMOS SRAM cell design to enhance the stabilit... more This paper addresses a, novel eight transistor (8T) CMOS SRAM cell design to enhance the stability and to reduce dynamic and leakage power. For the validation of proposed 8T SRAM cell, compared results with reported data. The parameters used in the proposed cell are comparable to the existing 8T SRAM cell at same technology and design rules. The stability of the proposed cell has been analyzed using N-curve metrics. Write operation is achieved in the proposed 8T SRAM cell by charging / discharging single Bit Line (BL), which results in reduction of dynamic power consumption. The proposed 8T SRAM cell has achieved 38.33% dynamic power reduction and 25.31% reduction in leakage power comparing with the reported data of 8T SRAM cell, which validate the desired design approach.

Research paper thumbnail of A 90-nm CMOS 5-Mbps Crystal-Less RF-Powered Transceiver for Wireless Sensor Network Nodes

This paper presents a 90-nm CMOS batteryless transceiver for RF-powered wireless sensor networks.... more This paper presents a 90-nm CMOS batteryless transceiver for RF-powered wireless sensor networks. The circuit is made up of a RF energy harvesting module that is implemented through a multi-stage rectifier, a power management unit, and a PLL-based RF front-end that enables TX carrier synthesis by exploiting the RF input signal as a reference frequency. This avoids the use of a local crystal oscillator, thus implementing a highly integrated low-cost wireless transceiver. An active narrowband transmission scheme is adopted with the aim of overcoming the reader self-jamming that limits the operating range of backscattering-based RF-powered devices. The circuit supports a 915-MHz FSK downlink and a 2.45-GHz OOK uplink, while achieving a data rate up to 5 Mbps. It operates with an RF input power as low as -17.1 dBm.