A. G. Nassiopoulou - Academia.edu (original) (raw)

Papers by A. G. Nassiopoulou

Research paper thumbnail of Neggative differential resistance in metal sputtered Alumina Si20191004 79906 qwxmj1

J. Phys. D: Appl. Phys. 52 (2019) 085101 (9pp), 2019

We report on the observation of voltage-controlled stable and repeatable negative differential re... more We report on the observation of voltage-controlled stable and repeatable negative differential resistance (NDR) in Al/Al2O3/n-type Si structures. The NDR is shown to be stable and repeatable both during multiple scans on the same device and between different devices. NDR peak-to-valley ratios up to 100 were measured, with a valley at 2 × 10−13 A. The maximum peak-to-valley ratio was observed for a voltage step of 0.05 V with dV/dt = 0.1 V s−1 and a step delay time of 0.1 s. The effect is transient, meaning that it tends to
disappear for dc conditions. The observed NDR is markedly different from other previously reported NDRs in insulators since it only depends on interface trapping and is not influenced by the leakage current through the device which is below the noise floor of our measurement system (2 × 10−14 A). The origin of the observed NDR is attributed to charging and discharging of traps at the metal-insulator interface.

Research paper thumbnail of Porous Silicon as a Material for Thermoelectric Devices

Porous Silicon: From Formation to Applications: Optoelectronics, Microelectronics, and Energy Technology Applications, Volume Three, 2016

Research paper thumbnail of Thin Film Thermopile Arrangement

Research paper thumbnail of High-Performance On-Chip Low-Pass Filters Using CPW and Slow-Wave-CPW Transmission Lines on Porous Silicon

We report on the design, fabrication, and characterization of high-performance stepped-impedance ... more We report on the design, fabrication, and characterization of high-performance stepped-impedance filters (SIFs) on a locally formed porous Si layer on the CMOS Si wafer. This technology provides the appropriate platform to reduce the high losses within the Si substrate, along with the possibility to tune the substrate permittivity in order to achieve high characteristic impedance (Z C ) transmission lines, which are important for the specific filters and other passive circuits, e.g., power dividers. By combining high-Z C coplanar waveguides (CPWs) and low-Z C slow-wave CPWs (S-CPWs), high-quality SIFs were achieved, with cutoff frequencies at 30 and 60 GHz. These SIFs were characterized in the frequency range of 0-100 GHz and demonstrated an insertion loss lower than 2 dB in the whole passband and a rejection higher than 30 dB in the stopband. The achieved performance is better than that exhibited by SIFs using only S-CPWs.

Research paper thumbnail of Direct Al-Imprinting Method for Increased Effective Electrode Area in MIM Capacitors

A method for enhancing the capacitance density of metal-insulator-metal (MIM) capacitor by direct... more A method for enhancing the capacitance density of metal-insulator-metal (MIM) capacitor by directly imprinting an Al thin film on a Si wafer using a Si stamp is presented. Micrometer-sized features with a depth of up to 1.8 μm are demonstrated, showing an increase in the effective Al film area of up to 58%. MIM capacitors with an anodic barrier-type alumina dielectric were fabricated using both imprinted electrodes and flat electrodes. An increase of the capacitance density of the MIM capacitors with the increase of the effective surface area was achieved without increasing the nonlinearity coefficient α. This is not the case when the capacitance density increase is achieved by decreasing the dielectric thickness. We showed that for a capacitance density of ∼10 fF/μm 2 , the value of α was 45% lower in the case of the imprinted electrodes compared with that of flat electrodes. The obtained results represent a novel method for creating high-density MIM capacitors without very large values of α. The leakage current is shown to remain low in spite of the surface area increase. This is attributed to the reduction of surface roughness of the electrodes, caused by the imprinting process.

Research paper thumbnail of Energy transfer in aggregated CuInS 2 /ZnS core-shell quantum dots deposited as solid films

We report on the morphology and optical properties of CuInS 2 /ZnS core-shell quantum dots in sol... more We report on the morphology and optical properties of CuInS 2 /ZnS core-shell quantum dots in solid films by means of AFM, SEM, HRTEM, steady state and time-resolved photoluminescence (PL) spectroscopy. The amount of aggregation of the CuInS 2 /ZnS QDs was controlled by changing the preparation conditions of the films. A red-shift of the PL spectrum of CuInS 2 /ZnS core-shell quantum dots, deposited as solid films on silicon substrates, is observed upon increasing the amount of aggregation. The presence of larger aggregates was found to lead to a larger PL red-shift. Besides, as the degree of aggregation increased, the PL decay became slower. We attribute the observed PL red-shift to energy transfer from the smaller to the larger dots within the aggregates, with the emission being realized via a long decay recombination mechanism (100-200 ns), the origin of which is discussed.

Research paper thumbnail of High capacitance density MIS capacitor using Si nanowires by MACE and ALD alumina dielectric

Ultra high density three dimensional capacitors based on Si nanowires array grown on a metal laye... more Ultra high density three dimensional capacitors based on Si nanowires array grown on a metal layer Appl. Phys. Lett. 101, 083110 (2012); 10.1063/1.4746762 Dispersive capacitance and conductance across the phase transition boundary in metal-vanadium oxide-silicon devices J. Appl. Phys. 106, 034101 (2009); 10.1063/1.3186024 Molecular-beam epitaxial growth of III-V semiconductors on Ge ∕ Si for metal-oxide-semiconductor device fabrication Appl. Phys. Lett. 92, 203502 (2008); 10.1063/1.2929386

Research paper thumbnail of Method for Al thin film surface nanostructuring using Al imprinting and anodic oxidation: Application to a high capacitance density metal-insulator-metal capacitor

A method for Al thin film surface nanostructuring using Al imprinting with a silicon insert and s... more A method for Al thin film surface nanostructuring using Al imprinting with a silicon insert and subsequent anodic oxidation and selective oxide removal for nanostructure thinning and surface smoothing is presented. Al imprinting results in direct pattern transfer of the Si insert pattern, while anodic oxidation results in an increase of the nanostructure pattern aspect ratio due to the observed anodic oxidation anisotropy between the vertical direction and sidewalls. Al lines of 120 nm width and height-to-width ratio of 6 were thus achieved, starting from a Si insert of 500 nm wide lines with a height-to-width ratio of 1, resulting in an effective surface area increase ×2.4, confirmed by a corresponding capacitance density increase of a MIM capacitor using the nanostructured Al thin film as the bottom electrode. The developed method is simple, fast, versatile, and does not require any expensive equipment for its realization. It can be used for the formation of a variety of different nanostructures on the Al surface, for use in a large variety of applications.

Research paper thumbnail of Significant enhancement of the thermoelectric figure of merit of polycrystalline Si films by reducing grain size

Research paper thumbnail of High-Performance Crystalline Si Solar Cell on n-Type Si With a Thin Emitter by Al-Induced Crystallization and Doping

A novel crystalline Si solar cell on n-type Si with a very thin emitter (35-nm thick), formed by ... more A novel crystalline Si solar cell on n-type Si with a very thin emitter (35-nm thick), formed by Al-induced crystallization (AIC) and doping of an initially amorphous Si (a-Si) layer, is reported. The process for the emitter formation started with the deposition of an Al (10 nm)/a-Si (35 nm) bilayer on n-type Si, followed by annealing at 500°C. During annealing, the a-Si layer was crystallized and doped with Al; crystallization and doping depend on the process conditions and initial layers' thickness. With the specific conditions used, part of the a-Si layer remained amorphous (layer between the emitter and the Si substrate), and this was advantageous for solar cell operation. High-resolution transmission electron microscopy (TEM) was used to investigate the structural properties of the AIC layer. Grains within the crystallized layer showed preferred orientation in the (111) crystallographic direction. The fabricated solar cell with the above AIC thin emitter showed a power efficiency of 13.5% without using any antireflection coating or passivation layer. A special architecture was used at the front side of the solar cell, with the AIC layer developed on a thermal silicon oxide grid. The developed process is trending toward a simple, low-cost, low-temperature, high-efficiency c-Si solar cell.

Research paper thumbnail of High Seebeck Coefficient of Porous Silicon: Study of the Porosity Dependence

In-plane Seebeck coefficient of porous Si free-standing membranes of different porosities was acc... more In-plane Seebeck coefficient of porous Si free-standing membranes of different porosities was accurately measured at room temperature. Quasi-steady-state differential Seebeck coefficient method was used for the measurements. A detailed description of our home-built setup is presented. The Seebeck coefficient was proved to increase with increasing porosity up to a maximum of~1 mV/K for the~50 % porosity membrane, which is more than a threefold increase compared to the starting highly doped bulk c-Si substrate. By further increasing porosity and after a maximum is reached, the Seebeck coefficient sharply decreases and stabilizes at~600 μV/K. The possible mechanisms that determine this behaviour are discussed, supported by structural characterization and photoluminescence measurements. The decrease in nanostructure size and increase in carrier depletion with increasing porosity, together with the complex structure and morphology of porous Si, are at the origin of complex energy filtering and phonon drag effects. All the above contribute to the observed anomalous behaviour of thermopower as a function of porosity and will be discussed.

Research paper thumbnail of 2017 J Phys D 50 195302_3ω method_Porous Si thermal conductivity.pdf

Thermal conductivity measurement of porous silicon by the pulsed-photothermal method E Amin-Chalh... more Thermal conductivity measurement of porous silicon by the pulsed-photothermal method E Amin-Chalhoub, N Semmar, L Coudron et al. Temperature-dependent thermal conductivity of porous silicon G Gesele, J Linsmeier, V Drach et al.

Research paper thumbnail of Electromagnetic Instability of Surface Waves in Semiconductor Superlattices

Journal of Nanoscience and Nanotechnology, 2003

It is shown that in semiconductor superlattices surface electromagnetic waves traveling in the di... more It is shown that in semiconductor superlattices surface electromagnetic waves traveling in the direction parallel to the external static electric field may become unstable. This instability manifests itself in the emission of electromagnetic waves. The instability criteria are derived, and the frequency as well as the growth increment and the direction of the emitted waves are determined.

Research paper thumbnail of Generation of guided terahertz electromagnetic waves in semiconductor superlattices

Journal of Physics: Conference Series, 2005

It is shown that in semiconductor superlattices (SL), guided electromagnetic waves traveling in t... more It is shown that in semiconductor superlattices (SL), guided electromagnetic waves traveling in the direction perpendicular to the optical axis of the SL can be generated. The regime with vertical constant electric field in a short plate of SL is considered. The effective homogeneous anisotropic medium method is used to obtain the effective differential conductivity tensor. The guided wave structure as well as the instability and amplification conditions are investigated. Discrete sets of values for the frequency of the excited guided waves and for the directions of the emitted waves are determined.

Research paper thumbnail of High Seebeck Coefficient of Porous Silicon: Study of the Porosity Dependence

Nanoscale research letters, 2016

In-plane Seebeck coefficient of porous Si free-standing membranes of different porosities was acc... more In-plane Seebeck coefficient of porous Si free-standing membranes of different porosities was accurately measured at room temperature. Quasi-steady-state differential Seebeck coefficient method was used for the measurements. A detailed description of our home-built setup is presented. The Seebeck coefficient was proved to increase with increasing porosity up to a maximum of ~1 mV/K for the ~50 % porosity membrane, which is more than a threefold increase compared to the starting highly doped bulk c-Si substrate. By further increasing porosity and after a maximum is reached, the Seebeck coefficient sharply decreases and stabilizes at ~600 μV/K. The possible mechanisms that determine this behaviour are discussed, supported by structural characterization and photoluminescence measurements. The decrease in nanostructure size and increase in carrier depletion with increasing porosity, together with the complex structure and morphology of porous Si, are at the origin of complex energy filt...

Research paper thumbnail of Frontside bulk silicon micromachining using porous-silicon technology

Sensors and Actuators a Physical, Mar 1, 1998

Research paper thumbnail of Calculated optical transitions in a silicon quantum wire modulated by a quantum dot

Journal of Materials Science Materials in Electronics, 2009

The photoluminescence lifetimes of Si quantum wires and dots have been previously calculated with... more The photoluminescence lifetimes of Si quantum wires and dots have been previously calculated within a continuum model that takes into account the anisotropy of silicon band structure. Here, we present our calculations on the optical transitions in Si quantum wires modulated by a quantum dot. The geometrical parameters of the buldged wire are appropriate for porous Si and the ground state is localized. The photoluminescence lifetimes are calculated and compared with those of straight wires and dots. The magnitude of the lifetime is sensitive to the structural parameters of the nanostructures. Lifetimes varying from nanoseconds to milliseconds have been obtained. The results of the calculations provide insight to the optical properties of Si nanostructures.

Research paper thumbnail of Determination of critical points on silicon nanofilms: surface and quantum confinement effects

Physica Status Solidi C Current Topics in Solid State Physics, Dec 1, 2008

ABSTRACT In this work, we present a comprehensive study of the optical properties of nanocrystall... more ABSTRACT In this work, we present a comprehensive study of the optical properties of nanocrystalline silicon films with thickness varied from 5 to 30 nm. Spectroscopic ellipsometry is employed to determine the dielectric functions of these films using a structural two-layer model based on the rigorous Airy formula. Our investigation gives an important insight of the origin of critical points for direct and indirect gaps of nanocrystalline silicon films as well as the evolution of them with decreasing the film thickness. The influence of the quantum confinement effect due to the nanoscale grain size and the surface vibrations at the interface on the optical properties are examined in detail. (© 2008 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim)

Research paper thumbnail of Highly ordered hexagonally arranged nanostructures on silicon through a self-assembled silicon-integrated porous anodic alumina masking layer

Nanotechnology, Dec 10, 2008

A combined process of electrochemical formation of self-assembled porous anodic alumina thin film... more A combined process of electrochemical formation of self-assembled porous anodic alumina thin films on a Si substrate and Si etching through the pores was used to fabricate ideally ordered nanostructures on the silicon surface with a long-range, two-dimensional arrangement in a hexagonal close-packed lattice. Pore arrangement in the alumina film was achieved without any pre-patterning of the film surface before anodization. Perfect pattern transfer was achieved by an initial dry etching step, followed by wet or electrochemical etching of Si at the pore bottoms. Anisotropic wet etching using tetramethyl ammonium hydroxide (TMAH) solution resulted in pits in the form of inverted pyramids, while electrochemical etching using a hydrofluoric acid (HF) solution resulted in concave nanopits in the form of semi-spheres. Nanopatterns with lateral size in the range 12-200 nm, depth in the range 50-300 nm and periodicity in the range 30-200 nm were achieved either on large Si areas or on pre-selected confined areas on the Si substrate. The pore size and periodicity were tuned by changing the electrolyte for porous anodic alumina formation and the alumina pore widening time. This parallel large-area nanopatterning technique shows significant potential for use in Si technology and devices.

Research paper thumbnail of Accelerated Publication: Charge-trapping MOS memory structure using anodic alumina charging medium

Microelectronic Engineering, Jul 1, 2011

Research paper thumbnail of Neggative differential resistance in metal sputtered Alumina Si20191004 79906 qwxmj1

J. Phys. D: Appl. Phys. 52 (2019) 085101 (9pp), 2019

We report on the observation of voltage-controlled stable and repeatable negative differential re... more We report on the observation of voltage-controlled stable and repeatable negative differential resistance (NDR) in Al/Al2O3/n-type Si structures. The NDR is shown to be stable and repeatable both during multiple scans on the same device and between different devices. NDR peak-to-valley ratios up to 100 were measured, with a valley at 2 × 10−13 A. The maximum peak-to-valley ratio was observed for a voltage step of 0.05 V with dV/dt = 0.1 V s−1 and a step delay time of 0.1 s. The effect is transient, meaning that it tends to
disappear for dc conditions. The observed NDR is markedly different from other previously reported NDRs in insulators since it only depends on interface trapping and is not influenced by the leakage current through the device which is below the noise floor of our measurement system (2 × 10−14 A). The origin of the observed NDR is attributed to charging and discharging of traps at the metal-insulator interface.

Research paper thumbnail of Porous Silicon as a Material for Thermoelectric Devices

Porous Silicon: From Formation to Applications: Optoelectronics, Microelectronics, and Energy Technology Applications, Volume Three, 2016

Research paper thumbnail of Thin Film Thermopile Arrangement

Research paper thumbnail of High-Performance On-Chip Low-Pass Filters Using CPW and Slow-Wave-CPW Transmission Lines on Porous Silicon

We report on the design, fabrication, and characterization of high-performance stepped-impedance ... more We report on the design, fabrication, and characterization of high-performance stepped-impedance filters (SIFs) on a locally formed porous Si layer on the CMOS Si wafer. This technology provides the appropriate platform to reduce the high losses within the Si substrate, along with the possibility to tune the substrate permittivity in order to achieve high characteristic impedance (Z C ) transmission lines, which are important for the specific filters and other passive circuits, e.g., power dividers. By combining high-Z C coplanar waveguides (CPWs) and low-Z C slow-wave CPWs (S-CPWs), high-quality SIFs were achieved, with cutoff frequencies at 30 and 60 GHz. These SIFs were characterized in the frequency range of 0-100 GHz and demonstrated an insertion loss lower than 2 dB in the whole passband and a rejection higher than 30 dB in the stopband. The achieved performance is better than that exhibited by SIFs using only S-CPWs.

Research paper thumbnail of Direct Al-Imprinting Method for Increased Effective Electrode Area in MIM Capacitors

A method for enhancing the capacitance density of metal-insulator-metal (MIM) capacitor by direct... more A method for enhancing the capacitance density of metal-insulator-metal (MIM) capacitor by directly imprinting an Al thin film on a Si wafer using a Si stamp is presented. Micrometer-sized features with a depth of up to 1.8 μm are demonstrated, showing an increase in the effective Al film area of up to 58%. MIM capacitors with an anodic barrier-type alumina dielectric were fabricated using both imprinted electrodes and flat electrodes. An increase of the capacitance density of the MIM capacitors with the increase of the effective surface area was achieved without increasing the nonlinearity coefficient α. This is not the case when the capacitance density increase is achieved by decreasing the dielectric thickness. We showed that for a capacitance density of ∼10 fF/μm 2 , the value of α was 45% lower in the case of the imprinted electrodes compared with that of flat electrodes. The obtained results represent a novel method for creating high-density MIM capacitors without very large values of α. The leakage current is shown to remain low in spite of the surface area increase. This is attributed to the reduction of surface roughness of the electrodes, caused by the imprinting process.

Research paper thumbnail of Energy transfer in aggregated CuInS 2 /ZnS core-shell quantum dots deposited as solid films

We report on the morphology and optical properties of CuInS 2 /ZnS core-shell quantum dots in sol... more We report on the morphology and optical properties of CuInS 2 /ZnS core-shell quantum dots in solid films by means of AFM, SEM, HRTEM, steady state and time-resolved photoluminescence (PL) spectroscopy. The amount of aggregation of the CuInS 2 /ZnS QDs was controlled by changing the preparation conditions of the films. A red-shift of the PL spectrum of CuInS 2 /ZnS core-shell quantum dots, deposited as solid films on silicon substrates, is observed upon increasing the amount of aggregation. The presence of larger aggregates was found to lead to a larger PL red-shift. Besides, as the degree of aggregation increased, the PL decay became slower. We attribute the observed PL red-shift to energy transfer from the smaller to the larger dots within the aggregates, with the emission being realized via a long decay recombination mechanism (100-200 ns), the origin of which is discussed.

Research paper thumbnail of High capacitance density MIS capacitor using Si nanowires by MACE and ALD alumina dielectric

Ultra high density three dimensional capacitors based on Si nanowires array grown on a metal laye... more Ultra high density three dimensional capacitors based on Si nanowires array grown on a metal layer Appl. Phys. Lett. 101, 083110 (2012); 10.1063/1.4746762 Dispersive capacitance and conductance across the phase transition boundary in metal-vanadium oxide-silicon devices J. Appl. Phys. 106, 034101 (2009); 10.1063/1.3186024 Molecular-beam epitaxial growth of III-V semiconductors on Ge ∕ Si for metal-oxide-semiconductor device fabrication Appl. Phys. Lett. 92, 203502 (2008); 10.1063/1.2929386

Research paper thumbnail of Method for Al thin film surface nanostructuring using Al imprinting and anodic oxidation: Application to a high capacitance density metal-insulator-metal capacitor

A method for Al thin film surface nanostructuring using Al imprinting with a silicon insert and s... more A method for Al thin film surface nanostructuring using Al imprinting with a silicon insert and subsequent anodic oxidation and selective oxide removal for nanostructure thinning and surface smoothing is presented. Al imprinting results in direct pattern transfer of the Si insert pattern, while anodic oxidation results in an increase of the nanostructure pattern aspect ratio due to the observed anodic oxidation anisotropy between the vertical direction and sidewalls. Al lines of 120 nm width and height-to-width ratio of 6 were thus achieved, starting from a Si insert of 500 nm wide lines with a height-to-width ratio of 1, resulting in an effective surface area increase ×2.4, confirmed by a corresponding capacitance density increase of a MIM capacitor using the nanostructured Al thin film as the bottom electrode. The developed method is simple, fast, versatile, and does not require any expensive equipment for its realization. It can be used for the formation of a variety of different nanostructures on the Al surface, for use in a large variety of applications.

Research paper thumbnail of Significant enhancement of the thermoelectric figure of merit of polycrystalline Si films by reducing grain size

Research paper thumbnail of High-Performance Crystalline Si Solar Cell on n-Type Si With a Thin Emitter by Al-Induced Crystallization and Doping

A novel crystalline Si solar cell on n-type Si with a very thin emitter (35-nm thick), formed by ... more A novel crystalline Si solar cell on n-type Si with a very thin emitter (35-nm thick), formed by Al-induced crystallization (AIC) and doping of an initially amorphous Si (a-Si) layer, is reported. The process for the emitter formation started with the deposition of an Al (10 nm)/a-Si (35 nm) bilayer on n-type Si, followed by annealing at 500°C. During annealing, the a-Si layer was crystallized and doped with Al; crystallization and doping depend on the process conditions and initial layers' thickness. With the specific conditions used, part of the a-Si layer remained amorphous (layer between the emitter and the Si substrate), and this was advantageous for solar cell operation. High-resolution transmission electron microscopy (TEM) was used to investigate the structural properties of the AIC layer. Grains within the crystallized layer showed preferred orientation in the (111) crystallographic direction. The fabricated solar cell with the above AIC thin emitter showed a power efficiency of 13.5% without using any antireflection coating or passivation layer. A special architecture was used at the front side of the solar cell, with the AIC layer developed on a thermal silicon oxide grid. The developed process is trending toward a simple, low-cost, low-temperature, high-efficiency c-Si solar cell.

Research paper thumbnail of High Seebeck Coefficient of Porous Silicon: Study of the Porosity Dependence

In-plane Seebeck coefficient of porous Si free-standing membranes of different porosities was acc... more In-plane Seebeck coefficient of porous Si free-standing membranes of different porosities was accurately measured at room temperature. Quasi-steady-state differential Seebeck coefficient method was used for the measurements. A detailed description of our home-built setup is presented. The Seebeck coefficient was proved to increase with increasing porosity up to a maximum of~1 mV/K for the~50 % porosity membrane, which is more than a threefold increase compared to the starting highly doped bulk c-Si substrate. By further increasing porosity and after a maximum is reached, the Seebeck coefficient sharply decreases and stabilizes at~600 μV/K. The possible mechanisms that determine this behaviour are discussed, supported by structural characterization and photoluminescence measurements. The decrease in nanostructure size and increase in carrier depletion with increasing porosity, together with the complex structure and morphology of porous Si, are at the origin of complex energy filtering and phonon drag effects. All the above contribute to the observed anomalous behaviour of thermopower as a function of porosity and will be discussed.

Research paper thumbnail of 2017 J Phys D 50 195302_3ω method_Porous Si thermal conductivity.pdf

Thermal conductivity measurement of porous silicon by the pulsed-photothermal method E Amin-Chalh... more Thermal conductivity measurement of porous silicon by the pulsed-photothermal method E Amin-Chalhoub, N Semmar, L Coudron et al. Temperature-dependent thermal conductivity of porous silicon G Gesele, J Linsmeier, V Drach et al.

Research paper thumbnail of Electromagnetic Instability of Surface Waves in Semiconductor Superlattices

Journal of Nanoscience and Nanotechnology, 2003

It is shown that in semiconductor superlattices surface electromagnetic waves traveling in the di... more It is shown that in semiconductor superlattices surface electromagnetic waves traveling in the direction parallel to the external static electric field may become unstable. This instability manifests itself in the emission of electromagnetic waves. The instability criteria are derived, and the frequency as well as the growth increment and the direction of the emitted waves are determined.

Research paper thumbnail of Generation of guided terahertz electromagnetic waves in semiconductor superlattices

Journal of Physics: Conference Series, 2005

It is shown that in semiconductor superlattices (SL), guided electromagnetic waves traveling in t... more It is shown that in semiconductor superlattices (SL), guided electromagnetic waves traveling in the direction perpendicular to the optical axis of the SL can be generated. The regime with vertical constant electric field in a short plate of SL is considered. The effective homogeneous anisotropic medium method is used to obtain the effective differential conductivity tensor. The guided wave structure as well as the instability and amplification conditions are investigated. Discrete sets of values for the frequency of the excited guided waves and for the directions of the emitted waves are determined.

Research paper thumbnail of High Seebeck Coefficient of Porous Silicon: Study of the Porosity Dependence

Nanoscale research letters, 2016

In-plane Seebeck coefficient of porous Si free-standing membranes of different porosities was acc... more In-plane Seebeck coefficient of porous Si free-standing membranes of different porosities was accurately measured at room temperature. Quasi-steady-state differential Seebeck coefficient method was used for the measurements. A detailed description of our home-built setup is presented. The Seebeck coefficient was proved to increase with increasing porosity up to a maximum of ~1 mV/K for the ~50 % porosity membrane, which is more than a threefold increase compared to the starting highly doped bulk c-Si substrate. By further increasing porosity and after a maximum is reached, the Seebeck coefficient sharply decreases and stabilizes at ~600 μV/K. The possible mechanisms that determine this behaviour are discussed, supported by structural characterization and photoluminescence measurements. The decrease in nanostructure size and increase in carrier depletion with increasing porosity, together with the complex structure and morphology of porous Si, are at the origin of complex energy filt...

Research paper thumbnail of Frontside bulk silicon micromachining using porous-silicon technology

Sensors and Actuators a Physical, Mar 1, 1998

Research paper thumbnail of Calculated optical transitions in a silicon quantum wire modulated by a quantum dot

Journal of Materials Science Materials in Electronics, 2009

The photoluminescence lifetimes of Si quantum wires and dots have been previously calculated with... more The photoluminescence lifetimes of Si quantum wires and dots have been previously calculated within a continuum model that takes into account the anisotropy of silicon band structure. Here, we present our calculations on the optical transitions in Si quantum wires modulated by a quantum dot. The geometrical parameters of the buldged wire are appropriate for porous Si and the ground state is localized. The photoluminescence lifetimes are calculated and compared with those of straight wires and dots. The magnitude of the lifetime is sensitive to the structural parameters of the nanostructures. Lifetimes varying from nanoseconds to milliseconds have been obtained. The results of the calculations provide insight to the optical properties of Si nanostructures.

Research paper thumbnail of Determination of critical points on silicon nanofilms: surface and quantum confinement effects

Physica Status Solidi C Current Topics in Solid State Physics, Dec 1, 2008

ABSTRACT In this work, we present a comprehensive study of the optical properties of nanocrystall... more ABSTRACT In this work, we present a comprehensive study of the optical properties of nanocrystalline silicon films with thickness varied from 5 to 30 nm. Spectroscopic ellipsometry is employed to determine the dielectric functions of these films using a structural two-layer model based on the rigorous Airy formula. Our investigation gives an important insight of the origin of critical points for direct and indirect gaps of nanocrystalline silicon films as well as the evolution of them with decreasing the film thickness. The influence of the quantum confinement effect due to the nanoscale grain size and the surface vibrations at the interface on the optical properties are examined in detail. (© 2008 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim)

Research paper thumbnail of Highly ordered hexagonally arranged nanostructures on silicon through a self-assembled silicon-integrated porous anodic alumina masking layer

Nanotechnology, Dec 10, 2008

A combined process of electrochemical formation of self-assembled porous anodic alumina thin film... more A combined process of electrochemical formation of self-assembled porous anodic alumina thin films on a Si substrate and Si etching through the pores was used to fabricate ideally ordered nanostructures on the silicon surface with a long-range, two-dimensional arrangement in a hexagonal close-packed lattice. Pore arrangement in the alumina film was achieved without any pre-patterning of the film surface before anodization. Perfect pattern transfer was achieved by an initial dry etching step, followed by wet or electrochemical etching of Si at the pore bottoms. Anisotropic wet etching using tetramethyl ammonium hydroxide (TMAH) solution resulted in pits in the form of inverted pyramids, while electrochemical etching using a hydrofluoric acid (HF) solution resulted in concave nanopits in the form of semi-spheres. Nanopatterns with lateral size in the range 12-200 nm, depth in the range 50-300 nm and periodicity in the range 30-200 nm were achieved either on large Si areas or on pre-selected confined areas on the Si substrate. The pore size and periodicity were tuned by changing the electrolyte for porous anodic alumina formation and the alumina pore widening time. This parallel large-area nanopatterning technique shows significant potential for use in Si technology and devices.

Research paper thumbnail of Accelerated Publication: Charge-trapping MOS memory structure using anodic alumina charging medium

Microelectronic Engineering, Jul 1, 2011