monigha priya - Academia.edu (original) (raw)

monigha priya

Uploads

Papers by monigha priya

Research paper thumbnail of AN EFFICIENT IMPLEMENTATION OF AES IN FPGA

Speed and area reduction are one of the major issues in VLSI applications. An implementation of t... more Speed and area reduction are one of the major issues in VLSI applications. An implementation of the Advanced Encryption Standard (AES) algorithm is presented in this paper. The design uses looping method will reduce area and increase the speed .By using encrypted round for speed and pipelining ,isomorphic mapping method for area.This algorithm achieves efficiency and high throughput.

Research paper thumbnail of AN EFFICIENT IMPLEMENTATION OF AES IN FPGA

Speed and area reduction are one of the major issues in VLSI applications. An implementation of t... more Speed and area reduction are one of the major issues in VLSI applications. An implementation of the Advanced Encryption Standard (AES) algorithm is presented in this paper. The design uses looping method will reduce area and increase the speed .By using encrypted round for speed and pipelining ,isomorphic mapping method for area.This algorithm achieves efficiency and high throughput.

Log In