shivani verma - Academia.edu (original) (raw)
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Papers by shivani verma
Optimum use of power and electricity safety are today a major concern for the mankind. The effici... more Optimum use of power and electricity safety are today a major concern for the mankind. The efficiency with which we are meeting the energy service demands should be examined. This proposed system will be helpful in detection of abnormal power usage and analysing power consumption in organizations / buildings. It also has the potential to monitor the load and health of electrical appliances which encourages the sustainable city development and green campus concept. Our system is a prototype that will be gathering the power consumption data from electrical appliances via sensors and then analyse this data on a monitor interfaced with Raspberry pi using live charts. This will alert the user to make correct and timely decisions about the appliances being used. The data gathered from sensors is being transferred to Raspberry pi through Nordic (Nrf24L01) wirelessly. This methodology can be employed for many applications including faulty system detection/Quality Control in manufacturing industries and usage optimisation at home/buildings.
International Journal of Physical Sciences, May 18, 2011
The key issue of applying Turbo codes is to find an efficient implementation of turbo decoder. Th... more The key issue of applying Turbo codes is to find an efficient implementation of turbo decoder. This paper addresses the implementation of a simplified and efficient turbo decoder in field programmable gate array (FPGA) technology. A simplified and efficient implementation of a Turbo decoder with minor performance loss has been proposed. An integer Turbo decoder based on the standard 2's complement number system after considering the issues of dynamic range, truncation effect and other algorithm related subjects has been introduced. The efficient implementation comes from algorithm modification, integer arithmetic and compact hardware management. Based on the Max-Log-MAP decoding algorithm, the branch metric is modified by weighting a priori value, resulting in a significant BER improvement. The Turbo decoder takes in 8-level integer inputs generates 7-bit soft-decisions and calculates all metrics on integers, avoiding complex floating point or fixed-point arithmetic. By manipulating memory address, delay associated with interleaving and de-interleaving is eliminated, resulting in much higher throughput. Also, by taking advantage of identical decoder function, Turbo decoder is implemented in a single-decoder structure, making efficient use of memory and logic cells.
Wireless Personal Communications, 2015
Interleaving is frequently used in digital communication and storage systems to improve the perfo... more Interleaving is frequently used in digital communication and storage systems to improve the performance of forward error correcting codes. For turbo codes, an interleaver is an integral component and its proper design is crucial for good performance. Quadratic permutation polynomial (QPP) interleaver is a contention-free interleaver which is suitable for parallel turbo decoder implementation. This paper proposes a novel interleaver design, a variant of QPP interleaver, for turbo codes, which permutes a sequence of bits with the same statistical distribution as a conventional QPP interleaver and performs as well as or better than the conventional QPP. Proposed architecture has been simulated and synthesized using Xilinx and HDL Designer tools. Very large scale integration architecture for the proposed interleaver has been presented and analyzed for trade-off in terms of area, delay and power dissipation. Thermal power dissipation and device utilization have been computed for the proposed design using QuartusII (32-bit) tool. The paper also presents a comparison between the proposed variant of QPP interleaver and the conventional QPP interleaver.
Optimum use of power and electricity safety are today a major concern for the mankind. The effici... more Optimum use of power and electricity safety are today a major concern for the mankind. The efficiency with which we are meeting the energy service demands should be examined. This proposed system will be helpful in detection of abnormal power usage and analysing power consumption in organizations / buildings. It also has the potential to monitor the load and health of electrical appliances which encourages the sustainable city development and green campus concept. Our system is a prototype that will be gathering the power consumption data from electrical appliances via sensors and then analyse this data on a monitor interfaced with Raspberry pi using live charts. This will alert the user to make correct and timely decisions about the appliances being used. The data gathered from sensors is being transferred to Raspberry pi through Nordic (Nrf24L01) wirelessly. This methodology can be employed for many applications including faulty system detection/Quality Control in manufacturing industries and usage optimisation at home/buildings.
International Journal of Physical Sciences, May 18, 2011
The key issue of applying Turbo codes is to find an efficient implementation of turbo decoder. Th... more The key issue of applying Turbo codes is to find an efficient implementation of turbo decoder. This paper addresses the implementation of a simplified and efficient turbo decoder in field programmable gate array (FPGA) technology. A simplified and efficient implementation of a Turbo decoder with minor performance loss has been proposed. An integer Turbo decoder based on the standard 2's complement number system after considering the issues of dynamic range, truncation effect and other algorithm related subjects has been introduced. The efficient implementation comes from algorithm modification, integer arithmetic and compact hardware management. Based on the Max-Log-MAP decoding algorithm, the branch metric is modified by weighting a priori value, resulting in a significant BER improvement. The Turbo decoder takes in 8-level integer inputs generates 7-bit soft-decisions and calculates all metrics on integers, avoiding complex floating point or fixed-point arithmetic. By manipulating memory address, delay associated with interleaving and de-interleaving is eliminated, resulting in much higher throughput. Also, by taking advantage of identical decoder function, Turbo decoder is implemented in a single-decoder structure, making efficient use of memory and logic cells.
Wireless Personal Communications, 2015
Interleaving is frequently used in digital communication and storage systems to improve the perfo... more Interleaving is frequently used in digital communication and storage systems to improve the performance of forward error correcting codes. For turbo codes, an interleaver is an integral component and its proper design is crucial for good performance. Quadratic permutation polynomial (QPP) interleaver is a contention-free interleaver which is suitable for parallel turbo decoder implementation. This paper proposes a novel interleaver design, a variant of QPP interleaver, for turbo codes, which permutes a sequence of bits with the same statistical distribution as a conventional QPP interleaver and performs as well as or better than the conventional QPP. Proposed architecture has been simulated and synthesized using Xilinx and HDL Designer tools. Very large scale integration architecture for the proposed interleaver has been presented and analyzed for trade-off in terms of area, delay and power dissipation. Thermal power dissipation and device utilization have been computed for the proposed design using QuartusII (32-bit) tool. The paper also presents a comparison between the proposed variant of QPP interleaver and the conventional QPP interleaver.