sreenivasa prabhu - Academia.edu (original) (raw)
Address: Kakinada, Andhra Pradesh India
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Voltage sag is one of the most common power quality disturbances in electric networks. It is nece... more Voltage sag is one of the most common power quality disturbances in electric networks. It is necessary to investigate voltage sag due to consumers' vulnerability. Faults are the main cause of voltage sags in distribution networks. Fault in distribution networks according to its specifications (its location, duration and time) can cause an interruption or a voltage sag at the nodes of the network. By making random faults, the voltage sag in such networks can be investigated. The proposed structure prevents voltage sag and phase-angle jump of the substation PCC after fault occurrence. This structure has a simple control method. Using the semiconductor switch (insulated-gate bipolar transistor or gate turnoff thyristor at dc current rout leads to fast operation of the proposed FCL and, consequently, dc reactor value is reduced. On the other hand, the proposed structure reduces the total harmonic distortion on load voltage and it has low ac losses in normal operation. As a result, other feeders, which are connected to the substation PCC, will have good power quality. In this paper a three phase fault current limiter is proposed. A Matlab/Simulink model is developed and simulation results are presented.
Voltage sag is one of the most common power quality disturbances in electric networks. It is nece... more Voltage sag is one of the most common power quality disturbances in electric networks. It is necessary to investigate voltage sag due to consumers' vulnerability. Faults are the main cause of voltage sags in distribution networks. Fault in distribution networks according to its specifications (its location, duration and time) can cause an interruption or a voltage sag at the nodes of the network. By making random faults, the voltage sag in such networks can be investigated. The proposed structure prevents voltage sag and phase-angle jump of the substation PCC after fault occurrence. This structure has a simple control method. Using the semiconductor switch (insulated-gate bipolar transistor or gate turnoff thyristor at dc current rout leads to fast operation of the proposed FCL and, consequently, dc reactor value is reduced. On the other hand, the proposed structure reduces the total harmonic distortion on load voltage and it has low ac losses in normal operation. As a result, other feeders, which are connected to the substation PCC, will have good power quality. In this paper a three phase fault current limiter is proposed. A Matlab/Simulink model is developed and simulation results are presented.