Samares Kar - Indian Institute of Technology, Kanpur (original) (raw)

Papers by Samares Kar

Research paper thumbnail of Abstracts of Papers in "Dielectric Materials and Metals for Nanoelectronics and Photonics 10"

ECS Transactions 50 (4), 2012

Full Text (PDF) Abstract 2 Non Volatile Memory: Abstract Full Text (PDF) Abstract 3 Non Volatile ... more Full Text (PDF) Abstract 2 Non Volatile Memory: Abstract Full Text (PDF) Abstract 3 Non Volatile Memory: Abstract Full Text (PDF) Abstract 4 Non Volatile Memory: Abstract Full Text (PDF) Abstract 5 Non Volatile Memory: Abstract Full Text (PDF) Abstract 6 Novel Dielectrics: Naoto Umezawa (Invited) Theoretical Perspectives in Defect and Impurity Physics toward Materials Design for Oxides Abstract Full Text (PDF) Abstract 7 Novel Dielectrics: Abstract Full Text (PDF) Abstract 8 Novel Dielectrics: Abstract Full Text (PDF) Abstract 9 Novel Dielectrics: Abstract Full Text (PDF) Abstract Full Text (PDF) Abstract 11 Novel Dielectrics: Abstract Full Text (PDF) Abstract 12 Novel Dielectrics: Abstract Full Text (PDF) Abstract 13 Novel Dielectrics: Abstract Full Text (PDF) Abstract 14 Ge Channel: Abstract Full Text (PDF) Abstract 15 Ge Channel: Abstract Full Text (PDF) Abstract 16 III-V Surface Passivation: Abstract Full Text (PDF) Abstract 17 III-V Surface Passivation: Abstract Full Text (PDF) Abstract 18 III-V Surface Passivation: Abstract Full Text (PDF) Abstract 19 III-V Surface Passivation: Abstract Full Text (PDF) Abstract 20 III-V Surface Passivation: Abstract Full Text (PDF) Abstract 21 III-V Surface Passivation: Abstract Full Text (PDF) Abstract 22 Metal Work Function Tuning: Abstract Full Text (PDF) Abstract 23 Metal Work Function Tuning: Abstract Full Text (PDF) Abstract 24 Metal Work Function Tuning: Abstract Full Text (PDF) Abstract 25 Metal Work Function Tuning: Abstract Full Text (PDF) Abstract 26 FinFET and 3-D Transistors: Abstract Full Text (PDF) Abstract 27 FinFET and 3-D Transistors: Abstract Full Text (PDF) Abstract 28 FinFET and 3-D Transistors: Abstract Full Text (PDF) Abstract 29 FinFET and 3-D Transistors: Abstract Full Text (PDF) Abstract 30 Reliability: Abstract Full Text (PDF) Abstract 31 Reliability: Abstract Full Text (PDF) Abstract 32 Strain Characterization: Abstract Full Text (PDF) Abstract 33 Strain Characterization: Abstract Full Text (PDF) Abstract 34 Nano-Wire Technology: Abstract Full Text (PDF) Abstract 35 Nano-Wire Technology: Abstract Full Text (PDF) Abstract 36 Nano-Wire Technology: Abstract Full Text (PDF) Abstract 37 EOT Scaling: Abstract Full Text (PDF) Abstract 38 EOT Scaling: 11/2/2014 Selected Abstracts Abstract Full Text (PDF) Abstract 39 EOT Scaling: Abstract Full Text (PDF) Abstract 40 Interface Related Studies: Abstract Full Text (PDF) Abstract 41 Interface Related Studies: Abstract Full Text (PDF) Abstract 42 Interface Related Studies: Abstract Full Text (PDF) Abstract 43 Interface Related Studies: Abstract Full Text (PDF) Abstract 44 Device Manufacturing: Abstract Full Text (PDF) Abstract 45 Device Manufacturing: Abstract Full Text (PDF) Abstract 46 Device Manufacturing: Vahid Mohammadi, Wiebe de Boer, Tom L.M. Scholtes, and Lis K. Nanver Local-Loading Effects for Pure-Boron-Layer Chemical-Vapor Deposition Abstract Full Text (PDF) Abstract 47 Device Manufacturing: Abstract Full Text (PDF) Abstract 48 Device Manufacturing: Abstract Full Text (PDF) Abstract 1 of 48 Non Volatile Memory Abstract 44 of 48 Device Manufacturing In this paper we will report the results of TiN metal gate recession using a dilute mixture of sulfuric acid, hydrogen peroxide and hydrofluoric acid known by the trade name DSP+ Abstract 45 of 48 Device Manufacturing

Research paper thumbnail of Abstracts of Papers in "Physics and Technology of High-k Materials 9"

ECS Transactions 41 (3), 2011

Full Text (PDF) Abstract 2 Ge/GeSi Channels: Abstract Full Text (PDF) Abstract 3 Ge/GeSi Channels... more Full Text (PDF) Abstract 2 Ge/GeSi Channels: Abstract Full Text (PDF) Abstract 3 Ge/GeSi Channels: Abstract Full Text (PDF) Abstract 4 Ge/GeSi Channels: Abstract Full Text (PDF) Abstract 5 Ge/GeSi Channels: Leonidas Tsetseris Abstract Full Text (PDF) Abstract 6 Ge/GeSi Channels: Abstract Full Text (PDF) Abstract 7 New Transistor Concepts: Abstract Full Text (PDF) Abstract 8 New Transistor Concepts: Leonidas Tsetseris and Sokrates Pantelides Abstract Full Text (PDF) Abstract 11 New Memory and Gate Dielectrics: Apurba Laha, A Bin, P R P Babu, A Fissel, and H Jörg Osten Abstract Full Text (PDF) Abstract 12 New Memory and Gate Dielectrics: Abstract Full Text (PDF) Abstract 13 New Memory and Gate Dielectrics: Abstract Full Text (PDF) Abstract 15 Dielectric Deposition and Processing: Shinji Migita and Hiroyuki Ota (Invited) Epitaxial HfO 2 Thin Films on Si Substrates: Strategy for Sub-1 nm EOT Technology Abstract Full Text (PDF) Abstract 16 Dielectric Deposition and Processing: Abstract Full Text (PDF) Abstract 17 Dielectric Deposition and Processing: Abstract Full Text (PDF) Abstract 18 Dielectric Deposition and Processing: Abstract Full Text (PDF) Abstract 19 Dielectric Deposition and Processing: Abstract Full Text (PDF) Abstract 20 Dielectric Deposition and Processing: Abstract Full Text (PDF) Abstract 21 Dielectric Deposition and Processing: Abstract Full Text (PDF) Abstract 22 Dielectric Deposition and Processing: Abstract Full Text (PDF) Abstract 23 III-V Channels: Abstract Full Text (PDF) Abstract 24 III-V Channels: Abstract Full Text (PDF) Abstract 25 III-V Channels: Abstract Full Text (PDF) Abstract 26 III-V Channels: Abstract Full Text (PDF) Abstract 27 III-V Channels: Abstract Full Text (PDF) Abstract 28 III-V Channels: Abstract Full Text (PDF) Abstract 29 III-V Channels: Abstract Full Text (PDF) Abstract 30 Other Dielectric Materials: Abstract Full Text (PDF) Abstract 31 Other Dielectric Materials: Abstract Full Text (PDF) Abstract 32 Other Dielectric Materials: Abstract Full Text (PDF) Abstract 33 Other Dielectric Materials: Abstract Full Text (PDF) Abstract 34 Characterization: Abstract Full Text (PDF) Abstract 35 Characterization: Abstract Full Text (PDF) Abstract 36 Defects, Traps, and Reliability: Abstract Full Text (PDF) Abstract 37 Defects, Traps, and Reliability: Abstract Full Text (PDF) Abstract 38 Defects, Traps, and Reliability: Abstract Full Text (PDF) Abstract 39 Defects, Traps, and Reliability: Abstract Full Text (PDF) Abstract 40 Defects, Traps, and Reliability: S. Kar A Drain Current -Drain Voltage Relation for MOSFETs with High-k Gate Stacks Abstract Full Text (PDF) Abstract 41 Defects, Traps, and Reliability: Kiyoteru Kobayashi and Kokichi Ishikawa Conduction Currents and Paramagnetic Defect Centers in UV-Illuminated Silicon Nitride Films Abstract Full Text (PDF) Abstract 42 Defects, Traps, and Reliability: Abstract Full Text (PDF) Abstract 43 Abstract Full Text (PDF) Abstract 44 Abstract Full Text (PDF) Abstract 45 Abstract Full Text (PDF) Abstract 46 Abstract Full Text (PDF) Abstract 47 Resistive Switching: Abstract Full Text (PDF) Abstract 48 Resistive Switching: Abstract Full Text (PDF) Abstract 49 Resistive Switching: Fun-Tat Chin, Wen-Abstract Full Text (PDF) Abstract 50 Resistive Switching: Abstract Full Text (PDF) Abstract 51 Resistive Switching: Abstract Full Text (PDF) Abstract 33 of 51 Other Dielectric Materials

Research paper thumbnail of Abstracts of Papers in "Physics and Technology of High-k Gate Dielectrics 6"

ECS Transactions 16 (5), 2008

Full Text (PDF) Abstract 2 Metal Work Function: Abstract Full Text (PDF) Abstract 3 Metal Work Fu... more Full Text (PDF) Abstract 2 Metal Work Function: Abstract Full Text (PDF) Abstract 3 Metal Work Function: Abstract Full Text (PDF) Abstract 4 Metal Work Function: Abstract Full Text (PDF) Abstract 5 Reliability: Abstract Full Text (PDF) Abstract 6 Reliability: Abstract Full Text (PDF) Abstract 7 Reliability: Abstract Full Text (PDF) Abstract 8 Reliability: Abstract Full Text (PDF) Abstract 9 Interfaces, Traps, and Defects I: Kouichi Muraoka Interface Engineering of a Metal/ High-k/ Ge Layered Structure by Water Vapor Discharge Abstract Full Text (PDF) Abstract 11 Interfaces, Traps, and Defects I: Samares Kar and S. Rawat Extraction of Trap Parameters for High-Κ Gate Stacks Abstract Full Text (PDF) Abstract 12 Interfaces, Traps, and Defects I: Abstract Full Text (PDF) Abstract 13 Interfaces, Traps, and Defects I: Abstract Full Text (PDF) Abstract 14 Interfaces, Traps, and Defects I: Abstract Full Text (PDF) Abstract 15 High-k Gate Stack Characteristics: Abstract Full Text (PDF) Abstract 16 High-k Gate Stack Characteristics: Abstract Full Text (PDF) Abstract 17 High-k Gate Stack Characteristics: Abstract Full Text (PDF) Abstract 18 High-k Gate Stack Characteristics: Abstract Full Text (PDF) Abstract 20 Gate Stack Processing I: Abstract Full Text (PDF) Abstract 21 Gate Stack Processing I: Abstract Full Text (PDF) Abstract 22 Gate Stack Processing I: Abstract Full Text (PDF) Abstract 23 Gate Stack Processing I: Abstract Full Text (PDF) Abstract 24 Gate Stack Processing I: Abstract Full Text (PDF) Abstract 25 Gate Stack Processing I: Abstract Full Text (PDF) Abstract 26 Gate Stack Processing I: Abstract Full Text (PDF) Abstract 27 Alternate Substrates I: Robert M. Wallace In-Situ Studies of Interfacial Bonding of High-k Dielectrics for CMOS Beyond 22nm Abstract Full Text (PDF) Abstract 28 Alternate Substrates I: Abstract Full Text (PDF) Abstract 29 Alternate Substrates I: Abstract Full Text (PDF) Abstract 30 Alternate Substrates I: Abstract Full Text (PDF) Abstract 31 Memory: Abstract Full Text (PDF) Abstract 32 Memory: Thermally Stable Hf-silicate with Modification of Si Doping and Abstract Full Text (PDF) Abstract 33 Memory: Abstract Full Text (PDF) Abstract 34 Memory: Abstract Full Text (PDF) Abstract 35 Memory: Abstract Full Text (PDF) Abstract 36 Integration: Abstract Full Text (PDF) Abstract 37 Alternate Substrates II: Abstract Full Text (PDF) Abstract 39 Alternate Substrates II: Abstract Full Text (PDF) Abstract 40 Interfaces, Traps, and Defects II: Abstract Full Text (PDF) Abstract 41 Interfaces, Traps, and Defects II: Abstract Full Text (PDF) Abstract 42 Interfaces, Traps, and Defects II: Abstract Full Text (PDF) Abstract 43 Interfaces, Traps, and Defects II: Abstract Full Text (PDF) Abstract 44 Interfaces, Traps, and Defects II: Samares Kar and S. Rawat Modelling of Layers and Traps in High-Κ Gate Stacks and Energy Band and Equivalent Circuit Representations Abstract Full Text (PDF) Abstract 45 Interfaces, Traps, and Defects II: Abstract Full Text (PDF) Abstract 46 Interfaces, Traps, and Defects II: Abstract Full Text (PDF) Abstract 48 Gate Stack Processing II: Abstract Full Text (PDF) Abstract 49 Gate Stack Processing II: Abstract Full Text (PDF) Abstract 50 Gate Stack Processing II: Abstract Full Text (PDF) Abstract 51 Electrical Characteristics: Abstract Full Text (PDF) Abstract 52 Electrical Characteristics: Abstract Full Text (PDF) Abstract 1 of 52 Metal Work Function

Research paper thumbnail of Abstracts of Papers in "Physics and Technology of High-k Gate Dielectrics 5"

ECS Transactions 11 (4), 2007

Full Text (PDF) Abstract 2 Hf-Based High-k Materials: Abstract Full Text (PDF) Abstract 3 Hf-Base... more Full Text (PDF) Abstract 2 Hf-Based High-k Materials: Abstract Full Text (PDF) Abstract 3 Hf-Based High-k Materials: Abstract Full Text (PDF) Abstract 4 Hf-Based High-k Materials: Abstract Full Text (PDF) Abstract 5 Hf-Based High-k Materials: Gian-Marco Rignanese First-Principles Study Abstract Full Text (PDF) Abstract 6 Hf-Based High-k Materials: Abstract Full Text (PDF) Abstract 7 Hf-Based High-k Materials: Abstract Full Text (PDF) Abstract 8 Physical/Chemical Characterization: Abstract Full Text (PDF) Abstract 9 Physical/Chemical Characterization: Abstract Full Text (PDF) Abstract 10 Physical/Chemical Characterization: Abstract Full Text (PDF) Abstract 11 Physical/Chemical Characterization: Abstract Full Text (PDF) Abstract 12 Metal Gate Electrodes I: Abstract Full Text (PDF) Abstract 13 Metal Gate Electrodes I: Abstract Full Text (PDF) Abstract 14 Metal Gate Electrodes I: Abstract Full Text (PDF) Abstract 15 Metal Gate Electrodes I: Abstract Full Text (PDF) Abstract 16 Metal Gate Electrodes I: Abstract Full Text (PDF) Abstract 17 Defects and Interfaces: Abstract Full Text (PDF) Abstract Full Text (PDF) Abstract 19 Defects and Interfaces: Abstract Full Text (PDF) Abstract 20 Defects and Interfaces: Abstract Full Text (PDF) Abstract 21 Defects and Interfaces: Abstract Full Text (PDF) Abstract 23 Defects and Interfaces: Abstract Full Text (PDF) Abstract 24 Integration: Abstract Full Text (PDF) Abstract 25 Integration: Abstract Full Text (PDF) Abstract 26 Non-Hf-Based High-k Materials: Abstract Full Text (PDF) Abstract 27 Non-Hf-Based High-k Materials: 11/2/2014 Selected Abstracts Abstract Full Text (PDF) Abstract 28 Non-Hf-Based High-k Materials: Abstract Full Text (PDF) Abstract 29 Non-Hf-Based High-k Materials: Abstract Full Text (PDF) Abstract 30 Electrical Characterization: Abstract Full Text (PDF) Abstract 31 Electrical Characterization: Abstract Full Text (PDF) Abstract 32 Electrical Characterization: Abstract Full Text (PDF) Abstract 33 Electrical Characterization: Abstract Full Text (PDF) Abstract 34 Electrical Characterization: Abstract Full Text (PDF) Abstract 35 High Mobility Substrates: Abstract Full Text (PDF) Abstract 36 High Mobility Substrates: Abstract Full Text (PDF) Abstract 37 High Mobility Substrates: Abstract Full Text (PDF) Abstract 38 High Mobility Substrates: Abstract Full Text (PDF) Abstract 39 High Mobility Substrates: Abstract Full Text (PDF) Abstract 40 High Mobility Substrates: Abstract Full Text (PDF) Abstract 41 High Mobility Substrates: Abstract Full Text (PDF) Abstract 42 High Mobility Substrates: Abstract Full Text (PDF) Abstract 43 High-k Memories: Abstract Full Text (PDF) Abstract 44 High-k Memories: Abstract Full Text (PDF) Abstract 45 High-k Memories: Abstract Full Text (PDF) Abstract 46 High-k Memories: Abstract Full Text (PDF) Abstract 47 Metal Gate Electrodes II: Abstract Full Text (PDF) Abstract 48 Metal Gate Electrodes II: Abstract Full Text (PDF) Abstract 49 Abstract Full Text (PDF) Abstract 50 Metal Gate Electrodes II: Abstract Full Text (PDF) Abstract 51 Metal Gate Electrodes II: Abstract Full Text (PDF) Abstract 52 Metal Gate Electrodes II: Abstract Full Text (PDF) Abstract 53 Metal Gate Electrodes II: Abstract Full Text (PDF) Abstract 54 Reliability Issues: Abstract Full Text (PDF) Abstract 55 Reliability Issues: Abstract Full Text (PDF) Abstract 56 Reliability Issues: Abstract Full Text (PDF) Abstract 57 Reliability Issues: Abstract Full Text (PDF) Abstract 1 of 57 Hf-Based High-k Materials Abstract 54 of 57 Reliability Issues

Research paper thumbnail of Physics and Technology of High-k Gate Dielectrics 3

ECS Transactions 1 (5), 2005

1 Abstract 1 High Mobility Substrates High Mobility Substrates: : Abstract Abstract Full Text (PD... more 1 Abstract 1 High Mobility Substrates High Mobility Substrates: : Abstract Abstract Full Text (PDF) Full Text (PDF) Abstract 2 Abstract 2 High Mobility Substrates High Mobility Substrates: : Abstract Abstract Full Text (PDF) Full Text (PDF) Abstract 3 Abstract 3 High Mobility Substrates High Mobility Substrates: : Abstract Abstract Full Text (PDF) Full Text (PDF) Abstract 4 Abstract 4 High Mobility Substrates High Mobility Substrates: : Abstract Abstract Full Text (PDF) Full Text (PDF) Abstract 5 Abstract 5 High Mobility Substrates High Mobility Substrates: : Abstract Abstract Full Text (PDF) Full Text (PDF) Abstract 6 Abstract 6 High Mobility Substrates High Mobility Substrates: : Abstract Abstract Full Text (PDF) Full Text (PDF) Abstract 7 Abstract 7 High-k Materials for Non-Volatile Memory High-k Materials for Non-Volatile Memory: : Abstract Abstract Full Text (PDF) Full Text (PDF) Abstract 8 Abstract 8 High-k Materials for Non-Volatile Memory High-k Materials for Non-Volatile Memory: : Abstract Abstract Full Text (PDF) Full Text (PDF) Abstract 9 Abstract 9 High-k Materials for Non-Volatile Memory High-k Materials for Non-Volatile Memory: : Abstract Abstract Full Text (PDF) Full Text (PDF) Abstract 10 Abstract 10 Abstract Abstract Full Text (PDF) Full Text (PDF) Abstract 11 Abstract 11 High-k Materials for Non-Volatile Memory High-k Materials for Non-Volatile Memory: : Abstract Abstract Full Text (PDF) Full Text (PDF) Abstract 12 Abstract 12 Abstract Abstract Full Text (PDF) Full Text (PDF) Abstract 13 Abstract 13 Abstract Abstract Full Text (PDF) Full Text (PDF) Abstract 14 Abstract 14 Abstract Abstract Full Text (PDF) Full Text (PDF) Abstract 15 Abstract 15 Abstract Abstract Full Text (PDF) Full Text (PDF) Abstract 16 Abstract 16 Abstract Abstract Full Text (PDF) Full Text (PDF) Abstract 17 Abstract 17 High-k Materials and Processing I High-k Materials and Processing I: : Abstract Abstract Full Text (PDF) Full Text (PDF) Abstract 18 Abstract 18 High-k Materials and Processing I High-k Materials and Processing I: : Abstract Abstract Full Text (PDF) Abstract Abstract Full Text (PDF) Full Text (PDF) Abstract 20 Abstract 20 Abstract Abstract Full Text (PDF) Full Text (PDF) Abstract 21 Abstract 21 Abstract Abstract Full Text (PDF) Full Text (PDF) Abstract 22 Abstract 22 High-k Materials and Processing II High-k Materials and Processing II: : Abstract Abstract Full Text (PDF) Full Text (PDF) Abstract 23 Abstract 23 High-k Materials and Processing II High-k Materials and Processing II: : Daniel J. Lichtenwalner, Jesse Jur, Naoya Inoue, and Angus Kingon High-Temperature Processing Effects on Lanthanum Silicate High-Temperature Processing Effects on Lanthanum Silicate Gate Dielectric MIS Devices Gate Abstract Abstract Full Text (PDF) Full Text (PDF) Abstract 24 Abstract 24 Abstract Abstract Full Text (PDF) Full Text (PDF) Abstract 25 Abstract 25 High-k Materials and Processing II High-k Materials and Processing II: : Abstract Abstract Full Text (PDF) Full Text (PDF) Abstract 26 Abstract 26 Abstract Abstract Full Text (PDF) Full Text (PDF) Abstract 27 Abstract 27 Abstract Abstract Full Text (PDF) Full Text (PDF) Abstract 28 Abstract 28 Abstract Abstract Full Text (PDF) Full Text (PDF) Abstract 29 Abstract 29 Abstract Abstract Full Text (PDF) Full Text (PDF) Abstract 30 Abstract 30 Gate Electrode Materials I Gate Electrode Materials I: : Abstract Abstract Full Text (PDF) Full Text (PDF) Abstract 31 Abstract 31 Physical/Chemical Characterization Physical/Chemical Characterization: : Abstract Abstract Full Text (PDF) Full Text (PDF) Abstract 32 Abstract 32 Physical/Chemical Characterization Physical/Chemical Characterization: : Abstract Abstract Full Text (PDF) Full Text (PDF) Abstract 33 Abstract 33 Physical/Chemical Characterization Physical/Chemical Characterization: : Abstract Abstract Full Text (PDF) Full Text (PDF) Abstract 34 Abstract 34 Physical/Chemical Characterization Physical/Chemical Characterization: : Abstract Abstract Full Text (PDF) Full Text (PDF) Abstract 35 Abstract 35 Physical/Chemical Characterization Physical/Chemical Characterization: : Abstract Abstract Full Text (PDF) Full Text (PDF) Abstract 36 Abstract 36 Interfaces and Defects Interfaces and Defects: : Abstract Abstract Full Text (PDF) Full Text (PDF) Abstract 37 Abstract 37 Interfaces and Defects Interfaces and Defects: : Abstract Abstract Full Text (PDF) Full Text (PDF) Abstract 38 Abstract 38 Interfaces and Defects Interfaces and Defects: : Abstract Abstract Full Text (PDF) Full Text (PDF) Abstract 39 Abstract 39 Interfaces and Defects Interfaces and Defects: : Abstract Abstract Full Text (PDF) Full Text (PDF) Abstract 40 Abstract 40 Interfaces and Defects Interfaces and Defects: : Abstract Abstract Full Text (PDF) Full Text (PDF) Abstract 41 Abstract 41 Interfaces and Defects Interfaces and Defects: : Abstract Abstract Full Text (PDF) Full Text (PDF) Abstract 42 Abstract 42 Interfaces and Defects Interfaces and Defects: : Abstract Abstract Full Text (PDF) Full Text (PDF) Abstract 43 Abstract 43 Interfaces and Defects Interfaces and Defects: : Abstract Abstract Full Text (PDF) Full Text (PDF) Abstract 44 Abstract 44 Abstract Abstract Full Text (PDF) Full Text (PDF) Abstract 45 Abstract 45 Abstract Abstract Full Text (PDF) Full Text (PDF) Abstract 46 Abstract 46 Abstract Abstract Full Text (PDF) Full Text (PDF) Abstract 47 Abstract 47 Abstract Abstract Full Text (PDF) Full Text (PDF) Abstract 48 Abstract 48 Abstract Abstract Full Text (PDF) Full Text (PDF) Abstract 49 Abstract 49 Abstract Abstract Full Text (PDF) Full Text (PDF) Abstract 50 Abstract 50 Abstract Abstract Full Text (PDF) Full Text (PDF) Abstract Abstract Full Text (PDF) Abstract Abstract Full Text (PDF) Full Text (PDF) Abstract 53 Abstract 53 Abstract Abstract Full Text (PDF) Full Text (PDF) Abstract 54 Abstract 54 Electrical and Reliability Characterization I Electrical and Reliability Characterization I: : Abstract Abstract Full Text (PDF) Full Text (PDF) Abstract 55 Abstract 55 Electrical and Reliability Characterization I Electrical and Reliability Characterization I: : Abstract Abstract Full Text (PDF) Full Text (PDF) Abstract 56 Abstract 56 Electrical and Reliability Characterization I Electrical and Reliability Characterization I: : Abstract Abstract Full Text (PDF) Full Text (PDF) Abstract 57 Abstract 57 Electrical and Reliability Characterization I Electrical and Reliability Characterization I: : Abstract Abstract Full Text (PDF) Full Text (PDF) Abstract 58 Abstract 58 Electrical and Reliability Characterization I Electrical and Reliability Characterization I: : Abstract Abstract Full Text (PDF) Full Text (PDF) Abstract 59 Abstract 59 High-k Transistor Performance High-k Transistor Performance: : Abstract Abstract Full Text (PDF) Full Text (PDF) Abstract 60 Abstract 60 High-k Transistor Performance High-k Transistor Performance: : Abstract Abstract Full Text (PDF) Full Text (PDF) Abstract 61 Abstract 61 High-k Transistor Performance High-k Transistor Performance: : Abstract Abstract Full Text (PDF) Full Text (PDF) Abstract 62 Abstract 62 High-k Transistor Performance High-k Transistor Performance: : Abstract Abstract Full Text (PDF) Full Text (PDF) Abstract 63 Abstract 63 High-k Transistor Performance High-k Transistor Performance: : Dim-Lee Kwong CMOS Integration Issues with High-K/Metal Gate Stack CMOS Integration Issues with High-K/Metal Gate Stack Abstract Abstract Full Text (PDF) Full Text (PDF) Abstract 64 Abstract 64 Abstract Abstract Full Text (PDF) Full Text (PDF) Abstract 65 Abstract 65 Abstract Abstract Full Text (PDF) Full Text (PDF) Abstract 66 Abstract 66 Electrical and Reliability Characterization II Electrical and Reliability Characterization II: : Abstract Abstract Full Text (PDF) Full Text (PDF) Abstract 67 Abstract 67 Electrical and Reliability Characterization II Electrical and Reliability Characterization II: : Abstract Abstract Full Text (PDF) Full Text (PDF) Abstract 68 Abstract 68 Abstract Abstract Full Text (PDF) Full Text (PDF) Abstract 69 Abstract 69 Electrical and Reliability Characterization II Electrical and Reliability Characterization II: : Abstract Abstract Full Text (PDF) Full Text (PDF) Abstract 70 Abstract 70 Electrical and Reliability Characterization III Electrical and Reliability Characterization III: : Abstract Abstract Full Text (PDF) Full Text (PDF) Abstract 71 Abstract 71 Abstract Abstract Full Text (PDF) Full Text (PDF) Abstract 72 Abstract 72 Electrical and Reliability Characterization III Electrical and Reliability Characterization III: : Abstract Abstract Full Text (PDF) Full Text (PDF) Abstract 73 Abstract 73 Electrical and Reliability Characterization III Electrical and Reliability Characterization III: : Abstract Abstract Full Text (PDF) Full Text (PDF) Abstract 74 Abstract 74 Electrical and Reliability Characterization III Electrical and Reliability Characterization III: : Abstract Abstract Full Text (PDF) Full Text (PDF) Abstract 75 Abstract 75 Electrical and Reliability Characterization III Electrical and Reliability Characterization III: : Abstract Abstract Full Text (PDF) Full Text (PDF) Abstract 1 Abstract 1 of 75 of 75 High Mobility Substrates High Mobility Substrates Abstract 3 Abstract 3 of 75 of 75 High Mobility Substrates High Mobility Substrates

Research paper thumbnail of Physics and Technology of High-k Gate Dielectrics II

ECS Proceedings PV 2003-22, 2003

Research paper thumbnail of Physics and Technology of High-k Gate Dielectrics I

ECS Proceedings PV 2002-28, 2002

Research paper thumbnail of On the Characteristics of Traps and Charges in the Si/SiO2/HfO2/TaN High-k Gate Stacks

ECS Journal of Solid State Science and Technology 3(3), N30 (2014), 2014

High-k gate stacks were fabricated with the p-Si/graded-SiO 2 /HfO 2 /TaN configuration; control ... more High-k gate stacks were fabricated with the p-Si/graded-SiO 2 /HfO 2 /TaN configuration; control samples were fabricated with the p-Si/graded-SiO 2 /TaN configuration. A host of device parameters were extracted from the measured admittance data, including the gate stack capacitance density, the surface potential in the accumulation regime, the standard deviation of the surface potential, the interface trap density, trap energy, and trap capture cross-section, the flatband charge density in the SiO 2 intermediate layer, the flatband charge density in the HfO 2 high-k layer, and the accumulation surface potential coefficient, many of which were extracted for the first time for the high-k gate stacks. The experimental results provided new information on the nature of defects (interface traps and bulk charges) in the SiO 2 intermediate layer and in the HfO 2 high-k layer.

Research paper thumbnail of Closed-Form Model for High-k MOSFET Channel Parameters: Reflecting Non-Saturating Inversion Surface Potential, Gate Stack Traps, and Work Function Anomaly

ECS Journal of Solid State Science and Technology 1(4), Q79 (2012), 2012

Closed-form, textbook-appropriate equations have been derived for the drain current I D , the cha... more Closed-form, textbook-appropriate equations have been derived for the drain current I D , the channel conductance g D , and the transconductance g m of high-k MOSFETs, incorporating high-k gate stack charges Q di,gsc , non-saturating inversion surface potential increase ϕ s,inv , and work-function difference φ MS . These ab initio relations, developed without imposing any assumptions, provide a clear view of the degrading effects of the high-k gate stack charges, the non-saturating inversion surface potential, and the semiconductor-metal work function difference on I D , g D , and g m . Rational estimates have been made of the latter which illustrate the relative weights of each of the three non-ideal factors in the degradation of the channel parameters of the high-k gate stack. The degradation appears to be most severe for the channel conductance, followed by the drain current, and then the trans-conductance. The work-function anomaly does not directly affect the trans-conductance for which the major degrading factor is the non-saturating surface potential. Even for moderate drain voltages, the numerical estimates reveal the drain current versus the drain voltage relation to become more non-linear in the case of the high-k gate stack. Comparison with the available experimental high-k gate stack data supports the import of these equations.

Research paper thumbnail of A Drain Current - Drain Voltage Relation for MOSFETs with High-k Gate Stacks

ECS Transactions 41 (3) pp. 389-400, 2011

New analytical MOSFET drain-current-drain-voltage relations have been derived incorporating effec... more New analytical MOSFET drain-current-drain-voltage relations have been derived incorporating effects of gate stack traps and charges, semiconductor-metal work function difference, and nonsaturating surface potential, employing a novel approach of treating these complicating factors. These analytical drain current, transconductance, and channel conductance versus drain voltage relations in closed form provide a comprehensive and clear physical picture and show directly how the gate stack traps and charges, the non-saturating surface potential, and the semiconductor-metal work function difference affect and significantly degrade the drain current, the transconductance, and the channel conductance. ECS Transactions, 41 (3) 389-400 (2011) 10.1149/1.3633054 © The Electrochemical Society ) unless CC License in place (see abstract). ecsdl.org/site/terms_use address. Redistribution subject to ECS terms of use (see 117.248.136.120 Downloaded on 2014-10-23 to IP ECS Transactions, 41 (3) 389-400 (2011) 390 ) unless CC License in place (see abstract). ecsdl.org/site/terms_use address. Redistribution subject to ECS terms of use (see 117.248.136.120 Downloaded on 2014-10-23 to IP

Research paper thumbnail of Nature of Interface Traps in Si/SiO2/HfO2/TiN Gate Stacks and its Correlation with the Flat-Band Voltage Roll-Off

ECS Transactions 25 (6), pp. 399-408, 2009

We have carried out a detailed experimental investigation of the trap parameters -trap energy, tr... more We have carried out a detailed experimental investigation of the trap parameters -trap energy, trap density, and hole capture crosssection -in a large number of p-Si/SiO 2 /HfO 2 /TaN MOS capacitors fabricated on wafers with graded SiO 2 layer, and of the flat-band voltage, using a newly developed admittance spectroscopy technique, which yields accurate values of the surface potential and the flat-band voltage, and makes use of the measured conductance to obtain accurate values of the trap parameters. The correlation, if any, between the trap density and the flat-band voltage has been analyzed.

Research paper thumbnail of Modelling of layers and traps in high-k gate stacks and energy bands and equivalent circuit representations

ECS Transactions 16 (5), pp. 443-453, 2008

Five layers -two bulk and three chemically graded layers -have been identified to constitute the ... more Five layers -two bulk and three chemically graded layers -have been identified to constitute the high-Κ gate stack; the bulk layers being the intermediate oxide and the high-Κ layers; the three chemically graded layers being the silicon/intermediate-oxide, the intermediate-oxide/high-Κ, and the high-Κ/metal-oxide interfacial layers. Energy band diagrams across the silicon space-charge layer, the five gate stack layers, and the metal electrode, have been modeled, in which graded band-gap in the chemically graded layer, and the effects of the electric fields in the gate stack and image force barrier lowering have been considered. Response of traps in all the five layers of the gate stack to an applied small signal has been modeled, including the profile of the quasi-Fermi function in the gate stack. Relations for the potentials across the five gate stack layers have been formulated. Finally, small-signal equivalent circuit representations have been developed for the entire gate stack and the silicon space-charge layer.

Research paper thumbnail of Extraction of trap parameters for high-k gate stacks

ECS Transactions 16 (5), pp. 111-120, 2008

A small-signal steady state admittance technique, containing some new approaches, is outlined in ... more A small-signal steady state admittance technique, containing some new approaches, is outlined in this paper, for the extraction of the trap parameters, such as the trap density, the trap-energy, and the trap-capture-cross-section/trap-location in the direction perpendicular to the interface, for high-Κ gate stacks. This technique also yields the experimental values of the total gatedielectric-stack capacitance, the flat-band voltage, and the surface potential. This technique is applied to p-Si/SiO 2 /HfO 2 /TaN MOS capacitors, and the results are presented and analyzed.

Research paper thumbnail of Parameter extraction using novel phenomena in nano-MOSFETs with ultra-thin (EOT = 0.46-1.93 nm) high-k gate dielectrics

Thin Solid Films 504, 178 (2006) , 2006

Novel features of and a new technique for parameter extraction are outlined here for MOS devices ... more Novel features of and a new technique for parameter extraction are outlined here for MOS devices with ultra-thin high-K MOS devices. These parameters include the channel doping density, the doping density profile, and the flat-band voltage-all very important for the high-K technology, besides the surface potential, the gate dielectric capacitance, and the accumulation surface potential quotient. The reliability of the new technique was confirmed by comparison with the results from other techniques. The experimental results indicate diffusion of metal impurities into the channel region during the device processing. D

Research paper thumbnail of Study of silicon-organic interfaces by admittance spectroscopy

Applied Surface Science, Oct 21, 2005

An admittance spectroscopy technique has been developed for the interfaces between organic monola... more An admittance spectroscopy technique has been developed for the interfaces between organic monolayers and silicon. The present work involves the development of an effective equivalent circuit to represent the silicon/organic-monolayer system, and the development of a parameter extraction procedure, which yields the monolayer capacitance and the monolayer thickness, the flat-band voltage, the silicon doping density, the silicon surface potential, the interface trap density, the interface trap capture cross-section and the interface trap energy. This technique was applied to three types of silicon/organic-monolayer system. #

Research paper thumbnail of Determination of the channel doping density in MOS devices with high-k devices

ECS Transactions 1 (5), pp. 553-563, 2005

A new technique is outlined here for the extraction of the channel doping density of MOS nano-tra... more A new technique is outlined here for the extraction of the channel doping density of MOS nano-transistors with high permittivity ultrathin (equivalent oxide thickness (EOT) = 0.5 to 2.0 nm) gate dielectrics, using either the accumulation or the strong inversion MOS capacitance or both. This technique also obtains the doping density at the edge of the space charge layer at the onset of strong inversion, if the device is a MOSFET. Comparision of results from the new technique is made with the interface doping density and the doping profile obtained from the Ziegler technique.

Research paper thumbnail of Characterisation of Accumulation Layer Capacitance for Extracting Data on High-k Gate Dielectrics

IEEE Transactions on Electron Devices 52(6), 1187 (2005), Jun 2005

Research paper thumbnail of Salient features in the capacitance characteristics of ultra thin high-k devices

ECS Transactions 1 (5), pp. 745-756, 2005

Salient features of MOS (Metal Oxide Silicon) devices with ultra-thin high-gate dielectrics are o... more Salient features of MOS (Metal Oxide Silicon) devices with ultra-thin high-gate dielectrics are outlined here, which include the following. In the case of the ultra-thin (EOT < 2 nm) gate dielectrics, the capacitance-voltage (C-V) and the surface potential versus bias (ϕ s -V) characteristics are dominated by the accumulation and the strong inversion regimes, in contrast to the case of the thicker gate dielectrics, where these characteristics are dominated by depletion and weak inversion regimes. In the strong accumulation regime, the experimental lnC p (ϕ s ) plot (C p is the sum of the space charge capacitance C sc and the interface trap capacitance C it ) was found to be a straight line, and its slope β acc varied strongly with the gate dielectric material and was found to be inversely proportional to [(φ b m*/m) 1/2 Κ/C di ], where φ b is the conduction/valence band offset, m* is the effective electron/hole tunneling mass, Κ is the dielectric constant, and C di is the gate dielectric capacitance. β acc -1 may be considered as a gate-dielectric direct-tunneling current index. The experimental results highlight significant deficiencies in the theory and modeling of carrier confinement effects, and suggest strong influence of the gate dielectric on the accumulation and strong inversion layer capacitance, in the case of ultra-thin high-Κ gate dielectrics. ECS Transactions, 1 (5) 745-756 (2006) 10.1149/1.2209320, copyright The Electrochemical Society 745 ) unless CC License in place (see abstract). ecsdl.org/site/terms_use address. Redistribution subject to ECS terms of use (see 117.248.136.120 Downloaded on 2014-10-23 to IP

Research paper thumbnail of Extraction of the Capacitance of Ultra-thin High-k Gate Dielectrics

IEEE Transactions on Electron Devices 50(10), 2112 (2003), Oct 2003

Research paper thumbnail of High Quality ZrO2 Thin Films on <100> Si Substrates as a Gate Dielectric Material: Processing and Characterization

ECS Proceedings Volume 2002-28, pp. 41-48, 2002

High dielectric constant gate materials offer the possibility of pushing the CMOS technology in t... more High dielectric constant gate materials offer the possibility of pushing the CMOS technology in the realm of 10-20 nm feature sizes. Among various potential high κ materials, ZrO 2 fulfils most of the stringent criterions, in terms of device performance and manufacturing requirements, to be considered as a gate material replacement for SiO 2 . As the dielectric constant of ZrO 2 is higher (for bulk ZrO 2 , κ= ~25) than that of SiO 2 , it will provide a significant increase in capacitance without scaling down the oxide thickness.

Research paper thumbnail of Abstracts of Papers in "Dielectric Materials and Metals for Nanoelectronics and Photonics 10"

ECS Transactions 50 (4), 2012

Full Text (PDF) Abstract 2 Non Volatile Memory: Abstract Full Text (PDF) Abstract 3 Non Volatile ... more Full Text (PDF) Abstract 2 Non Volatile Memory: Abstract Full Text (PDF) Abstract 3 Non Volatile Memory: Abstract Full Text (PDF) Abstract 4 Non Volatile Memory: Abstract Full Text (PDF) Abstract 5 Non Volatile Memory: Abstract Full Text (PDF) Abstract 6 Novel Dielectrics: Naoto Umezawa (Invited) Theoretical Perspectives in Defect and Impurity Physics toward Materials Design for Oxides Abstract Full Text (PDF) Abstract 7 Novel Dielectrics: Abstract Full Text (PDF) Abstract 8 Novel Dielectrics: Abstract Full Text (PDF) Abstract 9 Novel Dielectrics: Abstract Full Text (PDF) Abstract Full Text (PDF) Abstract 11 Novel Dielectrics: Abstract Full Text (PDF) Abstract 12 Novel Dielectrics: Abstract Full Text (PDF) Abstract 13 Novel Dielectrics: Abstract Full Text (PDF) Abstract 14 Ge Channel: Abstract Full Text (PDF) Abstract 15 Ge Channel: Abstract Full Text (PDF) Abstract 16 III-V Surface Passivation: Abstract Full Text (PDF) Abstract 17 III-V Surface Passivation: Abstract Full Text (PDF) Abstract 18 III-V Surface Passivation: Abstract Full Text (PDF) Abstract 19 III-V Surface Passivation: Abstract Full Text (PDF) Abstract 20 III-V Surface Passivation: Abstract Full Text (PDF) Abstract 21 III-V Surface Passivation: Abstract Full Text (PDF) Abstract 22 Metal Work Function Tuning: Abstract Full Text (PDF) Abstract 23 Metal Work Function Tuning: Abstract Full Text (PDF) Abstract 24 Metal Work Function Tuning: Abstract Full Text (PDF) Abstract 25 Metal Work Function Tuning: Abstract Full Text (PDF) Abstract 26 FinFET and 3-D Transistors: Abstract Full Text (PDF) Abstract 27 FinFET and 3-D Transistors: Abstract Full Text (PDF) Abstract 28 FinFET and 3-D Transistors: Abstract Full Text (PDF) Abstract 29 FinFET and 3-D Transistors: Abstract Full Text (PDF) Abstract 30 Reliability: Abstract Full Text (PDF) Abstract 31 Reliability: Abstract Full Text (PDF) Abstract 32 Strain Characterization: Abstract Full Text (PDF) Abstract 33 Strain Characterization: Abstract Full Text (PDF) Abstract 34 Nano-Wire Technology: Abstract Full Text (PDF) Abstract 35 Nano-Wire Technology: Abstract Full Text (PDF) Abstract 36 Nano-Wire Technology: Abstract Full Text (PDF) Abstract 37 EOT Scaling: Abstract Full Text (PDF) Abstract 38 EOT Scaling: 11/2/2014 Selected Abstracts Abstract Full Text (PDF) Abstract 39 EOT Scaling: Abstract Full Text (PDF) Abstract 40 Interface Related Studies: Abstract Full Text (PDF) Abstract 41 Interface Related Studies: Abstract Full Text (PDF) Abstract 42 Interface Related Studies: Abstract Full Text (PDF) Abstract 43 Interface Related Studies: Abstract Full Text (PDF) Abstract 44 Device Manufacturing: Abstract Full Text (PDF) Abstract 45 Device Manufacturing: Abstract Full Text (PDF) Abstract 46 Device Manufacturing: Vahid Mohammadi, Wiebe de Boer, Tom L.M. Scholtes, and Lis K. Nanver Local-Loading Effects for Pure-Boron-Layer Chemical-Vapor Deposition Abstract Full Text (PDF) Abstract 47 Device Manufacturing: Abstract Full Text (PDF) Abstract 48 Device Manufacturing: Abstract Full Text (PDF) Abstract 1 of 48 Non Volatile Memory Abstract 44 of 48 Device Manufacturing In this paper we will report the results of TiN metal gate recession using a dilute mixture of sulfuric acid, hydrogen peroxide and hydrofluoric acid known by the trade name DSP+ Abstract 45 of 48 Device Manufacturing

Research paper thumbnail of Abstracts of Papers in "Physics and Technology of High-k Materials 9"

ECS Transactions 41 (3), 2011

Full Text (PDF) Abstract 2 Ge/GeSi Channels: Abstract Full Text (PDF) Abstract 3 Ge/GeSi Channels... more Full Text (PDF) Abstract 2 Ge/GeSi Channels: Abstract Full Text (PDF) Abstract 3 Ge/GeSi Channels: Abstract Full Text (PDF) Abstract 4 Ge/GeSi Channels: Abstract Full Text (PDF) Abstract 5 Ge/GeSi Channels: Leonidas Tsetseris Abstract Full Text (PDF) Abstract 6 Ge/GeSi Channels: Abstract Full Text (PDF) Abstract 7 New Transistor Concepts: Abstract Full Text (PDF) Abstract 8 New Transistor Concepts: Leonidas Tsetseris and Sokrates Pantelides Abstract Full Text (PDF) Abstract 11 New Memory and Gate Dielectrics: Apurba Laha, A Bin, P R P Babu, A Fissel, and H Jörg Osten Abstract Full Text (PDF) Abstract 12 New Memory and Gate Dielectrics: Abstract Full Text (PDF) Abstract 13 New Memory and Gate Dielectrics: Abstract Full Text (PDF) Abstract 15 Dielectric Deposition and Processing: Shinji Migita and Hiroyuki Ota (Invited) Epitaxial HfO 2 Thin Films on Si Substrates: Strategy for Sub-1 nm EOT Technology Abstract Full Text (PDF) Abstract 16 Dielectric Deposition and Processing: Abstract Full Text (PDF) Abstract 17 Dielectric Deposition and Processing: Abstract Full Text (PDF) Abstract 18 Dielectric Deposition and Processing: Abstract Full Text (PDF) Abstract 19 Dielectric Deposition and Processing: Abstract Full Text (PDF) Abstract 20 Dielectric Deposition and Processing: Abstract Full Text (PDF) Abstract 21 Dielectric Deposition and Processing: Abstract Full Text (PDF) Abstract 22 Dielectric Deposition and Processing: Abstract Full Text (PDF) Abstract 23 III-V Channels: Abstract Full Text (PDF) Abstract 24 III-V Channels: Abstract Full Text (PDF) Abstract 25 III-V Channels: Abstract Full Text (PDF) Abstract 26 III-V Channels: Abstract Full Text (PDF) Abstract 27 III-V Channels: Abstract Full Text (PDF) Abstract 28 III-V Channels: Abstract Full Text (PDF) Abstract 29 III-V Channels: Abstract Full Text (PDF) Abstract 30 Other Dielectric Materials: Abstract Full Text (PDF) Abstract 31 Other Dielectric Materials: Abstract Full Text (PDF) Abstract 32 Other Dielectric Materials: Abstract Full Text (PDF) Abstract 33 Other Dielectric Materials: Abstract Full Text (PDF) Abstract 34 Characterization: Abstract Full Text (PDF) Abstract 35 Characterization: Abstract Full Text (PDF) Abstract 36 Defects, Traps, and Reliability: Abstract Full Text (PDF) Abstract 37 Defects, Traps, and Reliability: Abstract Full Text (PDF) Abstract 38 Defects, Traps, and Reliability: Abstract Full Text (PDF) Abstract 39 Defects, Traps, and Reliability: Abstract Full Text (PDF) Abstract 40 Defects, Traps, and Reliability: S. Kar A Drain Current -Drain Voltage Relation for MOSFETs with High-k Gate Stacks Abstract Full Text (PDF) Abstract 41 Defects, Traps, and Reliability: Kiyoteru Kobayashi and Kokichi Ishikawa Conduction Currents and Paramagnetic Defect Centers in UV-Illuminated Silicon Nitride Films Abstract Full Text (PDF) Abstract 42 Defects, Traps, and Reliability: Abstract Full Text (PDF) Abstract 43 Abstract Full Text (PDF) Abstract 44 Abstract Full Text (PDF) Abstract 45 Abstract Full Text (PDF) Abstract 46 Abstract Full Text (PDF) Abstract 47 Resistive Switching: Abstract Full Text (PDF) Abstract 48 Resistive Switching: Abstract Full Text (PDF) Abstract 49 Resistive Switching: Fun-Tat Chin, Wen-Abstract Full Text (PDF) Abstract 50 Resistive Switching: Abstract Full Text (PDF) Abstract 51 Resistive Switching: Abstract Full Text (PDF) Abstract 33 of 51 Other Dielectric Materials

Research paper thumbnail of Abstracts of Papers in "Physics and Technology of High-k Gate Dielectrics 6"

ECS Transactions 16 (5), 2008

Full Text (PDF) Abstract 2 Metal Work Function: Abstract Full Text (PDF) Abstract 3 Metal Work Fu... more Full Text (PDF) Abstract 2 Metal Work Function: Abstract Full Text (PDF) Abstract 3 Metal Work Function: Abstract Full Text (PDF) Abstract 4 Metal Work Function: Abstract Full Text (PDF) Abstract 5 Reliability: Abstract Full Text (PDF) Abstract 6 Reliability: Abstract Full Text (PDF) Abstract 7 Reliability: Abstract Full Text (PDF) Abstract 8 Reliability: Abstract Full Text (PDF) Abstract 9 Interfaces, Traps, and Defects I: Kouichi Muraoka Interface Engineering of a Metal/ High-k/ Ge Layered Structure by Water Vapor Discharge Abstract Full Text (PDF) Abstract 11 Interfaces, Traps, and Defects I: Samares Kar and S. Rawat Extraction of Trap Parameters for High-Κ Gate Stacks Abstract Full Text (PDF) Abstract 12 Interfaces, Traps, and Defects I: Abstract Full Text (PDF) Abstract 13 Interfaces, Traps, and Defects I: Abstract Full Text (PDF) Abstract 14 Interfaces, Traps, and Defects I: Abstract Full Text (PDF) Abstract 15 High-k Gate Stack Characteristics: Abstract Full Text (PDF) Abstract 16 High-k Gate Stack Characteristics: Abstract Full Text (PDF) Abstract 17 High-k Gate Stack Characteristics: Abstract Full Text (PDF) Abstract 18 High-k Gate Stack Characteristics: Abstract Full Text (PDF) Abstract 20 Gate Stack Processing I: Abstract Full Text (PDF) Abstract 21 Gate Stack Processing I: Abstract Full Text (PDF) Abstract 22 Gate Stack Processing I: Abstract Full Text (PDF) Abstract 23 Gate Stack Processing I: Abstract Full Text (PDF) Abstract 24 Gate Stack Processing I: Abstract Full Text (PDF) Abstract 25 Gate Stack Processing I: Abstract Full Text (PDF) Abstract 26 Gate Stack Processing I: Abstract Full Text (PDF) Abstract 27 Alternate Substrates I: Robert M. Wallace In-Situ Studies of Interfacial Bonding of High-k Dielectrics for CMOS Beyond 22nm Abstract Full Text (PDF) Abstract 28 Alternate Substrates I: Abstract Full Text (PDF) Abstract 29 Alternate Substrates I: Abstract Full Text (PDF) Abstract 30 Alternate Substrates I: Abstract Full Text (PDF) Abstract 31 Memory: Abstract Full Text (PDF) Abstract 32 Memory: Thermally Stable Hf-silicate with Modification of Si Doping and Abstract Full Text (PDF) Abstract 33 Memory: Abstract Full Text (PDF) Abstract 34 Memory: Abstract Full Text (PDF) Abstract 35 Memory: Abstract Full Text (PDF) Abstract 36 Integration: Abstract Full Text (PDF) Abstract 37 Alternate Substrates II: Abstract Full Text (PDF) Abstract 39 Alternate Substrates II: Abstract Full Text (PDF) Abstract 40 Interfaces, Traps, and Defects II: Abstract Full Text (PDF) Abstract 41 Interfaces, Traps, and Defects II: Abstract Full Text (PDF) Abstract 42 Interfaces, Traps, and Defects II: Abstract Full Text (PDF) Abstract 43 Interfaces, Traps, and Defects II: Abstract Full Text (PDF) Abstract 44 Interfaces, Traps, and Defects II: Samares Kar and S. Rawat Modelling of Layers and Traps in High-Κ Gate Stacks and Energy Band and Equivalent Circuit Representations Abstract Full Text (PDF) Abstract 45 Interfaces, Traps, and Defects II: Abstract Full Text (PDF) Abstract 46 Interfaces, Traps, and Defects II: Abstract Full Text (PDF) Abstract 48 Gate Stack Processing II: Abstract Full Text (PDF) Abstract 49 Gate Stack Processing II: Abstract Full Text (PDF) Abstract 50 Gate Stack Processing II: Abstract Full Text (PDF) Abstract 51 Electrical Characteristics: Abstract Full Text (PDF) Abstract 52 Electrical Characteristics: Abstract Full Text (PDF) Abstract 1 of 52 Metal Work Function

Research paper thumbnail of Abstracts of Papers in "Physics and Technology of High-k Gate Dielectrics 5"

ECS Transactions 11 (4), 2007

Full Text (PDF) Abstract 2 Hf-Based High-k Materials: Abstract Full Text (PDF) Abstract 3 Hf-Base... more Full Text (PDF) Abstract 2 Hf-Based High-k Materials: Abstract Full Text (PDF) Abstract 3 Hf-Based High-k Materials: Abstract Full Text (PDF) Abstract 4 Hf-Based High-k Materials: Abstract Full Text (PDF) Abstract 5 Hf-Based High-k Materials: Gian-Marco Rignanese First-Principles Study Abstract Full Text (PDF) Abstract 6 Hf-Based High-k Materials: Abstract Full Text (PDF) Abstract 7 Hf-Based High-k Materials: Abstract Full Text (PDF) Abstract 8 Physical/Chemical Characterization: Abstract Full Text (PDF) Abstract 9 Physical/Chemical Characterization: Abstract Full Text (PDF) Abstract 10 Physical/Chemical Characterization: Abstract Full Text (PDF) Abstract 11 Physical/Chemical Characterization: Abstract Full Text (PDF) Abstract 12 Metal Gate Electrodes I: Abstract Full Text (PDF) Abstract 13 Metal Gate Electrodes I: Abstract Full Text (PDF) Abstract 14 Metal Gate Electrodes I: Abstract Full Text (PDF) Abstract 15 Metal Gate Electrodes I: Abstract Full Text (PDF) Abstract 16 Metal Gate Electrodes I: Abstract Full Text (PDF) Abstract 17 Defects and Interfaces: Abstract Full Text (PDF) Abstract Full Text (PDF) Abstract 19 Defects and Interfaces: Abstract Full Text (PDF) Abstract 20 Defects and Interfaces: Abstract Full Text (PDF) Abstract 21 Defects and Interfaces: Abstract Full Text (PDF) Abstract 23 Defects and Interfaces: Abstract Full Text (PDF) Abstract 24 Integration: Abstract Full Text (PDF) Abstract 25 Integration: Abstract Full Text (PDF) Abstract 26 Non-Hf-Based High-k Materials: Abstract Full Text (PDF) Abstract 27 Non-Hf-Based High-k Materials: 11/2/2014 Selected Abstracts Abstract Full Text (PDF) Abstract 28 Non-Hf-Based High-k Materials: Abstract Full Text (PDF) Abstract 29 Non-Hf-Based High-k Materials: Abstract Full Text (PDF) Abstract 30 Electrical Characterization: Abstract Full Text (PDF) Abstract 31 Electrical Characterization: Abstract Full Text (PDF) Abstract 32 Electrical Characterization: Abstract Full Text (PDF) Abstract 33 Electrical Characterization: Abstract Full Text (PDF) Abstract 34 Electrical Characterization: Abstract Full Text (PDF) Abstract 35 High Mobility Substrates: Abstract Full Text (PDF) Abstract 36 High Mobility Substrates: Abstract Full Text (PDF) Abstract 37 High Mobility Substrates: Abstract Full Text (PDF) Abstract 38 High Mobility Substrates: Abstract Full Text (PDF) Abstract 39 High Mobility Substrates: Abstract Full Text (PDF) Abstract 40 High Mobility Substrates: Abstract Full Text (PDF) Abstract 41 High Mobility Substrates: Abstract Full Text (PDF) Abstract 42 High Mobility Substrates: Abstract Full Text (PDF) Abstract 43 High-k Memories: Abstract Full Text (PDF) Abstract 44 High-k Memories: Abstract Full Text (PDF) Abstract 45 High-k Memories: Abstract Full Text (PDF) Abstract 46 High-k Memories: Abstract Full Text (PDF) Abstract 47 Metal Gate Electrodes II: Abstract Full Text (PDF) Abstract 48 Metal Gate Electrodes II: Abstract Full Text (PDF) Abstract 49 Abstract Full Text (PDF) Abstract 50 Metal Gate Electrodes II: Abstract Full Text (PDF) Abstract 51 Metal Gate Electrodes II: Abstract Full Text (PDF) Abstract 52 Metal Gate Electrodes II: Abstract Full Text (PDF) Abstract 53 Metal Gate Electrodes II: Abstract Full Text (PDF) Abstract 54 Reliability Issues: Abstract Full Text (PDF) Abstract 55 Reliability Issues: Abstract Full Text (PDF) Abstract 56 Reliability Issues: Abstract Full Text (PDF) Abstract 57 Reliability Issues: Abstract Full Text (PDF) Abstract 1 of 57 Hf-Based High-k Materials Abstract 54 of 57 Reliability Issues

Research paper thumbnail of Physics and Technology of High-k Gate Dielectrics 3

ECS Transactions 1 (5), 2005

1 Abstract 1 High Mobility Substrates High Mobility Substrates: : Abstract Abstract Full Text (PD... more 1 Abstract 1 High Mobility Substrates High Mobility Substrates: : Abstract Abstract Full Text (PDF) Full Text (PDF) Abstract 2 Abstract 2 High Mobility Substrates High Mobility Substrates: : Abstract Abstract Full Text (PDF) Full Text (PDF) Abstract 3 Abstract 3 High Mobility Substrates High Mobility Substrates: : Abstract Abstract Full Text (PDF) Full Text (PDF) Abstract 4 Abstract 4 High Mobility Substrates High Mobility Substrates: : Abstract Abstract Full Text (PDF) Full Text (PDF) Abstract 5 Abstract 5 High Mobility Substrates High Mobility Substrates: : Abstract Abstract Full Text (PDF) Full Text (PDF) Abstract 6 Abstract 6 High Mobility Substrates High Mobility Substrates: : Abstract Abstract Full Text (PDF) Full Text (PDF) Abstract 7 Abstract 7 High-k Materials for Non-Volatile Memory High-k Materials for Non-Volatile Memory: : Abstract Abstract Full Text (PDF) Full Text (PDF) Abstract 8 Abstract 8 High-k Materials for Non-Volatile Memory High-k Materials for Non-Volatile Memory: : Abstract Abstract Full Text (PDF) Full Text (PDF) Abstract 9 Abstract 9 High-k Materials for Non-Volatile Memory High-k Materials for Non-Volatile Memory: : Abstract Abstract Full Text (PDF) Full Text (PDF) Abstract 10 Abstract 10 Abstract Abstract Full Text (PDF) Full Text (PDF) Abstract 11 Abstract 11 High-k Materials for Non-Volatile Memory High-k Materials for Non-Volatile Memory: : Abstract Abstract Full Text (PDF) Full Text (PDF) Abstract 12 Abstract 12 Abstract Abstract Full Text (PDF) Full Text (PDF) Abstract 13 Abstract 13 Abstract Abstract Full Text (PDF) Full Text (PDF) Abstract 14 Abstract 14 Abstract Abstract Full Text (PDF) Full Text (PDF) Abstract 15 Abstract 15 Abstract Abstract Full Text (PDF) Full Text (PDF) Abstract 16 Abstract 16 Abstract Abstract Full Text (PDF) Full Text (PDF) Abstract 17 Abstract 17 High-k Materials and Processing I High-k Materials and Processing I: : Abstract Abstract Full Text (PDF) Full Text (PDF) Abstract 18 Abstract 18 High-k Materials and Processing I High-k Materials and Processing I: : Abstract Abstract Full Text (PDF) Abstract Abstract Full Text (PDF) Full Text (PDF) Abstract 20 Abstract 20 Abstract Abstract Full Text (PDF) Full Text (PDF) Abstract 21 Abstract 21 Abstract Abstract Full Text (PDF) Full Text (PDF) Abstract 22 Abstract 22 High-k Materials and Processing II High-k Materials and Processing II: : Abstract Abstract Full Text (PDF) Full Text (PDF) Abstract 23 Abstract 23 High-k Materials and Processing II High-k Materials and Processing II: : Daniel J. Lichtenwalner, Jesse Jur, Naoya Inoue, and Angus Kingon High-Temperature Processing Effects on Lanthanum Silicate High-Temperature Processing Effects on Lanthanum Silicate Gate Dielectric MIS Devices Gate Abstract Abstract Full Text (PDF) Full Text (PDF) Abstract 24 Abstract 24 Abstract Abstract Full Text (PDF) Full Text (PDF) Abstract 25 Abstract 25 High-k Materials and Processing II High-k Materials and Processing II: : Abstract Abstract Full Text (PDF) Full Text (PDF) Abstract 26 Abstract 26 Abstract Abstract Full Text (PDF) Full Text (PDF) Abstract 27 Abstract 27 Abstract Abstract Full Text (PDF) Full Text (PDF) Abstract 28 Abstract 28 Abstract Abstract Full Text (PDF) Full Text (PDF) Abstract 29 Abstract 29 Abstract Abstract Full Text (PDF) Full Text (PDF) Abstract 30 Abstract 30 Gate Electrode Materials I Gate Electrode Materials I: : Abstract Abstract Full Text (PDF) Full Text (PDF) Abstract 31 Abstract 31 Physical/Chemical Characterization Physical/Chemical Characterization: : Abstract Abstract Full Text (PDF) Full Text (PDF) Abstract 32 Abstract 32 Physical/Chemical Characterization Physical/Chemical Characterization: : Abstract Abstract Full Text (PDF) Full Text (PDF) Abstract 33 Abstract 33 Physical/Chemical Characterization Physical/Chemical Characterization: : Abstract Abstract Full Text (PDF) Full Text (PDF) Abstract 34 Abstract 34 Physical/Chemical Characterization Physical/Chemical Characterization: : Abstract Abstract Full Text (PDF) Full Text (PDF) Abstract 35 Abstract 35 Physical/Chemical Characterization Physical/Chemical Characterization: : Abstract Abstract Full Text (PDF) Full Text (PDF) Abstract 36 Abstract 36 Interfaces and Defects Interfaces and Defects: : Abstract Abstract Full Text (PDF) Full Text (PDF) Abstract 37 Abstract 37 Interfaces and Defects Interfaces and Defects: : Abstract Abstract Full Text (PDF) Full Text (PDF) Abstract 38 Abstract 38 Interfaces and Defects Interfaces and Defects: : Abstract Abstract Full Text (PDF) Full Text (PDF) Abstract 39 Abstract 39 Interfaces and Defects Interfaces and Defects: : Abstract Abstract Full Text (PDF) Full Text (PDF) Abstract 40 Abstract 40 Interfaces and Defects Interfaces and Defects: : Abstract Abstract Full Text (PDF) Full Text (PDF) Abstract 41 Abstract 41 Interfaces and Defects Interfaces and Defects: : Abstract Abstract Full Text (PDF) Full Text (PDF) Abstract 42 Abstract 42 Interfaces and Defects Interfaces and Defects: : Abstract Abstract Full Text (PDF) Full Text (PDF) Abstract 43 Abstract 43 Interfaces and Defects Interfaces and Defects: : Abstract Abstract Full Text (PDF) Full Text (PDF) Abstract 44 Abstract 44 Abstract Abstract Full Text (PDF) Full Text (PDF) Abstract 45 Abstract 45 Abstract Abstract Full Text (PDF) Full Text (PDF) Abstract 46 Abstract 46 Abstract Abstract Full Text (PDF) Full Text (PDF) Abstract 47 Abstract 47 Abstract Abstract Full Text (PDF) Full Text (PDF) Abstract 48 Abstract 48 Abstract Abstract Full Text (PDF) Full Text (PDF) Abstract 49 Abstract 49 Abstract Abstract Full Text (PDF) Full Text (PDF) Abstract 50 Abstract 50 Abstract Abstract Full Text (PDF) Full Text (PDF) Abstract Abstract Full Text (PDF) Abstract Abstract Full Text (PDF) Full Text (PDF) Abstract 53 Abstract 53 Abstract Abstract Full Text (PDF) Full Text (PDF) Abstract 54 Abstract 54 Electrical and Reliability Characterization I Electrical and Reliability Characterization I: : Abstract Abstract Full Text (PDF) Full Text (PDF) Abstract 55 Abstract 55 Electrical and Reliability Characterization I Electrical and Reliability Characterization I: : Abstract Abstract Full Text (PDF) Full Text (PDF) Abstract 56 Abstract 56 Electrical and Reliability Characterization I Electrical and Reliability Characterization I: : Abstract Abstract Full Text (PDF) Full Text (PDF) Abstract 57 Abstract 57 Electrical and Reliability Characterization I Electrical and Reliability Characterization I: : Abstract Abstract Full Text (PDF) Full Text (PDF) Abstract 58 Abstract 58 Electrical and Reliability Characterization I Electrical and Reliability Characterization I: : Abstract Abstract Full Text (PDF) Full Text (PDF) Abstract 59 Abstract 59 High-k Transistor Performance High-k Transistor Performance: : Abstract Abstract Full Text (PDF) Full Text (PDF) Abstract 60 Abstract 60 High-k Transistor Performance High-k Transistor Performance: : Abstract Abstract Full Text (PDF) Full Text (PDF) Abstract 61 Abstract 61 High-k Transistor Performance High-k Transistor Performance: : Abstract Abstract Full Text (PDF) Full Text (PDF) Abstract 62 Abstract 62 High-k Transistor Performance High-k Transistor Performance: : Abstract Abstract Full Text (PDF) Full Text (PDF) Abstract 63 Abstract 63 High-k Transistor Performance High-k Transistor Performance: : Dim-Lee Kwong CMOS Integration Issues with High-K/Metal Gate Stack CMOS Integration Issues with High-K/Metal Gate Stack Abstract Abstract Full Text (PDF) Full Text (PDF) Abstract 64 Abstract 64 Abstract Abstract Full Text (PDF) Full Text (PDF) Abstract 65 Abstract 65 Abstract Abstract Full Text (PDF) Full Text (PDF) Abstract 66 Abstract 66 Electrical and Reliability Characterization II Electrical and Reliability Characterization II: : Abstract Abstract Full Text (PDF) Full Text (PDF) Abstract 67 Abstract 67 Electrical and Reliability Characterization II Electrical and Reliability Characterization II: : Abstract Abstract Full Text (PDF) Full Text (PDF) Abstract 68 Abstract 68 Abstract Abstract Full Text (PDF) Full Text (PDF) Abstract 69 Abstract 69 Electrical and Reliability Characterization II Electrical and Reliability Characterization II: : Abstract Abstract Full Text (PDF) Full Text (PDF) Abstract 70 Abstract 70 Electrical and Reliability Characterization III Electrical and Reliability Characterization III: : Abstract Abstract Full Text (PDF) Full Text (PDF) Abstract 71 Abstract 71 Abstract Abstract Full Text (PDF) Full Text (PDF) Abstract 72 Abstract 72 Electrical and Reliability Characterization III Electrical and Reliability Characterization III: : Abstract Abstract Full Text (PDF) Full Text (PDF) Abstract 73 Abstract 73 Electrical and Reliability Characterization III Electrical and Reliability Characterization III: : Abstract Abstract Full Text (PDF) Full Text (PDF) Abstract 74 Abstract 74 Electrical and Reliability Characterization III Electrical and Reliability Characterization III: : Abstract Abstract Full Text (PDF) Full Text (PDF) Abstract 75 Abstract 75 Electrical and Reliability Characterization III Electrical and Reliability Characterization III: : Abstract Abstract Full Text (PDF) Full Text (PDF) Abstract 1 Abstract 1 of 75 of 75 High Mobility Substrates High Mobility Substrates Abstract 3 Abstract 3 of 75 of 75 High Mobility Substrates High Mobility Substrates

Research paper thumbnail of Physics and Technology of High-k Gate Dielectrics II

ECS Proceedings PV 2003-22, 2003

Research paper thumbnail of Physics and Technology of High-k Gate Dielectrics I

ECS Proceedings PV 2002-28, 2002

Research paper thumbnail of On the Characteristics of Traps and Charges in the Si/SiO2/HfO2/TaN High-k Gate Stacks

ECS Journal of Solid State Science and Technology 3(3), N30 (2014), 2014

High-k gate stacks were fabricated with the p-Si/graded-SiO 2 /HfO 2 /TaN configuration; control ... more High-k gate stacks were fabricated with the p-Si/graded-SiO 2 /HfO 2 /TaN configuration; control samples were fabricated with the p-Si/graded-SiO 2 /TaN configuration. A host of device parameters were extracted from the measured admittance data, including the gate stack capacitance density, the surface potential in the accumulation regime, the standard deviation of the surface potential, the interface trap density, trap energy, and trap capture cross-section, the flatband charge density in the SiO 2 intermediate layer, the flatband charge density in the HfO 2 high-k layer, and the accumulation surface potential coefficient, many of which were extracted for the first time for the high-k gate stacks. The experimental results provided new information on the nature of defects (interface traps and bulk charges) in the SiO 2 intermediate layer and in the HfO 2 high-k layer.

Research paper thumbnail of Closed-Form Model for High-k MOSFET Channel Parameters: Reflecting Non-Saturating Inversion Surface Potential, Gate Stack Traps, and Work Function Anomaly

ECS Journal of Solid State Science and Technology 1(4), Q79 (2012), 2012

Closed-form, textbook-appropriate equations have been derived for the drain current I D , the cha... more Closed-form, textbook-appropriate equations have been derived for the drain current I D , the channel conductance g D , and the transconductance g m of high-k MOSFETs, incorporating high-k gate stack charges Q di,gsc , non-saturating inversion surface potential increase ϕ s,inv , and work-function difference φ MS . These ab initio relations, developed without imposing any assumptions, provide a clear view of the degrading effects of the high-k gate stack charges, the non-saturating inversion surface potential, and the semiconductor-metal work function difference on I D , g D , and g m . Rational estimates have been made of the latter which illustrate the relative weights of each of the three non-ideal factors in the degradation of the channel parameters of the high-k gate stack. The degradation appears to be most severe for the channel conductance, followed by the drain current, and then the trans-conductance. The work-function anomaly does not directly affect the trans-conductance for which the major degrading factor is the non-saturating surface potential. Even for moderate drain voltages, the numerical estimates reveal the drain current versus the drain voltage relation to become more non-linear in the case of the high-k gate stack. Comparison with the available experimental high-k gate stack data supports the import of these equations.

Research paper thumbnail of A Drain Current - Drain Voltage Relation for MOSFETs with High-k Gate Stacks

ECS Transactions 41 (3) pp. 389-400, 2011

New analytical MOSFET drain-current-drain-voltage relations have been derived incorporating effec... more New analytical MOSFET drain-current-drain-voltage relations have been derived incorporating effects of gate stack traps and charges, semiconductor-metal work function difference, and nonsaturating surface potential, employing a novel approach of treating these complicating factors. These analytical drain current, transconductance, and channel conductance versus drain voltage relations in closed form provide a comprehensive and clear physical picture and show directly how the gate stack traps and charges, the non-saturating surface potential, and the semiconductor-metal work function difference affect and significantly degrade the drain current, the transconductance, and the channel conductance. ECS Transactions, 41 (3) 389-400 (2011) 10.1149/1.3633054 © The Electrochemical Society ) unless CC License in place (see abstract). ecsdl.org/site/terms_use address. Redistribution subject to ECS terms of use (see 117.248.136.120 Downloaded on 2014-10-23 to IP ECS Transactions, 41 (3) 389-400 (2011) 390 ) unless CC License in place (see abstract). ecsdl.org/site/terms_use address. Redistribution subject to ECS terms of use (see 117.248.136.120 Downloaded on 2014-10-23 to IP

Research paper thumbnail of Nature of Interface Traps in Si/SiO2/HfO2/TiN Gate Stacks and its Correlation with the Flat-Band Voltage Roll-Off

ECS Transactions 25 (6), pp. 399-408, 2009

We have carried out a detailed experimental investigation of the trap parameters -trap energy, tr... more We have carried out a detailed experimental investigation of the trap parameters -trap energy, trap density, and hole capture crosssection -in a large number of p-Si/SiO 2 /HfO 2 /TaN MOS capacitors fabricated on wafers with graded SiO 2 layer, and of the flat-band voltage, using a newly developed admittance spectroscopy technique, which yields accurate values of the surface potential and the flat-band voltage, and makes use of the measured conductance to obtain accurate values of the trap parameters. The correlation, if any, between the trap density and the flat-band voltage has been analyzed.

Research paper thumbnail of Modelling of layers and traps in high-k gate stacks and energy bands and equivalent circuit representations

ECS Transactions 16 (5), pp. 443-453, 2008

Five layers -two bulk and three chemically graded layers -have been identified to constitute the ... more Five layers -two bulk and three chemically graded layers -have been identified to constitute the high-Κ gate stack; the bulk layers being the intermediate oxide and the high-Κ layers; the three chemically graded layers being the silicon/intermediate-oxide, the intermediate-oxide/high-Κ, and the high-Κ/metal-oxide interfacial layers. Energy band diagrams across the silicon space-charge layer, the five gate stack layers, and the metal electrode, have been modeled, in which graded band-gap in the chemically graded layer, and the effects of the electric fields in the gate stack and image force barrier lowering have been considered. Response of traps in all the five layers of the gate stack to an applied small signal has been modeled, including the profile of the quasi-Fermi function in the gate stack. Relations for the potentials across the five gate stack layers have been formulated. Finally, small-signal equivalent circuit representations have been developed for the entire gate stack and the silicon space-charge layer.

Research paper thumbnail of Extraction of trap parameters for high-k gate stacks

ECS Transactions 16 (5), pp. 111-120, 2008

A small-signal steady state admittance technique, containing some new approaches, is outlined in ... more A small-signal steady state admittance technique, containing some new approaches, is outlined in this paper, for the extraction of the trap parameters, such as the trap density, the trap-energy, and the trap-capture-cross-section/trap-location in the direction perpendicular to the interface, for high-Κ gate stacks. This technique also yields the experimental values of the total gatedielectric-stack capacitance, the flat-band voltage, and the surface potential. This technique is applied to p-Si/SiO 2 /HfO 2 /TaN MOS capacitors, and the results are presented and analyzed.

Research paper thumbnail of Parameter extraction using novel phenomena in nano-MOSFETs with ultra-thin (EOT = 0.46-1.93 nm) high-k gate dielectrics

Thin Solid Films 504, 178 (2006) , 2006

Novel features of and a new technique for parameter extraction are outlined here for MOS devices ... more Novel features of and a new technique for parameter extraction are outlined here for MOS devices with ultra-thin high-K MOS devices. These parameters include the channel doping density, the doping density profile, and the flat-band voltage-all very important for the high-K technology, besides the surface potential, the gate dielectric capacitance, and the accumulation surface potential quotient. The reliability of the new technique was confirmed by comparison with the results from other techniques. The experimental results indicate diffusion of metal impurities into the channel region during the device processing. D

Research paper thumbnail of Study of silicon-organic interfaces by admittance spectroscopy

Applied Surface Science, Oct 21, 2005

An admittance spectroscopy technique has been developed for the interfaces between organic monola... more An admittance spectroscopy technique has been developed for the interfaces between organic monolayers and silicon. The present work involves the development of an effective equivalent circuit to represent the silicon/organic-monolayer system, and the development of a parameter extraction procedure, which yields the monolayer capacitance and the monolayer thickness, the flat-band voltage, the silicon doping density, the silicon surface potential, the interface trap density, the interface trap capture cross-section and the interface trap energy. This technique was applied to three types of silicon/organic-monolayer system. #

Research paper thumbnail of Determination of the channel doping density in MOS devices with high-k devices

ECS Transactions 1 (5), pp. 553-563, 2005

A new technique is outlined here for the extraction of the channel doping density of MOS nano-tra... more A new technique is outlined here for the extraction of the channel doping density of MOS nano-transistors with high permittivity ultrathin (equivalent oxide thickness (EOT) = 0.5 to 2.0 nm) gate dielectrics, using either the accumulation or the strong inversion MOS capacitance or both. This technique also obtains the doping density at the edge of the space charge layer at the onset of strong inversion, if the device is a MOSFET. Comparision of results from the new technique is made with the interface doping density and the doping profile obtained from the Ziegler technique.

Research paper thumbnail of Characterisation of Accumulation Layer Capacitance for Extracting Data on High-k Gate Dielectrics

IEEE Transactions on Electron Devices 52(6), 1187 (2005), Jun 2005

Research paper thumbnail of Salient features in the capacitance characteristics of ultra thin high-k devices

ECS Transactions 1 (5), pp. 745-756, 2005

Salient features of MOS (Metal Oxide Silicon) devices with ultra-thin high-gate dielectrics are o... more Salient features of MOS (Metal Oxide Silicon) devices with ultra-thin high-gate dielectrics are outlined here, which include the following. In the case of the ultra-thin (EOT < 2 nm) gate dielectrics, the capacitance-voltage (C-V) and the surface potential versus bias (ϕ s -V) characteristics are dominated by the accumulation and the strong inversion regimes, in contrast to the case of the thicker gate dielectrics, where these characteristics are dominated by depletion and weak inversion regimes. In the strong accumulation regime, the experimental lnC p (ϕ s ) plot (C p is the sum of the space charge capacitance C sc and the interface trap capacitance C it ) was found to be a straight line, and its slope β acc varied strongly with the gate dielectric material and was found to be inversely proportional to [(φ b m*/m) 1/2 Κ/C di ], where φ b is the conduction/valence band offset, m* is the effective electron/hole tunneling mass, Κ is the dielectric constant, and C di is the gate dielectric capacitance. β acc -1 may be considered as a gate-dielectric direct-tunneling current index. The experimental results highlight significant deficiencies in the theory and modeling of carrier confinement effects, and suggest strong influence of the gate dielectric on the accumulation and strong inversion layer capacitance, in the case of ultra-thin high-Κ gate dielectrics. ECS Transactions, 1 (5) 745-756 (2006) 10.1149/1.2209320, copyright The Electrochemical Society 745 ) unless CC License in place (see abstract). ecsdl.org/site/terms_use address. Redistribution subject to ECS terms of use (see 117.248.136.120 Downloaded on 2014-10-23 to IP

Research paper thumbnail of Extraction of the Capacitance of Ultra-thin High-k Gate Dielectrics

IEEE Transactions on Electron Devices 50(10), 2112 (2003), Oct 2003

Research paper thumbnail of High Quality ZrO2 Thin Films on <100> Si Substrates as a Gate Dielectric Material: Processing and Characterization

ECS Proceedings Volume 2002-28, pp. 41-48, 2002

High dielectric constant gate materials offer the possibility of pushing the CMOS technology in t... more High dielectric constant gate materials offer the possibility of pushing the CMOS technology in the realm of 10-20 nm feature sizes. Among various potential high κ materials, ZrO 2 fulfils most of the stringent criterions, in terms of device performance and manufacturing requirements, to be considered as a gate material replacement for SiO 2 . As the dielectric constant of ZrO 2 is higher (for bulk ZrO 2 , κ= ~25) than that of SiO 2 , it will provide a significant increase in capacitance without scaling down the oxide thickness.