Francky Leyn | Kuleuven - Academia.edu (original) (raw)
Papers by Francky Leyn
International Journal of Circuit Theory and Applications, 1995
This paper discusses the realization of an analogue module generator that forms part of a mixed a... more This paper discusses the realization of an analogue module generator that forms part of a mixed analogue/digital design environment. It is able to design analogue functional modules such as like amplifiers, filters, etc., either in an automatic or in an interactive session, starting from performance specifications over topology selection, parameter optimization and simulation/verification down to lay-out. The analogue module generator is integrated in a commercial EDA framework. Practical design results show the capabilities and efficiency of the system.
A synthesis environment for analog integrated circuits is presented that is able to drastically i... more A synthesis environment for analog integrated circuits is presented that is able to drastically increase design and layout productivity for analog blocks. The system covers the complete design flow from specification over topology selection and optimal circuit sizing down to automatic layout generation and performance characterization. It follows a hierarchical refinement strategy for more complex cells and is process independent. The sizing is based on an improved equation-based optimization approach, where the circuit behavior is characterized by declarative models that are then converted in a sequential design plan. Supporting tools have been developed to reduce the total effort to set up a new circuit topology in the system's database. The performance-driven layout generation tool guarantees layouts that satisfy all performance constraints. Redesign support is included in the design flow management to perform backtracking in case of design problems. The experimental results illustrate the productiveness and efficiency of the environment for the synthesis and process tuning of frequently used analog cells.
2002 IEEE International Symposium on Circuits and Systems. Proceedings (Cat. No.02CH37353), 2002
Different regression criteria exhibit different properties when used for fitting purposes. In thi... more Different regression criteria exhibit different properties when used for fitting purposes. In this paper the properties of different regression criteria are described in detail. The underlying error structure and the link between the regression criterion and the application area is analysed. Examples in different modeling areas are provided. Given are an example of device modeling, system-level modeling, and the temperature
1998 IEEE/ACM International Conference on Computer-Aided Design. Digest of Technical Papers (IEEE Cat. No.98CB36287), 1998
This paper describes a new DC modeling methodology appli- cable to CMOS integrated circuits. It i... more This paper describes a new DC modeling methodology appli- cable to CMOS integrated circuits. It is named operating point driven DC formulation because the operating point is specified di- rectly, and the device dimensions W and L are determined out of it. With other methods, one specifies the device dimensions W and L and determines the operating point. Our method
Proceedings of 1997 IEEE International Symposium on Circuits and Systems. Circuits and Systems in the Information Age ISCAS '97, 1997
The DC and AC modeling and sizing of an analog circuit is described. The DC modeling method allow... more The DC and AC modeling and sizing of an analog circuit is described. The DC modeling method allows operating point driven circuit sizing. The method is fast and robust w.r.t. convergence problems. For the AC modeling symbolic behavior simulation is used. The knowledge of the circuit is formalized in a constraint programming language. Sizing of the formalized circuit is done
Proceedings Design, Automation and Test in Europe, 1998
The complete application of a hierarchical top-down design methodology to analog sensor interface... more The complete application of a hierarchical top-down design methodology to analog sensor interface front-ends is presented: from system-level specifications down to implementation in silicon, including high-level synthesis, analog block generation and layout generation. A new approach for implementing accurate and fast power/area estimators for the different blocks in the architecture is described. These estimators provide the essential link between the high-level synthesis and the block generation in our hierarchical top-down methodology. The methodology is illustrated by means of the design of a complex and realistic example. Measurement results are included.
Proceedings the European Design and Test Conference. ED&TC 1995, 1995
The task of a topology selector within an analog synthesis system is to find the best available a... more The task of a topology selector within an analog synthesis system is to find the best available analog circuit topology out of a library for a given set of input specification. The proposed selection method consists of a combination of two approaches: procedural filtering and rule-based filtering. The procedural filtering consists of two consecutive phases based on boundary checking and
Proceedings of IEEE International Conference on Computer Aided Design (ICCAD) ICCAD-97, 1997
This paper describes a new modeling methodology that allows to derive systematically behavioral s... more This paper describes a new modeling methodology that allows to derive systematically behavioral signal path models of operational amplifiers. Combined with symbolic simulation, these models provide high qualitative insight in the small-signal functioning of a circuit. The behavioral signal path model provides compact interpretable expressions for the poles and zeros that constitute the signal path. These expressions show which design
Proceedings of Third International Conference on Electronics, Circuits, and Systems, 1996
... and constraint definition. MxPlace is the back-end placement optimization algorithm providing... more ... and constraint definition. MxPlace is the back-end placement optimization algorithm providing automated/ interactive floorplan generation, constraint handling and estimation of various physical aspects of the circuit. MxLink is a ...
International Journal of Circuit Theory and Applications, 1995
This paper discusses the realization of an analogue module generator that forms part of a mixed a... more This paper discusses the realization of an analogue module generator that forms part of a mixed analogue/digital design environment. It is able to design analogue functional modules such as like amplifiers, filters, etc., either in an automatic or in an interactive session, starting from performance specifications over topology selection, parameter optimization and simulation/verification down to lay-out. The analogue module generator is integrated in a commercial EDA framework. Practical design results show the capabilities and efficiency of the system.
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 2001
A synthesis environment for analog integrated circuits is presented that is able to drastically i... more A synthesis environment for analog integrated circuits is presented that is able to drastically increase design and layout productivity for analog blocks. The system covers the complete design flow from specification over topology selection and optimal circuit sizing down to automatic layout generation and performance characterization. It follows a hierarchical refinement strategy for more complex cells and is process independent. The sizing is based on an improved equation-based optimization approach, where the circuit behavior is characterized by declarative models that are then converted in a sequential design plan. Supporting tools have been developed to reduce the total effort to set up a new circuit topology in the system's database. The performance-driven layout generation tool guarantees layouts that satisfy all performance constraints. Redesign support is included in the design flow management to perform backtracking in case of design problems. The experimental results illustrate the productiveness and efficiency of the environment for the synthesis and process tuning of frequently used analog cells.
IEEE Transactions on Circuits and Systems II: Analog and Digital Signal Processing, 2001
This paper describes the transformation of small-signal modeling of analog integrated circuits in... more This paper describes the transformation of small-signal modeling of analog integrated circuits into control system modeling. Transforming a small-signal circuit into a control system equivalent results in a behavioral signal path (BSP) model. A BSP model gives insight in the operation of a circuit because it shows all the different conversions from current to voltage and vice versa, including poles and zeros which cause a decrease-increase in transfer along the signal path. The different poles are a function of the small-signal parameters of the different devices and are modeled with small symbolic equations, which make them fully comprehensible. This enables the designer to accurately control the sizing process by enabling pole/zero placement. On a BSP model, all theorems of control theory as well as typical design approximations can be performed. The methodology and its applications are illustrated with several examples
International Journal of Circuit Theory and Applications, 1995
This paper discusses the realization of an analogue module generator that forms part of a mixed a... more This paper discusses the realization of an analogue module generator that forms part of a mixed analogue/digital design environment. It is able to design analogue functional modules such as like amplifiers, filters, etc., either in an automatic or in an interactive session, starting from performance specifications over topology selection, parameter optimization and simulation/verification down to lay-out. The analogue module generator is integrated in a commercial EDA framework. Practical design results show the capabilities and efficiency of the system.
A synthesis environment for analog integrated circuits is presented that is able to drastically i... more A synthesis environment for analog integrated circuits is presented that is able to drastically increase design and layout productivity for analog blocks. The system covers the complete design flow from specification over topology selection and optimal circuit sizing down to automatic layout generation and performance characterization. It follows a hierarchical refinement strategy for more complex cells and is process independent. The sizing is based on an improved equation-based optimization approach, where the circuit behavior is characterized by declarative models that are then converted in a sequential design plan. Supporting tools have been developed to reduce the total effort to set up a new circuit topology in the system's database. The performance-driven layout generation tool guarantees layouts that satisfy all performance constraints. Redesign support is included in the design flow management to perform backtracking in case of design problems. The experimental results illustrate the productiveness and efficiency of the environment for the synthesis and process tuning of frequently used analog cells.
2002 IEEE International Symposium on Circuits and Systems. Proceedings (Cat. No.02CH37353), 2002
Different regression criteria exhibit different properties when used for fitting purposes. In thi... more Different regression criteria exhibit different properties when used for fitting purposes. In this paper the properties of different regression criteria are described in detail. The underlying error structure and the link between the regression criterion and the application area is analysed. Examples in different modeling areas are provided. Given are an example of device modeling, system-level modeling, and the temperature
1998 IEEE/ACM International Conference on Computer-Aided Design. Digest of Technical Papers (IEEE Cat. No.98CB36287), 1998
This paper describes a new DC modeling methodology appli- cable to CMOS integrated circuits. It i... more This paper describes a new DC modeling methodology appli- cable to CMOS integrated circuits. It is named operating point driven DC formulation because the operating point is specified di- rectly, and the device dimensions W and L are determined out of it. With other methods, one specifies the device dimensions W and L and determines the operating point. Our method
Proceedings of 1997 IEEE International Symposium on Circuits and Systems. Circuits and Systems in the Information Age ISCAS '97, 1997
The DC and AC modeling and sizing of an analog circuit is described. The DC modeling method allow... more The DC and AC modeling and sizing of an analog circuit is described. The DC modeling method allows operating point driven circuit sizing. The method is fast and robust w.r.t. convergence problems. For the AC modeling symbolic behavior simulation is used. The knowledge of the circuit is formalized in a constraint programming language. Sizing of the formalized circuit is done
Proceedings Design, Automation and Test in Europe, 1998
The complete application of a hierarchical top-down design methodology to analog sensor interface... more The complete application of a hierarchical top-down design methodology to analog sensor interface front-ends is presented: from system-level specifications down to implementation in silicon, including high-level synthesis, analog block generation and layout generation. A new approach for implementing accurate and fast power/area estimators for the different blocks in the architecture is described. These estimators provide the essential link between the high-level synthesis and the block generation in our hierarchical top-down methodology. The methodology is illustrated by means of the design of a complex and realistic example. Measurement results are included.
Proceedings the European Design and Test Conference. ED&TC 1995, 1995
The task of a topology selector within an analog synthesis system is to find the best available a... more The task of a topology selector within an analog synthesis system is to find the best available analog circuit topology out of a library for a given set of input specification. The proposed selection method consists of a combination of two approaches: procedural filtering and rule-based filtering. The procedural filtering consists of two consecutive phases based on boundary checking and
Proceedings of IEEE International Conference on Computer Aided Design (ICCAD) ICCAD-97, 1997
This paper describes a new modeling methodology that allows to derive systematically behavioral s... more This paper describes a new modeling methodology that allows to derive systematically behavioral signal path models of operational amplifiers. Combined with symbolic simulation, these models provide high qualitative insight in the small-signal functioning of a circuit. The behavioral signal path model provides compact interpretable expressions for the poles and zeros that constitute the signal path. These expressions show which design
Proceedings of Third International Conference on Electronics, Circuits, and Systems, 1996
... and constraint definition. MxPlace is the back-end placement optimization algorithm providing... more ... and constraint definition. MxPlace is the back-end placement optimization algorithm providing automated/ interactive floorplan generation, constraint handling and estimation of various physical aspects of the circuit. MxLink is a ...
International Journal of Circuit Theory and Applications, 1995
This paper discusses the realization of an analogue module generator that forms part of a mixed a... more This paper discusses the realization of an analogue module generator that forms part of a mixed analogue/digital design environment. It is able to design analogue functional modules such as like amplifiers, filters, etc., either in an automatic or in an interactive session, starting from performance specifications over topology selection, parameter optimization and simulation/verification down to lay-out. The analogue module generator is integrated in a commercial EDA framework. Practical design results show the capabilities and efficiency of the system.
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 2001
A synthesis environment for analog integrated circuits is presented that is able to drastically i... more A synthesis environment for analog integrated circuits is presented that is able to drastically increase design and layout productivity for analog blocks. The system covers the complete design flow from specification over topology selection and optimal circuit sizing down to automatic layout generation and performance characterization. It follows a hierarchical refinement strategy for more complex cells and is process independent. The sizing is based on an improved equation-based optimization approach, where the circuit behavior is characterized by declarative models that are then converted in a sequential design plan. Supporting tools have been developed to reduce the total effort to set up a new circuit topology in the system's database. The performance-driven layout generation tool guarantees layouts that satisfy all performance constraints. Redesign support is included in the design flow management to perform backtracking in case of design problems. The experimental results illustrate the productiveness and efficiency of the environment for the synthesis and process tuning of frequently used analog cells.
IEEE Transactions on Circuits and Systems II: Analog and Digital Signal Processing, 2001
This paper describes the transformation of small-signal modeling of analog integrated circuits in... more This paper describes the transformation of small-signal modeling of analog integrated circuits into control system modeling. Transforming a small-signal circuit into a control system equivalent results in a behavioral signal path (BSP) model. A BSP model gives insight in the operation of a circuit because it shows all the different conversions from current to voltage and vice versa, including poles and zeros which cause a decrease-increase in transfer along the signal path. The different poles are a function of the small-signal parameters of the different devices and are modeled with small symbolic equations, which make them fully comprehensible. This enables the designer to accurately control the sizing process by enabling pole/zero placement. On a BSP model, all theorems of control theory as well as typical design approximations can be performed. The methodology and its applications are illustrated with several examples