Neelesh Bhattacharya | École Polytechnique de Montréal (original) (raw)
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Papers by Neelesh Bhattacharya
Abstract. In this paper, we discuss how a search-based branch coverage approach can be used to de... more Abstract. In this paper, we discuss how a search-based branch coverage approach can be used to design an effective test data generation approach, specifically targeting divide-by-zero exceptions. We first propose a novel testability transformation combining approach level and branch distance. We then use different search strategies, i.e., hill climbing, simulated annealing, and genetic algorithm, to evaluate the performance of the novel testability transformation on a small synthetic example as well as on methods known to throw divide-by-zero exceptions, extracted from real world systems, namely Eclipse and Android. Finally, we also describe how the test data generation for divide-by-zero exceptions can be formulated as a constraint programming problem and compare the resolution of this problem with a genetic algorithm in terms of execution time. We thus report evidence that genetic algorithm using our novel testability transformation out-performs hill climbing and simulated anneali...
Abstract In current, typical software development projects, hundreds of developers work asynchron... more Abstract In current, typical software development projects, hundreds of developers work asynchronously in space and time and may introduce anti-patterns in their software systems because of time pressure, lack of understanding, communication, and--or skills. Anti-patterns impede development and maintenance activities by making the source code more difficult to understand.
Verification of complex systems with multiple processors is difficult. The reason being that the ... more Verification of complex systems with multiple processors is difficult. The reason being that the generation of test cases for the whole system is quite complex. So, the system must be verified in parts and sequentially, i.e., verifying the software, hardware platform separately and the finally software running on the hardware platform. As verification of the MPSoC (Multiple-Systems-on-Chip) platform is beyond the scope of our research, we assume that the MPSoC hardware platform is already verified. Thus, we focus our research on the verification of the MPSoC software (application software running on the MPSoC platform) and the system consisting of the MPSOC software running on the MPSoC platform. Researchers have tried to verify the software portion by generating test cases using metaheutistics, constraint programming and combined metaheuristicconstraint programming approaches. But metaheuristic approaches are not capable of finding good solution as they may get blocked in local optima, whereas constraint programming approaches are not able to generate good test cases when the problem is large and complex. The combined metaheuristic-constraint programming approaches solve these limitations but lose many good test cases when they reduce the domain of the input variables. We want to generate test cases for software while overcoming the limitations mentioned. For this, we propose to combine metaheuristic and constraint programming approaches. In our approach, constraint programming solver will split the input variable domains before reducing them further to be fed into the metaheuristic solver that will generate test cases. Finally, at a later stage of our research, we want to verify the whole system consisting of an application software (DEMOSAIK or FFMPEG 4) running on an MPSoC architecture simulator, the ReSP platform. We propose to generate the test cases from the functional test objectives to check the proper functioning of the software running on the hardware platform. So, we frame the two research questions as: Verification of software by generating test cases so as to satisfy certain coverage criterion and cause the software to fail, and verification of the functional and structural coverage criteria(s) of the system as a whole. We report the results of the preliminary experiments conducted, which helps us to provide a path for the subsequent steps.
… Verification and Validation (ICST), 2011 IEEE …, Jan 1, 2011
Abstract Verification of softwarehardware hybrid systems is difficult because of the inter proces... more Abstract Verification of softwarehardware hybrid systems is difficult because of the inter process communication, concurrency and synchronization and the configuration of processors. Multi-Processor Systems on Chip (MPSoC) are examples of such hybrid systems, targeted for embedded systems. We focus on the verification of MPSoC software (application running on MPSoC) and the system consisting of the application running on the MPSoC platform. We aim at generating test cases for verifying the software while ...
Proceedings of the 27th …, Jan 1, 2012
Developers may introduce anti-patterns in their software systems because of time pressure, lack o... more Developers may introduce anti-patterns in their software systems because of time pressure, lack of understanding, communication, and-or skills. Anti-patterns impede development and maintenance activities by making the source code more difficult to understand. Detecting anti-patterns in a whole software system may be infeasible because of the required parsing time and of the subsequent needed manual validation. Detecting anti-patterns on subsets of a system could reduce costs, effort, and resources. Researchers have proposed approaches to detect occurrences of anti-patterns but these approaches have currently some limitations: they require extensive knowledge of anti-patterns, they have limited precision and recall, and they cannot be applied on subsets of systems. To overcome these limitations, we introduce SVMDetect, a novel approach to detect anti-patterns, based on a machine learning technique-support vector machines. Indeed, through an empirical study involving three subject systems and four anti-patterns, we showed that the accuracy of SVMDetect is greater than of DETEX when detecting anti-patterns occurrences on a set of classes. Concerning, the whole system, SVMDetect is able to find more anti-patterns occurrences than DETEX.
www-etud.iro.umontreal.ca
Search Based Software …, Jan 1, 2012
Managing and controlling interference conditions in multi-threaded programs has been an issue of ... more Managing and controlling interference conditions in multi-threaded programs has been an issue of worry for application developers for a long time. Typically, when write events from two concurrent threads to the same shared variable are not properly protected, an occurrence of the interference bug pattern could be exposed. We propose a mathematical formulation and its resolution to maximize the possibility of exposing occurrences of the interference bug pattern. We formulate and solve the issue as an optimization problem that gives us (1) the optimal position to inject a delay in the execution flow of a thread and (2) the optimal duration for this delay to align at least two different write events in a multi-threaded program. To run the injected threads and calculate the thread execution times for validating the results, we use a virtual platform modelling a perfectly parallel system. All the effects due to the operating system's scheduler or the latencies of hardware components are reduced to zero, exposing only the interactions between threads. To the best of our knowledge, no previous work has formalized the alignment of memory access events to expose occurrences of the interference bug pattern. We use three different algorithms (random, stochastic hill climbing, and simulated annealing) to solve the optimization problem and compare their performance. We carry out experiments on four small synthetic programs and three real-world applications with varying numbers of threads and read/write executions. Our results show that the possibility of exposing interference bug pattern can be significantly enhanced, and that metaheuristics (hill climbing and simulated annealing) provide much better results than a random algorithm.
Search Based Software …, Jan 1, 2011
Abstract. In this paper, we discuss how a search-based branch coverage approach can be used to de... more Abstract. In this paper, we discuss how a search-based branch coverage approach can be used to design an effective test data generation approach, specifically targeting divide-by-zero exceptions. We first propose a novel testability transformation combining approach level and branch distance. We then use different search strategies, i.e., hill climbing, simulated annealing, and genetic algorithm, to evaluate the performance of the novel testability transformation on a small synthetic example as well as on methods known to throw divide-by-zero exceptions, extracted from real world systems, namely Eclipse and Android. Finally, we also describe how the test data generation for divide-by-zero exceptions can be formulated as a constraint programming problem and compare the resolution of this problem with a genetic algorithm in terms of execution time. We thus report evidence that genetic algorithm using our novel testability transformation out-performs hill climbing and simulated anneali...
Abstract In current, typical software development projects, hundreds of developers work asynchron... more Abstract In current, typical software development projects, hundreds of developers work asynchronously in space and time and may introduce anti-patterns in their software systems because of time pressure, lack of understanding, communication, and--or skills. Anti-patterns impede development and maintenance activities by making the source code more difficult to understand.
Verification of complex systems with multiple processors is difficult. The reason being that the ... more Verification of complex systems with multiple processors is difficult. The reason being that the generation of test cases for the whole system is quite complex. So, the system must be verified in parts and sequentially, i.e., verifying the software, hardware platform separately and the finally software running on the hardware platform. As verification of the MPSoC (Multiple-Systems-on-Chip) platform is beyond the scope of our research, we assume that the MPSoC hardware platform is already verified. Thus, we focus our research on the verification of the MPSoC software (application software running on the MPSoC platform) and the system consisting of the MPSOC software running on the MPSoC platform. Researchers have tried to verify the software portion by generating test cases using metaheutistics, constraint programming and combined metaheuristicconstraint programming approaches. But metaheuristic approaches are not capable of finding good solution as they may get blocked in local optima, whereas constraint programming approaches are not able to generate good test cases when the problem is large and complex. The combined metaheuristic-constraint programming approaches solve these limitations but lose many good test cases when they reduce the domain of the input variables. We want to generate test cases for software while overcoming the limitations mentioned. For this, we propose to combine metaheuristic and constraint programming approaches. In our approach, constraint programming solver will split the input variable domains before reducing them further to be fed into the metaheuristic solver that will generate test cases. Finally, at a later stage of our research, we want to verify the whole system consisting of an application software (DEMOSAIK or FFMPEG 4) running on an MPSoC architecture simulator, the ReSP platform. We propose to generate the test cases from the functional test objectives to check the proper functioning of the software running on the hardware platform. So, we frame the two research questions as: Verification of software by generating test cases so as to satisfy certain coverage criterion and cause the software to fail, and verification of the functional and structural coverage criteria(s) of the system as a whole. We report the results of the preliminary experiments conducted, which helps us to provide a path for the subsequent steps.
… Verification and Validation (ICST), 2011 IEEE …, Jan 1, 2011
Abstract Verification of softwarehardware hybrid systems is difficult because of the inter proces... more Abstract Verification of softwarehardware hybrid systems is difficult because of the inter process communication, concurrency and synchronization and the configuration of processors. Multi-Processor Systems on Chip (MPSoC) are examples of such hybrid systems, targeted for embedded systems. We focus on the verification of MPSoC software (application running on MPSoC) and the system consisting of the application running on the MPSoC platform. We aim at generating test cases for verifying the software while ...
Proceedings of the 27th …, Jan 1, 2012
Developers may introduce anti-patterns in their software systems because of time pressure, lack o... more Developers may introduce anti-patterns in their software systems because of time pressure, lack of understanding, communication, and-or skills. Anti-patterns impede development and maintenance activities by making the source code more difficult to understand. Detecting anti-patterns in a whole software system may be infeasible because of the required parsing time and of the subsequent needed manual validation. Detecting anti-patterns on subsets of a system could reduce costs, effort, and resources. Researchers have proposed approaches to detect occurrences of anti-patterns but these approaches have currently some limitations: they require extensive knowledge of anti-patterns, they have limited precision and recall, and they cannot be applied on subsets of systems. To overcome these limitations, we introduce SVMDetect, a novel approach to detect anti-patterns, based on a machine learning technique-support vector machines. Indeed, through an empirical study involving three subject systems and four anti-patterns, we showed that the accuracy of SVMDetect is greater than of DETEX when detecting anti-patterns occurrences on a set of classes. Concerning, the whole system, SVMDetect is able to find more anti-patterns occurrences than DETEX.
www-etud.iro.umontreal.ca
Search Based Software …, Jan 1, 2012
Managing and controlling interference conditions in multi-threaded programs has been an issue of ... more Managing and controlling interference conditions in multi-threaded programs has been an issue of worry for application developers for a long time. Typically, when write events from two concurrent threads to the same shared variable are not properly protected, an occurrence of the interference bug pattern could be exposed. We propose a mathematical formulation and its resolution to maximize the possibility of exposing occurrences of the interference bug pattern. We formulate and solve the issue as an optimization problem that gives us (1) the optimal position to inject a delay in the execution flow of a thread and (2) the optimal duration for this delay to align at least two different write events in a multi-threaded program. To run the injected threads and calculate the thread execution times for validating the results, we use a virtual platform modelling a perfectly parallel system. All the effects due to the operating system's scheduler or the latencies of hardware components are reduced to zero, exposing only the interactions between threads. To the best of our knowledge, no previous work has formalized the alignment of memory access events to expose occurrences of the interference bug pattern. We use three different algorithms (random, stochastic hill climbing, and simulated annealing) to solve the optimization problem and compare their performance. We carry out experiments on four small synthetic programs and three real-world applications with varying numbers of threads and read/write executions. Our results show that the possibility of exposing interference bug pattern can be significantly enhanced, and that metaheuristics (hill climbing and simulated annealing) provide much better results than a random algorithm.
Search Based Software …, Jan 1, 2011