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Research paper thumbnail of A Configuration Control Mechanism Based on Concurrency Level for a Reconfigurable Consistency Algorithm

A Reconfigurable Consistency Algorithm (RCA) is an algorithm that guarantees the consistency in D... more A Reconfigurable Consistency Algorithm (RCA) is an algorithm that guarantees the consistency in Distributed Shared Memory (DSM) Systems. In a RCA, there is a Configuration Control Layer (CCL) that is responsible for selecting the most suitable RCA configuration (behavior) for a specific workload and DSM system. In previous works, we defined an upper bound performance for RCA based on an ideal CCL, which knows apriori the best configuration for each situation. This ideal CCL is based on a set of workloads characteristics that, in most situations, are difficult to extract from the applications (percentage of shared write and read operations and sharing patterns). In this paper we propose, develop and present a heuristical configuration control mechanism for the CCL implementation. This mechanism is based on an easily obtained applications parameter, the concurrency level. Our results show that this configuration control mechanism improves the RCA performance in 15%, on average, compared to other traditional consistency algorithms. Furthermore, the CCL with this mechanism is independent from the workload and DSM system specific characteristics, like sharing patterns and percentage of writes and reads.

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Research paper thumbnail of The use of research activities as learning instrument in electrical engineering and computer science graduations

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Research paper thumbnail of Computer arcwtecture education: application of a new learning method based on design and simulator development

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Research paper thumbnail of Performance Evaluation of Programming Paradigms and Languages Using Multithreading on Digital Image Processing

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Research paper thumbnail of Reducing reconfiguration times of FPGA-based systems using MultiLevel Reconfiguration

Page 1. REDUCING RECONFIGURATION TIMES OF FPGA-BASED SYSTEMS USING MULTI-LEVEL RECONFIGURATION Al... more Page 1. REDUCING RECONFIGURATION TIMES OF FPGA-BASED SYSTEMS USING MULTI-LEVEL RECONFIGURATION Alexandre M. Amaral, Carlos APS Martins Graduate Program in Electrical Engineering Pontifical Catholic University of Minas Gerais Av. ...

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Research paper thumbnail of Utilização de Exploração do Espaço de Projeto e Simulação no Aprendizado de Memórias Cache

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Research paper thumbnail of Web memory hierarchy learning and research environment

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Research paper thumbnail of Dynamically Reconfigurable Split Cache Architecture

Dynamically reconfigurable split cache architecture is a reconfigurable architecture that has all... more Dynamically reconfigurable split cache architecture is a reconfigurable architecture that has all advantages of a split cache and also the ability to reconfigure itself allowing computational performance improvement. Several real traces were performed in order to verify and compare the dynamically reconfigurable split cache architecture and the conventional split cache architecture performance, in most tests the reconfigurable architecture was better

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Research paper thumbnail of DCMSIM: didactic cache memory simulator

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Research paper thumbnail of RJSSIM: A reconfigurable job scheduling smulator for parallel processing learning

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Research paper thumbnail of Teaching and learning parallel processing through performance analysis using Prober

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Research paper thumbnail of Extending Clustersim with MP And DSM Modules

In this paper, we present a new version of ClusterSim (Cluster Simulation Tool), in which we incl... more In this paper, we present a new version of ClusterSim (Cluster Simulation Tool), in which we included two new modules: Message-Passing (MP) and Distributed Shared Memory (DSM). ClusterSim supports the visual modeling and the simulation of clusters and their workloads for performance analysis. A modeled cluster is composed of single or multi-processed nodes, parallel job schedulers, network topologies, message-passing communications, distributed shared memory and technologies. A modeled workload is represented by users that submit jobs composed of tasks described by probability distributions and their internal structure (CPU, I/O, DSM and MPI instructions). Our main objectives in this paper are: to present a new version of ClusterSim with the inclusion of Message-Passing and Distributed Shared Memory simulation modules; to present the new software architecture and simulation model; to verify the proposal and implementation of MPI collective communication functions using different communication patterns (Message-Passing Module); to verify the proposal and implementation of DSM operations, consistency models and coherence protocols for object sharing (Distributed Shared Memory Module); to analyze ClusterSim v. 1.1 by means of two case studies. Our main contributions are the inclusion of the Message-Passing and Distributed Shared Memory simulation modules, a more detailed simulation model of ClusterSim and new features in the graphical environment.

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Research paper thumbnail of Proposta, projeto e verificação de um Elemento de Processamento Reconfigurável codificado em ArchC

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Research paper thumbnail of Modelagem de Sistemas Computacionais usando Redes de Petri: aplicação em projeto, análise e avaliação

Page 1. Modelagem de Sistemas Computacionais usando Redes de Petri: aplicação emprojeto, análise ... more Page 1. Modelagem de Sistemas Computacionais usando Redes de Petri: aplicação emprojeto, análise e avaliação ... O projeto do sistema computacional pode ser verificado e validado através de um modelo antes da construção de um protótipo? ...

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Research paper thumbnail of A NEW LEARNING METHOD OF MICROPROCESSOR ARCHITECTURE

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Research paper thumbnail of Reconfigurable Object Consistency Model for Distributed Shared Memory

The consistency models are responsible for managing the state of shared data for the applications... more The consistency models are responsible for managing the state of shared data for the applications of a distributed shared memory (DSM) systems. The already proposed consistency models are inflexible and cannot adapt to the workload and environments characteristics. So, they cannot achieve the best performance for the workloads and environments in all the cases. In this work, we propose, present and analyze a reconfigurable consistency model (ROCoM –Reconfigurable Object Consistency Model) for object based DSMs. ROCoM behavior was represented using a reconfigurable algorithm (RA) and its analysis was made using a simulation tool. Our results show that ROCoM, on average, had 34% (upper bound) better performance than other ones.

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Research paper thumbnail of A Configurable and Portable Benchmark for 3D Graphics

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Research paper thumbnail of Artificial Neural Network Engine: Parallel and Parameterized Architecture Implemented in FPGA

In this paper we present and analyze an artificial neural network hardware engine, its architectu... more In this paper we present and analyze an artificial neural network hardware engine, its architecture and implementation. The engine was designed to solve performance problems of the serial software implementations. It is based on a hierarchical parallel and parameterized architecture. Taking into account verification results, we conclude that this engine improves the computational performance, producing speedups from 52.3 to 204.5 and its architectural parameterization provides more flexibility.

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Research paper thumbnail of Reconfigurable consistency model for object-based software DSM

Distributed shared memory (DSM) systems can share a set of objects or virtual memory pages. The d... more Distributed shared memory (DSM) systems can share a set of objects or virtual memory pages. The data sharing enables the applications to access the data concurrently. But, these concurrently access can generate some inconsistencies in the shared data state. The consistency models are responsible for managing the state of shared data for the applications. The already proposed consistency models are inflexible and cannot adapt to the workload and architectures characteristics. So, they cannot generate the best performance for the workloads and architectures in all the cases. In this work, we propose, present and analyze a reconfigurable consistency model for object based DSMs. We called this consistency model ROCoM (reconfigurable object consistency model). ROCoM behavior was represented using a reconfigurable algorithm (RA) and its analysis was made using a simulation tool. Our results show that ROCoM, on average, had 30% better performance than others consistency models.

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Research paper thumbnail of RCMP: A Reconfigurable Chip-Multiprocessor Architecture

Current parallel architectures are not optimized to all different kinds of applications since the... more Current parallel architectures are not optimized to all different kinds of applications since they can vary in requirements and resource needs. An ideal system to attend different applications should be able to fit their different characteristics and resource needs and to improve application performance. Our objective is to design and to develop a system architecture that can be reconfigured to fulfill many kinds of the application requirements and run with a reduced communication overhead. Our main goal is a new Reconfigurable Chip-MultiProcessor architecture that improves adaptability to have better performance, regardless of the application requirements. Our results and its analysis show that our architecture provides greater flexibility and scalability and still obtains performance gain over one multiprocessor architecture. Our main contribution is a Reconfigurable Chip-Multiprocessor architecture, composed of reconfigurable processing, storage and interconnection elements.

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Research paper thumbnail of A Configuration Control Mechanism Based on Concurrency Level for a Reconfigurable Consistency Algorithm

A Reconfigurable Consistency Algorithm (RCA) is an algorithm that guarantees the consistency in D... more A Reconfigurable Consistency Algorithm (RCA) is an algorithm that guarantees the consistency in Distributed Shared Memory (DSM) Systems. In a RCA, there is a Configuration Control Layer (CCL) that is responsible for selecting the most suitable RCA configuration (behavior) for a specific workload and DSM system. In previous works, we defined an upper bound performance for RCA based on an ideal CCL, which knows apriori the best configuration for each situation. This ideal CCL is based on a set of workloads characteristics that, in most situations, are difficult to extract from the applications (percentage of shared write and read operations and sharing patterns). In this paper we propose, develop and present a heuristical configuration control mechanism for the CCL implementation. This mechanism is based on an easily obtained applications parameter, the concurrency level. Our results show that this configuration control mechanism improves the RCA performance in 15%, on average, compared to other traditional consistency algorithms. Furthermore, the CCL with this mechanism is independent from the workload and DSM system specific characteristics, like sharing patterns and percentage of writes and reads.

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Research paper thumbnail of The use of research activities as learning instrument in electrical engineering and computer science graduations

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Research paper thumbnail of Computer arcwtecture education: application of a new learning method based on design and simulator development

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Research paper thumbnail of Performance Evaluation of Programming Paradigms and Languages Using Multithreading on Digital Image Processing

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Research paper thumbnail of Reducing reconfiguration times of FPGA-based systems using MultiLevel Reconfiguration

Page 1. REDUCING RECONFIGURATION TIMES OF FPGA-BASED SYSTEMS USING MULTI-LEVEL RECONFIGURATION Al... more Page 1. REDUCING RECONFIGURATION TIMES OF FPGA-BASED SYSTEMS USING MULTI-LEVEL RECONFIGURATION Alexandre M. Amaral, Carlos APS Martins Graduate Program in Electrical Engineering Pontifical Catholic University of Minas Gerais Av. ...

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Research paper thumbnail of Utilização de Exploração do Espaço de Projeto e Simulação no Aprendizado de Memórias Cache

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Research paper thumbnail of Web memory hierarchy learning and research environment

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Research paper thumbnail of Dynamically Reconfigurable Split Cache Architecture

Dynamically reconfigurable split cache architecture is a reconfigurable architecture that has all... more Dynamically reconfigurable split cache architecture is a reconfigurable architecture that has all advantages of a split cache and also the ability to reconfigure itself allowing computational performance improvement. Several real traces were performed in order to verify and compare the dynamically reconfigurable split cache architecture and the conventional split cache architecture performance, in most tests the reconfigurable architecture was better

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Research paper thumbnail of DCMSIM: didactic cache memory simulator

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Research paper thumbnail of RJSSIM: A reconfigurable job scheduling smulator for parallel processing learning

Bookmarks Related papers MentionsView impact

Research paper thumbnail of Teaching and learning parallel processing through performance analysis using Prober

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Research paper thumbnail of Extending Clustersim with MP And DSM Modules

In this paper, we present a new version of ClusterSim (Cluster Simulation Tool), in which we incl... more In this paper, we present a new version of ClusterSim (Cluster Simulation Tool), in which we included two new modules: Message-Passing (MP) and Distributed Shared Memory (DSM). ClusterSim supports the visual modeling and the simulation of clusters and their workloads for performance analysis. A modeled cluster is composed of single or multi-processed nodes, parallel job schedulers, network topologies, message-passing communications, distributed shared memory and technologies. A modeled workload is represented by users that submit jobs composed of tasks described by probability distributions and their internal structure (CPU, I/O, DSM and MPI instructions). Our main objectives in this paper are: to present a new version of ClusterSim with the inclusion of Message-Passing and Distributed Shared Memory simulation modules; to present the new software architecture and simulation model; to verify the proposal and implementation of MPI collective communication functions using different communication patterns (Message-Passing Module); to verify the proposal and implementation of DSM operations, consistency models and coherence protocols for object sharing (Distributed Shared Memory Module); to analyze ClusterSim v. 1.1 by means of two case studies. Our main contributions are the inclusion of the Message-Passing and Distributed Shared Memory simulation modules, a more detailed simulation model of ClusterSim and new features in the graphical environment.

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Research paper thumbnail of Proposta, projeto e verificação de um Elemento de Processamento Reconfigurável codificado em ArchC

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Research paper thumbnail of Modelagem de Sistemas Computacionais usando Redes de Petri: aplicação em projeto, análise e avaliação

Page 1. Modelagem de Sistemas Computacionais usando Redes de Petri: aplicação emprojeto, análise ... more Page 1. Modelagem de Sistemas Computacionais usando Redes de Petri: aplicação emprojeto, análise e avaliação ... O projeto do sistema computacional pode ser verificado e validado através de um modelo antes da construção de um protótipo? ...

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Research paper thumbnail of A NEW LEARNING METHOD OF MICROPROCESSOR ARCHITECTURE

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Research paper thumbnail of Reconfigurable Object Consistency Model for Distributed Shared Memory

The consistency models are responsible for managing the state of shared data for the applications... more The consistency models are responsible for managing the state of shared data for the applications of a distributed shared memory (DSM) systems. The already proposed consistency models are inflexible and cannot adapt to the workload and environments characteristics. So, they cannot achieve the best performance for the workloads and environments in all the cases. In this work, we propose, present and analyze a reconfigurable consistency model (ROCoM –Reconfigurable Object Consistency Model) for object based DSMs. ROCoM behavior was represented using a reconfigurable algorithm (RA) and its analysis was made using a simulation tool. Our results show that ROCoM, on average, had 34% (upper bound) better performance than other ones.

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Research paper thumbnail of A Configurable and Portable Benchmark for 3D Graphics

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Research paper thumbnail of Artificial Neural Network Engine: Parallel and Parameterized Architecture Implemented in FPGA

In this paper we present and analyze an artificial neural network hardware engine, its architectu... more In this paper we present and analyze an artificial neural network hardware engine, its architecture and implementation. The engine was designed to solve performance problems of the serial software implementations. It is based on a hierarchical parallel and parameterized architecture. Taking into account verification results, we conclude that this engine improves the computational performance, producing speedups from 52.3 to 204.5 and its architectural parameterization provides more flexibility.

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Research paper thumbnail of Reconfigurable consistency model for object-based software DSM

Distributed shared memory (DSM) systems can share a set of objects or virtual memory pages. The d... more Distributed shared memory (DSM) systems can share a set of objects or virtual memory pages. The data sharing enables the applications to access the data concurrently. But, these concurrently access can generate some inconsistencies in the shared data state. The consistency models are responsible for managing the state of shared data for the applications. The already proposed consistency models are inflexible and cannot adapt to the workload and architectures characteristics. So, they cannot generate the best performance for the workloads and architectures in all the cases. In this work, we propose, present and analyze a reconfigurable consistency model for object based DSMs. We called this consistency model ROCoM (reconfigurable object consistency model). ROCoM behavior was represented using a reconfigurable algorithm (RA) and its analysis was made using a simulation tool. Our results show that ROCoM, on average, had 30% better performance than others consistency models.

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Research paper thumbnail of RCMP: A Reconfigurable Chip-Multiprocessor Architecture

Current parallel architectures are not optimized to all different kinds of applications since the... more Current parallel architectures are not optimized to all different kinds of applications since they can vary in requirements and resource needs. An ideal system to attend different applications should be able to fit their different characteristics and resource needs and to improve application performance. Our objective is to design and to develop a system architecture that can be reconfigured to fulfill many kinds of the application requirements and run with a reduced communication overhead. Our main goal is a new Reconfigurable Chip-MultiProcessor architecture that improves adaptability to have better performance, regardless of the application requirements. Our results and its analysis show that our architecture provides greater flexibility and scalability and still obtains performance gain over one multiprocessor architecture. Our main contribution is a Reconfigurable Chip-Multiprocessor architecture, composed of reconfigurable processing, storage and interconnection elements.

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