Philip Shirvani | Stanford University (original) (raw)

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Papers by Philip Shirvani

Research paper thumbnail of Gates Building 2A, Room 236

Research paper thumbnail of Fault Location in FPGA-Based Reconfigurable Systems

Research paper thumbnail of Fault-Tolerant Systems in a Space Environment: The CRC ARGOS project

Research paper thumbnail of SEU Characterization of Digital Circuits Using Weighted Test Programs

Research paper thumbnail of Strategies for fault-tolerant, space-based computing: Lessons learned from the ARGOS testbed

Proceedings, IEEE Aerospace Conference, 2002

The Advanced Space Computing and Autonomy Testbed on the ARGOS satellite provides the first direc... more The Advanced Space Computing and Autonomy Testbed on the ARGOS satellite provides the first direct, on orbit comparison of a modem radiation hardened 32 bit processor with a similar COTS processor. This investigation was motivated by the need for higher capability computers for space flight use than could be met with available radiation hardened components. The use of COTS devices for space applications has been suggested to accelerate the development cycle and produce cost effective systems. Software-implemented corrections of radiation-induced SEUs (SIHFT) can provide low-cost solutions for enhancing the reliability of these systems. We have flown two 32-bit single board computers (SBCs) onboard the ARGOS spacecraft. One is full COTS, while the other is RAD-hard. The COTS board has an order of magnitude higher computational throughput than the RAD-hard board, offsetting the performance overhead of the SIHFT techniques used on the COTS board while consuming less power.

Research paper thumbnail of DUDES: a fault abstraction and collapsing framework for asynchronous circuits

Proceedings Sixth International Symposium on Advanced Research in Asynchronous Circuits and Systems (ASYNC 2000) (Cat. No. PR00586), 2000

Research paper thumbnail of PADded cache: a new fault-tolerance technique for cache memories

Proceedings 17th IEEE VLSI Test Symposium (Cat. No.PR00146), 1999

Research paper thumbnail of Software-Implemented Hardware Fault Tolerance Experiments COTS in Space

A major concern in digital electronics used in space is radiation-induced transient errors. Radia... more A major concern in digital electronics used in space is radiation-induced transient errors. Radiation hardening is an effective yet costly solution to this problem. Commercial off-the-shelf (COTS) components have been considered as a low-cost alternative to radiation- hardened parts. In ARGOS project 1, these two approaches are compared in an actual space experiment. We assess the effectiveness of Software-Implemented Hardware Fault Tolerance (SIHFT) techniques in enhancing the reliability of COTS.

Research paper thumbnail of Software-implemented EDAC protection against SEUs

IEEE Transactions on Reliability, 2000

Research paper thumbnail of Error detection by duplicated instructions in super-scalar processors

IEEE Transactions on Reliability, 2002

Research paper thumbnail of Control-flow checking by software signatures

IEEE Transactions on Reliability, 2002

Research paper thumbnail of Fault-Tolerance Projects at Stanford CRC

Research paper thumbnail of Gates Building 2A, Room 236

Research paper thumbnail of Fault Location in FPGA-Based Reconfigurable Systems

Research paper thumbnail of Fault-Tolerant Systems in a Space Environment: The CRC ARGOS project

Research paper thumbnail of SEU Characterization of Digital Circuits Using Weighted Test Programs

Research paper thumbnail of Strategies for fault-tolerant, space-based computing: Lessons learned from the ARGOS testbed

Proceedings, IEEE Aerospace Conference, 2002

The Advanced Space Computing and Autonomy Testbed on the ARGOS satellite provides the first direc... more The Advanced Space Computing and Autonomy Testbed on the ARGOS satellite provides the first direct, on orbit comparison of a modem radiation hardened 32 bit processor with a similar COTS processor. This investigation was motivated by the need for higher capability computers for space flight use than could be met with available radiation hardened components. The use of COTS devices for space applications has been suggested to accelerate the development cycle and produce cost effective systems. Software-implemented corrections of radiation-induced SEUs (SIHFT) can provide low-cost solutions for enhancing the reliability of these systems. We have flown two 32-bit single board computers (SBCs) onboard the ARGOS spacecraft. One is full COTS, while the other is RAD-hard. The COTS board has an order of magnitude higher computational throughput than the RAD-hard board, offsetting the performance overhead of the SIHFT techniques used on the COTS board while consuming less power.

Research paper thumbnail of DUDES: a fault abstraction and collapsing framework for asynchronous circuits

Proceedings Sixth International Symposium on Advanced Research in Asynchronous Circuits and Systems (ASYNC 2000) (Cat. No. PR00586), 2000

Research paper thumbnail of PADded cache: a new fault-tolerance technique for cache memories

Proceedings 17th IEEE VLSI Test Symposium (Cat. No.PR00146), 1999

Research paper thumbnail of Software-Implemented Hardware Fault Tolerance Experiments COTS in Space

A major concern in digital electronics used in space is radiation-induced transient errors. Radia... more A major concern in digital electronics used in space is radiation-induced transient errors. Radiation hardening is an effective yet costly solution to this problem. Commercial off-the-shelf (COTS) components have been considered as a low-cost alternative to radiation- hardened parts. In ARGOS project 1, these two approaches are compared in an actual space experiment. We assess the effectiveness of Software-Implemented Hardware Fault Tolerance (SIHFT) techniques in enhancing the reliability of COTS.

Research paper thumbnail of Software-implemented EDAC protection against SEUs

IEEE Transactions on Reliability, 2000

Research paper thumbnail of Error detection by duplicated instructions in super-scalar processors

IEEE Transactions on Reliability, 2002

Research paper thumbnail of Control-flow checking by software signatures

IEEE Transactions on Reliability, 2002

Research paper thumbnail of Fault-Tolerance Projects at Stanford CRC

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