Vlad Sima | Babes-Bolyai University (original) (raw)

Vlad Sima

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Papers by Vlad Sima

Research paper thumbnail of Compiler Assisted Runtime Adaptation

Research paper thumbnail of BIMAS - A basic mathematical package for computer aided systems analysis and design

Research paper thumbnail of IP-XACT extensions for Reconfigurable Computing

Research paper thumbnail of Profiling, Compilation, and HDL Generation within the hArte s Project

Research paper thumbnail of HARTES Toolchain Early Evaluation: Profiling, Compilation and HDL Generation

The aim of the hartes project is to facilitate and automate the rapid design and development of h... more The aim of the hartes project is to facilitate and automate the rapid design and development of heterogeneous embedded systems, targeting a combination of a general purpose embedded processor, digital signal processing and reconfigurable hardware. In this paper, we evaluate three tools from the hartes toolchain supporting profiling, compilation, and HDL generation. These tools facilitate the HW/SW partitioning, co-design, co-verification, and co-execution of demanding embedded applications. The described tools are provided by the Delft Work Bench framework1. Experimental results on MJPEG and G721 encoder application case studies suggest overall performance improvement of 228% and 36% respectively.

Research paper thumbnail of Quipu: A Statistical Model for Predicting Hardware Resources

Research paper thumbnail of Extensions of the hArtes Tool Chain

Profiling and system-level architecture exploration is a part of hArtes design space exploration ... more Profiling and system-level architecture exploration is a part of hArtes design space exploration (DSE) toolbox. The toolbox provides an optimal hardware/software partitioning of the input algorithm for each reconfigurable heterogeneous system considered. A set of ...

Research paper thumbnail of UNIVERSITATEA BABEŞ BOLYAI FACULTATEA DE DREPT

Research paper thumbnail of Compiler Assisted Runtime Adaptation

Research paper thumbnail of BIMAS - A basic mathematical package for computer aided systems analysis and design

Research paper thumbnail of IP-XACT extensions for Reconfigurable Computing

Research paper thumbnail of Profiling, Compilation, and HDL Generation within the hArte s Project

Research paper thumbnail of HARTES Toolchain Early Evaluation: Profiling, Compilation and HDL Generation

The aim of the hartes project is to facilitate and automate the rapid design and development of h... more The aim of the hartes project is to facilitate and automate the rapid design and development of heterogeneous embedded systems, targeting a combination of a general purpose embedded processor, digital signal processing and reconfigurable hardware. In this paper, we evaluate three tools from the hartes toolchain supporting profiling, compilation, and HDL generation. These tools facilitate the HW/SW partitioning, co-design, co-verification, and co-execution of demanding embedded applications. The described tools are provided by the Delft Work Bench framework1. Experimental results on MJPEG and G721 encoder application case studies suggest overall performance improvement of 228% and 36% respectively.

Research paper thumbnail of Quipu: A Statistical Model for Predicting Hardware Resources

Research paper thumbnail of Extensions of the hArtes Tool Chain

Profiling and system-level architecture exploration is a part of hArtes design space exploration ... more Profiling and system-level architecture exploration is a part of hArtes design space exploration (DSE) toolbox. The toolbox provides an optimal hardware/software partitioning of the input algorithm for each reconfigurable heterogeneous system considered. A set of ...

Research paper thumbnail of UNIVERSITATEA BABEŞ BOLYAI FACULTATEA DE DREPT

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