Shuvro Chowdhury | University of California, Santa Barbara (original) (raw)
Papers by Shuvro Chowdhury
Communications physics, Apr 27, 2023
Quantum Monte Carlo (QMC) techniques are widely used in a variety of scientific problems of great... more Quantum Monte Carlo (QMC) techniques are widely used in a variety of scientific problems of great interest and much work has been dedicated to developing optimized algorithms that can accelerate QMC on standard processors (CPU). In this paper, we demonstrate 2 − 3 orders of magnitude acceleration of a standard QMC algorithm using a specially designed digital processor, and a further 2 − 3 orders of magnitude by mapping it to a clockless analog processor. Similar improvements through customized hardware design have been demonstrated for other applications. Our demonstration provides a roadmap for 5-6 orders of magnitude acceleration for a transverse field Ising model (TFIM) and could possibly be extended to other QMC models as well. The clockless analog hardware can be viewed as the classical counterpart of the quantum annealer and provides performance within a factor of < 10 of the latter. The time to solution (TTS) for the clockless analog hardware scales with the number of qubits as O(N), improving the O(N 2) scaling for CPU implementations, but appears worse than that reported for quantum annealers by D-Wave.
arXiv (Cornell University), Mar 19, 2023
2023 IEEE International Magnetic Conference - Short Papers (INTERMAG Short Papers)
IEEE Journal on Exploratory Solid-State Computational Devices and Circuits
The transistor celebrated its 75 th birthday in 2022. The continued scaling of the transistor def... more The transistor celebrated its 75 th birthday in 2022. The continued scaling of the transistor defined by Moore's Law continues, albeit at a slower pace. Meanwhile, computing demands and energy consumption required by modern artificial intelligence (AI) algorithms have skyrocketed. As an alternative to scaling transistors for general-purpose computing, the integration of transistors with unconventional technologies has emerged as a promising path for domain-specific computing. In this article, we provide a full-stack review of probabilistic computing with p-bits as a representative example of the energy-efficient and domain-specific computing movement. We argue that p-bits could be used to build energy-efficient probabilistic systems, tailored for probabilistic algorithms and applications. From hardware, architecture, and algorithmic perspectives, we outline the main applications of probabilistic computers ranging from probabilistic machine learning and AI to combinatorial optimization and quantum simulation. Combining emerging nanodevices with the existing CMOS ecosystem will lead to probabilistic computers with orders of magnitude improvements in energy efficiency and probabilistic sampling, potentially unlocking previously unexplored regimes for powerful probabilistic algorithms.
arXiv (Cornell University), Feb 13, 2023
The transistor celebrated its 75 th birthday in 2022. The continued scaling of the transistor def... more The transistor celebrated its 75 th birthday in 2022. The continued scaling of the transistor defined by Moore's Law continues, albeit at a slower pace. Meanwhile, computing demands and energy consumption required by modern artificial intelligence (AI) algorithms have skyrocketed. As an alternative to scaling transistors for general-purpose computing, the integration of transistors with unconventional technologies has emerged as a promising path for domain-specific computing. In this article, we provide a full-stack review of probabilistic computing with p-bits as a representative example of the energy-efficient and domain-specific computing movement. We argue that p-bits could be used to build energy-efficient probabilistic systems, tailored for probabilistic algorithms and applications. From hardware, architecture, and algorithmic perspectives, we outline the main applications of probabilistic computers ranging from probabilistic machine learning and AI to combinatorial optimization and quantum simulation. Combining emerging nanodevices with the existing CMOS ecosystem will lead to probabilistic computers with orders of magnitude improvements in energy efficiency and probabilistic sampling, potentially unlocking previously unexplored regimes for powerful probabilistic algorithms.
2022 International Electron Devices Meeting (IEDM)
arXiv (Cornell University), Oct 31, 2022
Quantum Monte Carlo (QMC) techniques are widely used in a variety of scientific problems of great... more Quantum Monte Carlo (QMC) techniques are widely used in a variety of scientific problems of great interest and much work has been dedicated to developing optimized algorithms that can accelerate QMC on standard processors (CPU). In this paper, we demonstrate 2 − 3 orders of magnitude acceleration of a standard QMC algorithm using a specially designed digital processor, and a further 2 − 3 orders of magnitude by mapping it to a clockless analog processor. Similar improvements through customized hardware design have been demonstrated for other applications. Our demonstration provides a roadmap for 5-6 orders of magnitude acceleration for a transverse field Ising model (TFIM) and could possibly be extended to other QMC models as well. The clockless analog hardware can be viewed as the classical counterpart of the quantum annealer and provides performance within a factor of < 10 of the latter. The time to solution (TTS) for the clockless analog hardware scales with the number of qubits as O(N), improving the O(N 2) scaling for CPU implementations, but appears worse than that reported for quantum annealers by D-Wave.
arXiv (Cornell University), Aug 3, 2020
The Non-Equilibrium Green Function (NEGF) method was established in the 1960's through the classi... more The Non-Equilibrium Green Function (NEGF) method was established in the 1960's through the classic work of Schwinger, Kadanoff, Baym, Keldysh and others using many-body perturbation theory (MBPT) and the diagrammatic theory for non-equilibrium processes. Much of the literature is based on the original MBPT-based approach and this makes it inaccessible to those unfamiliar with advanced quantum statistical mechanics. We obtain the NEGF equations directly from a one-electron Schrödinger equation using relatively elementary arguments. These equations have been used to discuss many problems of great interest such as quantized conductance, (integer) quantum Hall effect, Anderson localization, resonant tunneling and spin transport without a systematic treatment of many-body effects. But it goes beyond purely coherent transport allowing us to include phasebreaking interactions (both momentum-relaxing and momentum-conserving as well as spin-conserving and spin-relaxing) within a self-consistent Born approximation. We believe that the scope and utility of the NEGF equations transcend the MBPTbased approach originally used to derive it. NEGF teaches us how to combine quantum dynamics with "contacts" much as Boltzmann taught us how to combine classical dynamics with "contacts", using the word "contacts" in a broad figurative sense to denote all kinds of entropy-driven processes. We believe that this approach to "contact-ing" the Schrödinger equation should be of broad interest to anyone working on device physics or non-equilibrium statistical mechanics in general.
Exploiting a well-established mapping from a d-dimensional quantum Hamiltonian to a d+1dimensiona... more Exploiting a well-established mapping from a d-dimensional quantum Hamiltonian to a d+1dimensional classical Hamiltonian that is commonly used in software quantum Monte Carlo algorithms, we propose a scalable hardware emulator where quantum circuits are emulated with room temperature p-bits. The proposed emulator operates with probabilistic bits (p-bit) that fluctuate between logic 0 and 1, that are suitably interconnected with a crossbar of resistors or conventional CMOS devices. One particularly compact hardware implementation of a p-bit is based on the standard 1 transistor/1 Magnetic Tunnel Junction (1T/1MTJ) cell of the emerging Embedded Magnetoresistive RAM (eMRAM) technology, with a simple modification: The free layer of the MTJ uses a thermally unstable nanomagnet so that the resistance of the MTJ fluctuates in the presence of thermal noise. Using established device models for such p-bits and interconnects simulated in SPICE, we demonstrate a faithful mapping of the Transverse Ising Hamiltonian to its classical counterpart, by comparing exact calculations of averages and correlations. Even though we focus on the Transverse Ising Hamiltonian, many other "stoquastic" Hamiltonians − avoiding the sign problem − can be mapped to the hardware emulator. For such systems, large scale integration of the eMRAM technology can enable the intriguing possibility of emulating a very large number of q-bits by room temperature p-bits. The compact and low-level representation of the p-bit offers the possibility of greater efficiency and scalability compared to standard software implementations of quantum Monte Carlo methods.
The threshold voltage and capacitance voltage characteristics of ultra-thin Silicon-on-Insulator ... more The threshold voltage and capacitance voltage characteristics of ultra-thin Silicon-on-Insulator MOSFET are greatly influenced by the thickness and doping concentration of the silicon film. In this work, the capacitance voltage characteristics and threshold voltage of the device have been analyzed with quantum mechanical effects using the Self-Consistent model. Reduction of channel thickness and adding doping impurities cause an increase in the threshold voltage. Moreover, the temperature effects cause a significant amount of threshold voltage shift. The temperature dependence of threshold voltage has also been observed with Self- Consistent approach which are well supported from experimental performance of practical devices.
arXiv: Disordered Systems and Neural Networks, 2020
The recent groundbreaking demonstration of quantum supremacy in the noisy intermediate scale quan... more The recent groundbreaking demonstration of quantum supremacy in the noisy intermediate scale quantum (NISQ) era has led to an intense activity in establishing finer boundaries between classical and quantum computing. In this paper, we use quantum Monte Carlo (QMC) techniques to formulate a systematic procedure for translating any sequence of ddd quantum gates acting on nnn q-bits into a Boltzmann machine (BM) having n+g(d)n+g(d)n+g(d) classical spins or p-bits with two values "0" and "1", but with a complex energy function EEE. Using this procedure we emulate Shor's algorithm with up to 363636 q-bits using 909090 p-bits, on an ordinary laptop computer in less than a day, while a naive Schrodinger implementation would require multiplying matrices with approx1021\approx 10^{21}approx1021 elements. Even larger problems should be accessible on dedicated Ising Machines. However, we also identify clear limitations of the probabilistic approach by introducing a quantitative metric $S_{\text{Total}...
Applied Nanoscience, 2012
Wave function penetration has significant impact on nanoscale devices having ultrathin gate oxide... more Wave function penetration has significant impact on nanoscale devices having ultrathin gate oxide. Although wave function penetration effects on ballistic drain current and capacitance-voltage characteristics in nanoscale devices have been reported in literature, to the best of the authors' knowledge, effects of temperature on drain current incorporating with and without wave function penetration are yet to be studied. In this work, the impacts of temperature, gate dielectric and film thickness in wave function penetration on ballistic drain current of nanoscale double-gate (DG) MOSFETs are presented. The effects are observed using two-dimensional self-consistent solution of Schrödinger and Poisson equations. It has been obtained that temperature effect on drain current is greatly dependent on silicon surface orientation. Drain current of DG MOS-FETs fabricated on h110i surface is more sensitive to temperature compared to h001i surface. This has been obtained for both the cases with and without incorporating wave function penetration in silicon-gate oxide interface. Electrostatics behind this phenomenon has been explained from the transmission probability of electrons from source to drain which is largely influenced by temperature on h110i surface compared to h001i: Moreover, the transmission coefficient is significantly affected by wave function penetration in h110i than h001i surface. Both these demonstrate greater sensitivity of temperature and wave function penetration in h110i silicon surface orientation compared to h001i: Furthermore, gate dielectric with lower conduction band offset and device scaling with thin channel thickness tend to exhibit greater impact of wave function penetration.
2009 39th International Symposium on Multiple-Valued Logic, 2009
... The particular advantage of Galois field for MVQL is that arbitrary multiple valued Galois fi... more ... The particular advantage of Galois field for MVQL is that arbitrary multiple valued Galois field operations can be used in the Toffoli gates of the ESOP-based (Exclusive Sums-of-Products) realization of binary reversible circuits, where Galois addition and mul-tiplication replace ...
TENCON 2008 - 2008 IEEE Region 10 Conference, 2008
I. INTRODUCTION While binary logic is the most usual/tradiational basis for quantum computation (... more I. INTRODUCTION While binary logic is the most usual/tradiational basis for quantum computation (QC) [1], multivalued logic offers several advantages for QC over their binary counterpart, such as better security for quantum cryptography [2], [3], more powerful quantum information ...
2011 41st IEEE International Symposium on Multiple-Valued Logic, 2011
Abstract We realize square operation for quantum ternary logic using basic quantum ternary gates.... more Abstract We realize square operation for quantum ternary logic using basic quantum ternary gates. With the aid of this square operation, we develop a square-multiplier unit. We further develop a cost measurement technique of the square operation and square multiplication ...
Applied Mechanics and Materials, 2011
The performance and characteristics of Double Gate MOSFET with high dielectric constant (high-κ) ... more The performance and characteristics of Double Gate MOSFET with high dielectric constant (high-κ) gate stack have been analyzed and compared with those of conventional pure SiO2gate MOSFET. Quantum Ballistic Transport Model has been used to demonstrate the performance of the device in terms of threshold voltage, drain current in both low and high drain voltage regions and subthreshold swing. The effect of temperature on the threshold voltage and subthreshold characteristics has also been observed. This work reveals that improved performance of this structure can be achieved by scaling the gate length and illustrates its superiority over SiO2gate MOSFETs in achieving long-term ITRS goals.
Advances in Numerical Analysis, 2013
A parametric equation for a modified Bézier curve is proposed for curve fitting applications. The... more A parametric equation for a modified Bézier curve is proposed for curve fitting applications. The proposed equation contains shaping parameters to adjust the shape of the fitted curve. This flexibility of shape control is expected to produce a curve which is capable of following any sets of discrete data points. A Differential Evolution (DE) optimization based technique is proposed to find the optimum value of these shaping parameters. The optimality of the fitted curve is defined in terms of some proposed cost parameters. These parameters are defined based on sum of squares errors. Numerical results are presented highlighting the effectiveness of the proposed curves compared with conventional Bézier curves. From the obtained results, it is observed that the proposed method produces a curve that fits the data points more accurately.
Physical Review Applied, 2019
Communications physics, Apr 27, 2023
Quantum Monte Carlo (QMC) techniques are widely used in a variety of scientific problems of great... more Quantum Monte Carlo (QMC) techniques are widely used in a variety of scientific problems of great interest and much work has been dedicated to developing optimized algorithms that can accelerate QMC on standard processors (CPU). In this paper, we demonstrate 2 − 3 orders of magnitude acceleration of a standard QMC algorithm using a specially designed digital processor, and a further 2 − 3 orders of magnitude by mapping it to a clockless analog processor. Similar improvements through customized hardware design have been demonstrated for other applications. Our demonstration provides a roadmap for 5-6 orders of magnitude acceleration for a transverse field Ising model (TFIM) and could possibly be extended to other QMC models as well. The clockless analog hardware can be viewed as the classical counterpart of the quantum annealer and provides performance within a factor of < 10 of the latter. The time to solution (TTS) for the clockless analog hardware scales with the number of qubits as O(N), improving the O(N 2) scaling for CPU implementations, but appears worse than that reported for quantum annealers by D-Wave.
arXiv (Cornell University), Mar 19, 2023
2023 IEEE International Magnetic Conference - Short Papers (INTERMAG Short Papers)
IEEE Journal on Exploratory Solid-State Computational Devices and Circuits
The transistor celebrated its 75 th birthday in 2022. The continued scaling of the transistor def... more The transistor celebrated its 75 th birthday in 2022. The continued scaling of the transistor defined by Moore's Law continues, albeit at a slower pace. Meanwhile, computing demands and energy consumption required by modern artificial intelligence (AI) algorithms have skyrocketed. As an alternative to scaling transistors for general-purpose computing, the integration of transistors with unconventional technologies has emerged as a promising path for domain-specific computing. In this article, we provide a full-stack review of probabilistic computing with p-bits as a representative example of the energy-efficient and domain-specific computing movement. We argue that p-bits could be used to build energy-efficient probabilistic systems, tailored for probabilistic algorithms and applications. From hardware, architecture, and algorithmic perspectives, we outline the main applications of probabilistic computers ranging from probabilistic machine learning and AI to combinatorial optimization and quantum simulation. Combining emerging nanodevices with the existing CMOS ecosystem will lead to probabilistic computers with orders of magnitude improvements in energy efficiency and probabilistic sampling, potentially unlocking previously unexplored regimes for powerful probabilistic algorithms.
arXiv (Cornell University), Feb 13, 2023
The transistor celebrated its 75 th birthday in 2022. The continued scaling of the transistor def... more The transistor celebrated its 75 th birthday in 2022. The continued scaling of the transistor defined by Moore's Law continues, albeit at a slower pace. Meanwhile, computing demands and energy consumption required by modern artificial intelligence (AI) algorithms have skyrocketed. As an alternative to scaling transistors for general-purpose computing, the integration of transistors with unconventional technologies has emerged as a promising path for domain-specific computing. In this article, we provide a full-stack review of probabilistic computing with p-bits as a representative example of the energy-efficient and domain-specific computing movement. We argue that p-bits could be used to build energy-efficient probabilistic systems, tailored for probabilistic algorithms and applications. From hardware, architecture, and algorithmic perspectives, we outline the main applications of probabilistic computers ranging from probabilistic machine learning and AI to combinatorial optimization and quantum simulation. Combining emerging nanodevices with the existing CMOS ecosystem will lead to probabilistic computers with orders of magnitude improvements in energy efficiency and probabilistic sampling, potentially unlocking previously unexplored regimes for powerful probabilistic algorithms.
2022 International Electron Devices Meeting (IEDM)
arXiv (Cornell University), Oct 31, 2022
Quantum Monte Carlo (QMC) techniques are widely used in a variety of scientific problems of great... more Quantum Monte Carlo (QMC) techniques are widely used in a variety of scientific problems of great interest and much work has been dedicated to developing optimized algorithms that can accelerate QMC on standard processors (CPU). In this paper, we demonstrate 2 − 3 orders of magnitude acceleration of a standard QMC algorithm using a specially designed digital processor, and a further 2 − 3 orders of magnitude by mapping it to a clockless analog processor. Similar improvements through customized hardware design have been demonstrated for other applications. Our demonstration provides a roadmap for 5-6 orders of magnitude acceleration for a transverse field Ising model (TFIM) and could possibly be extended to other QMC models as well. The clockless analog hardware can be viewed as the classical counterpart of the quantum annealer and provides performance within a factor of < 10 of the latter. The time to solution (TTS) for the clockless analog hardware scales with the number of qubits as O(N), improving the O(N 2) scaling for CPU implementations, but appears worse than that reported for quantum annealers by D-Wave.
arXiv (Cornell University), Aug 3, 2020
The Non-Equilibrium Green Function (NEGF) method was established in the 1960's through the classi... more The Non-Equilibrium Green Function (NEGF) method was established in the 1960's through the classic work of Schwinger, Kadanoff, Baym, Keldysh and others using many-body perturbation theory (MBPT) and the diagrammatic theory for non-equilibrium processes. Much of the literature is based on the original MBPT-based approach and this makes it inaccessible to those unfamiliar with advanced quantum statistical mechanics. We obtain the NEGF equations directly from a one-electron Schrödinger equation using relatively elementary arguments. These equations have been used to discuss many problems of great interest such as quantized conductance, (integer) quantum Hall effect, Anderson localization, resonant tunneling and spin transport without a systematic treatment of many-body effects. But it goes beyond purely coherent transport allowing us to include phasebreaking interactions (both momentum-relaxing and momentum-conserving as well as spin-conserving and spin-relaxing) within a self-consistent Born approximation. We believe that the scope and utility of the NEGF equations transcend the MBPTbased approach originally used to derive it. NEGF teaches us how to combine quantum dynamics with "contacts" much as Boltzmann taught us how to combine classical dynamics with "contacts", using the word "contacts" in a broad figurative sense to denote all kinds of entropy-driven processes. We believe that this approach to "contact-ing" the Schrödinger equation should be of broad interest to anyone working on device physics or non-equilibrium statistical mechanics in general.
Exploiting a well-established mapping from a d-dimensional quantum Hamiltonian to a d+1dimensiona... more Exploiting a well-established mapping from a d-dimensional quantum Hamiltonian to a d+1dimensional classical Hamiltonian that is commonly used in software quantum Monte Carlo algorithms, we propose a scalable hardware emulator where quantum circuits are emulated with room temperature p-bits. The proposed emulator operates with probabilistic bits (p-bit) that fluctuate between logic 0 and 1, that are suitably interconnected with a crossbar of resistors or conventional CMOS devices. One particularly compact hardware implementation of a p-bit is based on the standard 1 transistor/1 Magnetic Tunnel Junction (1T/1MTJ) cell of the emerging Embedded Magnetoresistive RAM (eMRAM) technology, with a simple modification: The free layer of the MTJ uses a thermally unstable nanomagnet so that the resistance of the MTJ fluctuates in the presence of thermal noise. Using established device models for such p-bits and interconnects simulated in SPICE, we demonstrate a faithful mapping of the Transverse Ising Hamiltonian to its classical counterpart, by comparing exact calculations of averages and correlations. Even though we focus on the Transverse Ising Hamiltonian, many other "stoquastic" Hamiltonians − avoiding the sign problem − can be mapped to the hardware emulator. For such systems, large scale integration of the eMRAM technology can enable the intriguing possibility of emulating a very large number of q-bits by room temperature p-bits. The compact and low-level representation of the p-bit offers the possibility of greater efficiency and scalability compared to standard software implementations of quantum Monte Carlo methods.
The threshold voltage and capacitance voltage characteristics of ultra-thin Silicon-on-Insulator ... more The threshold voltage and capacitance voltage characteristics of ultra-thin Silicon-on-Insulator MOSFET are greatly influenced by the thickness and doping concentration of the silicon film. In this work, the capacitance voltage characteristics and threshold voltage of the device have been analyzed with quantum mechanical effects using the Self-Consistent model. Reduction of channel thickness and adding doping impurities cause an increase in the threshold voltage. Moreover, the temperature effects cause a significant amount of threshold voltage shift. The temperature dependence of threshold voltage has also been observed with Self- Consistent approach which are well supported from experimental performance of practical devices.
arXiv: Disordered Systems and Neural Networks, 2020
The recent groundbreaking demonstration of quantum supremacy in the noisy intermediate scale quan... more The recent groundbreaking demonstration of quantum supremacy in the noisy intermediate scale quantum (NISQ) era has led to an intense activity in establishing finer boundaries between classical and quantum computing. In this paper, we use quantum Monte Carlo (QMC) techniques to formulate a systematic procedure for translating any sequence of ddd quantum gates acting on nnn q-bits into a Boltzmann machine (BM) having n+g(d)n+g(d)n+g(d) classical spins or p-bits with two values "0" and "1", but with a complex energy function EEE. Using this procedure we emulate Shor's algorithm with up to 363636 q-bits using 909090 p-bits, on an ordinary laptop computer in less than a day, while a naive Schrodinger implementation would require multiplying matrices with approx1021\approx 10^{21}approx1021 elements. Even larger problems should be accessible on dedicated Ising Machines. However, we also identify clear limitations of the probabilistic approach by introducing a quantitative metric $S_{\text{Total}...
Applied Nanoscience, 2012
Wave function penetration has significant impact on nanoscale devices having ultrathin gate oxide... more Wave function penetration has significant impact on nanoscale devices having ultrathin gate oxide. Although wave function penetration effects on ballistic drain current and capacitance-voltage characteristics in nanoscale devices have been reported in literature, to the best of the authors' knowledge, effects of temperature on drain current incorporating with and without wave function penetration are yet to be studied. In this work, the impacts of temperature, gate dielectric and film thickness in wave function penetration on ballistic drain current of nanoscale double-gate (DG) MOSFETs are presented. The effects are observed using two-dimensional self-consistent solution of Schrödinger and Poisson equations. It has been obtained that temperature effect on drain current is greatly dependent on silicon surface orientation. Drain current of DG MOS-FETs fabricated on h110i surface is more sensitive to temperature compared to h001i surface. This has been obtained for both the cases with and without incorporating wave function penetration in silicon-gate oxide interface. Electrostatics behind this phenomenon has been explained from the transmission probability of electrons from source to drain which is largely influenced by temperature on h110i surface compared to h001i: Moreover, the transmission coefficient is significantly affected by wave function penetration in h110i than h001i surface. Both these demonstrate greater sensitivity of temperature and wave function penetration in h110i silicon surface orientation compared to h001i: Furthermore, gate dielectric with lower conduction band offset and device scaling with thin channel thickness tend to exhibit greater impact of wave function penetration.
2009 39th International Symposium on Multiple-Valued Logic, 2009
... The particular advantage of Galois field for MVQL is that arbitrary multiple valued Galois fi... more ... The particular advantage of Galois field for MVQL is that arbitrary multiple valued Galois field operations can be used in the Toffoli gates of the ESOP-based (Exclusive Sums-of-Products) realization of binary reversible circuits, where Galois addition and mul-tiplication replace ...
TENCON 2008 - 2008 IEEE Region 10 Conference, 2008
I. INTRODUCTION While binary logic is the most usual/tradiational basis for quantum computation (... more I. INTRODUCTION While binary logic is the most usual/tradiational basis for quantum computation (QC) [1], multivalued logic offers several advantages for QC over their binary counterpart, such as better security for quantum cryptography [2], [3], more powerful quantum information ...
2011 41st IEEE International Symposium on Multiple-Valued Logic, 2011
Abstract We realize square operation for quantum ternary logic using basic quantum ternary gates.... more Abstract We realize square operation for quantum ternary logic using basic quantum ternary gates. With the aid of this square operation, we develop a square-multiplier unit. We further develop a cost measurement technique of the square operation and square multiplication ...
Applied Mechanics and Materials, 2011
The performance and characteristics of Double Gate MOSFET with high dielectric constant (high-κ) ... more The performance and characteristics of Double Gate MOSFET with high dielectric constant (high-κ) gate stack have been analyzed and compared with those of conventional pure SiO2gate MOSFET. Quantum Ballistic Transport Model has been used to demonstrate the performance of the device in terms of threshold voltage, drain current in both low and high drain voltage regions and subthreshold swing. The effect of temperature on the threshold voltage and subthreshold characteristics has also been observed. This work reveals that improved performance of this structure can be achieved by scaling the gate length and illustrates its superiority over SiO2gate MOSFETs in achieving long-term ITRS goals.
Advances in Numerical Analysis, 2013
A parametric equation for a modified Bézier curve is proposed for curve fitting applications. The... more A parametric equation for a modified Bézier curve is proposed for curve fitting applications. The proposed equation contains shaping parameters to adjust the shape of the fitted curve. This flexibility of shape control is expected to produce a curve which is capable of following any sets of discrete data points. A Differential Evolution (DE) optimization based technique is proposed to find the optimum value of these shaping parameters. The optimality of the fitted curve is defined in terms of some proposed cost parameters. These parameters are defined based on sum of squares errors. Numerical results are presented highlighting the effectiveness of the proposed curves compared with conventional Bézier curves. From the obtained results, it is observed that the proposed method produces a curve that fits the data points more accurately.
Physical Review Applied, 2019