Lafifa Jamal | University of Dhaka, Bangladesh (original) (raw)
Papers by Lafifa Jamal
IEEE Access
This work involved human subjects or animals in its research. The authors confirm that all human/... more This work involved human subjects or animals in its research. The authors confirm that all human/animal subject research procedures and protocols are exempt from review board approval.
ACM Sigsoft Software Engineering Notes, Jan 10, 2023
2020 Joint 9th International Conference on Informatics, Electronics & Vision (ICIEV) and 2020 4th International Conference on Imaging, Vision & Pattern Recognition (icIVPR), 2020
Service delivery application involving robots relies on the success of the navigation process. To... more Service delivery application involving robots relies on the success of the navigation process. To ensure maximum performance, the navigation process should generate optimal path avoiding collisions with dynamic obstacles. Selecting such a path by analyzing the dynamic environment condition while putting minimal overhead on robots is a challenging problem in service robot navigation. In this work, we develop a Fog assisted service robot navigation system that puts most of the computing tasks to a central Fog server. The server employs a vision-based monitoring system to locate the robots and obstacles. The optimal path is generated by analyzing the available information and the robots are instructed accordingly. We implement a test-bed system to evaluate the performance of the proposed system. The results depict that the proposed fog-based system can achieve as low as 23.81% of average distance covered, 22.05% of average service delivery time, and 22.72% of average energy consumption compared to the without fog systems. Contribution-A fog-based system for service robot navigation is proposed that uses computer vision to generate optimal obstacle free path.
American Behavioral Scientist, 2022
There is nearly equal number of male and female student enrollments in primary and secondary leve... more There is nearly equal number of male and female student enrollments in primary and secondary level of education in Bangladesh, but at the tertiary level and at the job sector, a sharp drop in the number of women is observed. This paper explores the current status of female students’ enrollment in science, technology, engineering, and mathematics (STEM) at the tertiary education system in Bangladesh. It is followed by explorations of challenges women face in technical workplace. Quantitative data for the paper come from more than 1.18 million students at tertiary level from eight public and private universities for three academic years from 2018 to 2020. In addition, a qualitative study was conducted with 48 participants in pre- and during COVID-19 eras to understand barriers hampering women in STEM-related education and jobs. The paper provides a guideline for future policies to ensure inclusive space for growth and retention for women in STEM.
Recently, Quantum-dot Cellular Automata (QCA) based reversible logic circuit has an enormous bene... more Recently, Quantum-dot Cellular Automata (QCA) based reversible logic circuit has an enormous benefit over CMOS based logic circuit. As a promising technology for Nanoelectronics computing, reversible-QCA has gained more and more attention from researchers around the world. In this paper, a reversible authenticator circuit based on QCA was implemented. This article presents a Nano-authenticator circuit to verify the authenticated and unauthenticated inputs. The proposed QCA designs have been implemented in a different manner from existing designs, which are primarily based on a coplanar design approach. The efficiency of QCA design has been investigated based on parameters such as cell count, area, and latency. Furthermore, missing an additional cell defect of the reversible authenticator has been analyzed, and covers the fault tolerance of 60.41% and 75%, respectively. In addition, the proposed Feynman gate in QCA environment achieves 76.35% area, 12.5% cell count and 95.55% average...
The demand for a smart monitoring system has been increased to reduce the impact of environmental... more The demand for a smart monitoring system has been increased to reduce the impact of environmental pollution. In this paper, a smart system has been proposed that includes an IoT device which can monitor the pollution and explosion level of the septic tanks as well as the surroundings. The system can detect whether a particular area is environment friendly or not. A notification system has been designed that notifies the respective individual when there exists any risk factor in the environment. The proposed design has been compared with existing approaches. The proposed system has 93.78% accuracy, 95.68% precision, and 96.52 % recall. It shows 6.11%, 3.37%, and 1.84% improvement in terms of accuracy, precision, and recall respectively over the best existing approach.
This paper presents a new approach to design a cost effective fault tolerant reversible multiplie... more This paper presents a new approach to design a cost effective fault tolerant reversible multiplier circuit. Unlike existing multiplier circuits that have separate circuits for partial product generation and multi-operand addition, the proposed multiplier, designed using a combination of six distinct blocks, incorporates these two circuits together. It also provides an algorithm that depicts the way of using the blocks in designing a ntimesnn\times nntimesn fault tolerant reversible multiplier. The proposed multiplier is simulated to verify the correctness of the design and algorithm. The comparative study shows that the proposed multiplier is more optimized than any existing fault tolerant reversible multiplier in terms of quantum cost, garbage outputs and number of gates used. The proposed multiplier can be used to design a reversible fault tolerant arithmetic logic unit.
Journal of Computer Science, 2009
Problem Statement: Arithmetic Logic Unit (ALU) of a crypto-processor and microchips leak informat... more Problem Statement: Arithmetic Logic Unit (ALU) of a crypto-processor and microchips leak information through power consumption. Although the cryptographic protocols are secured against mathematical attacks, the attackers can break the encryption by measuring the energy consumption. Approach: To thwart attacks, this study proposed the use of reversible logic for designing the ALU of a crypto-processor. Ideally, reversible circuits do not dissipate any energy. If reversible circuits are used, then the attacker would not be able to analyze the power consumption. In order to design the reversible ALU of a crypto-processor, reversible Carry Save Adder (CSA) using Modified TSG (MTSG) gates and architecture of Montgomery multiplier were proposed. For reversible implementation of Montgomery multiplier, efficient reversible multiplexers and sequential circuits such as reversible registers and shift registers were presented. Results: This study showed that modified designs perform better than the existing ones in terms of number of gates, number of garbage outputs and quantum cost. Lower bounds of the proposed designs were established by providing relevant theorems and lemmas. Conclusion: The application of reversible circuit is suitable to the field of hardware cryptography.
2008 11th International Conference on Computer and Information Technology, 2008
Abstract -- Mobile agent offers a new programming paradigm in which a program can move from one n... more Abstract -- Mobile agent offers a new programming paradigm in which a program can move from one node to another node in a network. Since data as well as code move at the same time, security issue becomes more important than traditional RPC system. To overcome the security ...
Proceedings of the great lakes symposium on VLSI - GLSVLSI '12, 2012
Abstract Reversible computing dissipates zero energy in terms of information loss at input and al... more Abstract Reversible computing dissipates zero energy in terms of information loss at input and also it can detect error of circuit by keeping unique input-output mapping. In this paper, we have proposed a cost effective design of Reversible Programmable Logic Arrays ( ...
Reversible flip-flops are the most significant memory elements that store data consuming zero pow... more Reversible flip-flops are the most significant memory elements that store data consuming zero power which will be the target building block of memory for the forthcoming quantum computing devices. Therefore cost effective solution to design varieties of flip-flops has been ...
International Journal of …, 2012
Conventional logic dissipates more power by losing bits of information whereas reversible circuit... more Conventional logic dissipates more power by losing bits of information whereas reversible circuitry recovers from bit loss through unique mapping between input and output vectors. In this regard, reversible or information lossless logic has become an immensely promising technology not only in low power CMOS design and nano-technology based system, but also primal requirement for quantum computing. On the other hand, carry look-ahead adder overcomes the limitations of the ripple wave adder by computing the carry values directly from the adder input. In this paper we present compact and efficient reversible logic implementations of carry look-ahead adder. The proposed design outperforms the existing works in terms of numbers of gates, garbage outputs, quantum costs and delay. In order to show the efficiency of the proposed method lower bounds of the combinational reversible carry skip logic in terms of garbage outputs and quantum cost are proposed as well, which is first ever proposed in the literature to the best of our knowledge. This design of proposed reversible circuit is appropriate for different quantum ALU and embedded processor.
Sustainable Computing: Informatics and Systems, 2013
ABSTRACT Reversible logic has captured significant attention in recent time as reducing power con... more ABSTRACT Reversible logic has captured significant attention in recent time as reducing power consumption is one of the main concern of digital logic design. It consumes less power by recovering bit loss from its unique input–output mapping. In this paper, we propose a reversible control unit, which is first ever proposed in literature. Two new 4 × 4 reversible gates, namely HL gate and BJ gate, are proposed to design reversible decoder and J-K flip-flop. An algorithm has been shown to design a reversible control unit. On the way to design the control unit, we propose reversible decoder, sequence counter, instruction register and control logic gates. These circuits are analyzed with the existing ones. The comparative results show that the proposed design outperforms the existing designs in terms of numbers of gates, garbage outputs, delay and quantum cost. In addition, some lower bounds on the numbers of gates and garbage outputs of the proposed control unit have also been presented.
2013 IEEE International Symposium on Circuits and Systems (ISCAS2013), 2013
ABSTRACT In this paper, we propose a reversible n-bit divider, where n is the number of bits of t... more ABSTRACT In this paper, we propose a reversible n-bit divider, where n is the number of bits of the operands of dividend. Two approaches for constructing a compact reversible divider have been presented here. The first approach uses conventional division array and the second approach uses high speed division array. Both of the approaches can handle floating point numbers. Several theorems on the numbers of gates, garbage outputs and quantum cost of the reversible n-bit divider have been shown. The comparative study shows that the proposed designs can work with fractional numbers where as existing designs can not. Proposed designs are also much better than the existing approaches considering all the efficiency parameters of reversible logic design which includes numbers of gates used, quantum cost and garbage outputs.
Lecture Notes in Computer Science, 2012
Conventional logic dissipates more power by losing bits of information whereas reversibility reco... more Conventional logic dissipates more power by losing bits of information whereas reversibility recovers bit loss from the unique input-output mapping. Reversible Computation has high promise oflow power consumption. In this paper, we have proposed a new 4x4 reversible gate (namely BJ gate) which is used to design reversible J-K flip-flop. We have also proposed the design of low power reversible decoders, reversible sequence counter and reversible instruction register. These circuits are analyzed with the existing ones. The comparative results show that the proposed designs of reversible decoders and sequential circuits outperform the existing designs in terms of numbers of gates, garbage outputs and quantum cost. Some lower bounds on the number of gates and garbage outputs of the proposed decoder circuits have also been proposed.
IEEE Access
This work involved human subjects or animals in its research. The authors confirm that all human/... more This work involved human subjects or animals in its research. The authors confirm that all human/animal subject research procedures and protocols are exempt from review board approval.
ACM Sigsoft Software Engineering Notes, Jan 10, 2023
2020 Joint 9th International Conference on Informatics, Electronics & Vision (ICIEV) and 2020 4th International Conference on Imaging, Vision & Pattern Recognition (icIVPR), 2020
Service delivery application involving robots relies on the success of the navigation process. To... more Service delivery application involving robots relies on the success of the navigation process. To ensure maximum performance, the navigation process should generate optimal path avoiding collisions with dynamic obstacles. Selecting such a path by analyzing the dynamic environment condition while putting minimal overhead on robots is a challenging problem in service robot navigation. In this work, we develop a Fog assisted service robot navigation system that puts most of the computing tasks to a central Fog server. The server employs a vision-based monitoring system to locate the robots and obstacles. The optimal path is generated by analyzing the available information and the robots are instructed accordingly. We implement a test-bed system to evaluate the performance of the proposed system. The results depict that the proposed fog-based system can achieve as low as 23.81% of average distance covered, 22.05% of average service delivery time, and 22.72% of average energy consumption compared to the without fog systems. Contribution-A fog-based system for service robot navigation is proposed that uses computer vision to generate optimal obstacle free path.
American Behavioral Scientist, 2022
There is nearly equal number of male and female student enrollments in primary and secondary leve... more There is nearly equal number of male and female student enrollments in primary and secondary level of education in Bangladesh, but at the tertiary level and at the job sector, a sharp drop in the number of women is observed. This paper explores the current status of female students’ enrollment in science, technology, engineering, and mathematics (STEM) at the tertiary education system in Bangladesh. It is followed by explorations of challenges women face in technical workplace. Quantitative data for the paper come from more than 1.18 million students at tertiary level from eight public and private universities for three academic years from 2018 to 2020. In addition, a qualitative study was conducted with 48 participants in pre- and during COVID-19 eras to understand barriers hampering women in STEM-related education and jobs. The paper provides a guideline for future policies to ensure inclusive space for growth and retention for women in STEM.
Recently, Quantum-dot Cellular Automata (QCA) based reversible logic circuit has an enormous bene... more Recently, Quantum-dot Cellular Automata (QCA) based reversible logic circuit has an enormous benefit over CMOS based logic circuit. As a promising technology for Nanoelectronics computing, reversible-QCA has gained more and more attention from researchers around the world. In this paper, a reversible authenticator circuit based on QCA was implemented. This article presents a Nano-authenticator circuit to verify the authenticated and unauthenticated inputs. The proposed QCA designs have been implemented in a different manner from existing designs, which are primarily based on a coplanar design approach. The efficiency of QCA design has been investigated based on parameters such as cell count, area, and latency. Furthermore, missing an additional cell defect of the reversible authenticator has been analyzed, and covers the fault tolerance of 60.41% and 75%, respectively. In addition, the proposed Feynman gate in QCA environment achieves 76.35% area, 12.5% cell count and 95.55% average...
The demand for a smart monitoring system has been increased to reduce the impact of environmental... more The demand for a smart monitoring system has been increased to reduce the impact of environmental pollution. In this paper, a smart system has been proposed that includes an IoT device which can monitor the pollution and explosion level of the septic tanks as well as the surroundings. The system can detect whether a particular area is environment friendly or not. A notification system has been designed that notifies the respective individual when there exists any risk factor in the environment. The proposed design has been compared with existing approaches. The proposed system has 93.78% accuracy, 95.68% precision, and 96.52 % recall. It shows 6.11%, 3.37%, and 1.84% improvement in terms of accuracy, precision, and recall respectively over the best existing approach.
This paper presents a new approach to design a cost effective fault tolerant reversible multiplie... more This paper presents a new approach to design a cost effective fault tolerant reversible multiplier circuit. Unlike existing multiplier circuits that have separate circuits for partial product generation and multi-operand addition, the proposed multiplier, designed using a combination of six distinct blocks, incorporates these two circuits together. It also provides an algorithm that depicts the way of using the blocks in designing a ntimesnn\times nntimesn fault tolerant reversible multiplier. The proposed multiplier is simulated to verify the correctness of the design and algorithm. The comparative study shows that the proposed multiplier is more optimized than any existing fault tolerant reversible multiplier in terms of quantum cost, garbage outputs and number of gates used. The proposed multiplier can be used to design a reversible fault tolerant arithmetic logic unit.
Journal of Computer Science, 2009
Problem Statement: Arithmetic Logic Unit (ALU) of a crypto-processor and microchips leak informat... more Problem Statement: Arithmetic Logic Unit (ALU) of a crypto-processor and microchips leak information through power consumption. Although the cryptographic protocols are secured against mathematical attacks, the attackers can break the encryption by measuring the energy consumption. Approach: To thwart attacks, this study proposed the use of reversible logic for designing the ALU of a crypto-processor. Ideally, reversible circuits do not dissipate any energy. If reversible circuits are used, then the attacker would not be able to analyze the power consumption. In order to design the reversible ALU of a crypto-processor, reversible Carry Save Adder (CSA) using Modified TSG (MTSG) gates and architecture of Montgomery multiplier were proposed. For reversible implementation of Montgomery multiplier, efficient reversible multiplexers and sequential circuits such as reversible registers and shift registers were presented. Results: This study showed that modified designs perform better than the existing ones in terms of number of gates, number of garbage outputs and quantum cost. Lower bounds of the proposed designs were established by providing relevant theorems and lemmas. Conclusion: The application of reversible circuit is suitable to the field of hardware cryptography.
2008 11th International Conference on Computer and Information Technology, 2008
Abstract -- Mobile agent offers a new programming paradigm in which a program can move from one n... more Abstract -- Mobile agent offers a new programming paradigm in which a program can move from one node to another node in a network. Since data as well as code move at the same time, security issue becomes more important than traditional RPC system. To overcome the security ...
Proceedings of the great lakes symposium on VLSI - GLSVLSI '12, 2012
Abstract Reversible computing dissipates zero energy in terms of information loss at input and al... more Abstract Reversible computing dissipates zero energy in terms of information loss at input and also it can detect error of circuit by keeping unique input-output mapping. In this paper, we have proposed a cost effective design of Reversible Programmable Logic Arrays ( ...
Reversible flip-flops are the most significant memory elements that store data consuming zero pow... more Reversible flip-flops are the most significant memory elements that store data consuming zero power which will be the target building block of memory for the forthcoming quantum computing devices. Therefore cost effective solution to design varieties of flip-flops has been ...
International Journal of …, 2012
Conventional logic dissipates more power by losing bits of information whereas reversible circuit... more Conventional logic dissipates more power by losing bits of information whereas reversible circuitry recovers from bit loss through unique mapping between input and output vectors. In this regard, reversible or information lossless logic has become an immensely promising technology not only in low power CMOS design and nano-technology based system, but also primal requirement for quantum computing. On the other hand, carry look-ahead adder overcomes the limitations of the ripple wave adder by computing the carry values directly from the adder input. In this paper we present compact and efficient reversible logic implementations of carry look-ahead adder. The proposed design outperforms the existing works in terms of numbers of gates, garbage outputs, quantum costs and delay. In order to show the efficiency of the proposed method lower bounds of the combinational reversible carry skip logic in terms of garbage outputs and quantum cost are proposed as well, which is first ever proposed in the literature to the best of our knowledge. This design of proposed reversible circuit is appropriate for different quantum ALU and embedded processor.
Sustainable Computing: Informatics and Systems, 2013
ABSTRACT Reversible logic has captured significant attention in recent time as reducing power con... more ABSTRACT Reversible logic has captured significant attention in recent time as reducing power consumption is one of the main concern of digital logic design. It consumes less power by recovering bit loss from its unique input–output mapping. In this paper, we propose a reversible control unit, which is first ever proposed in literature. Two new 4 × 4 reversible gates, namely HL gate and BJ gate, are proposed to design reversible decoder and J-K flip-flop. An algorithm has been shown to design a reversible control unit. On the way to design the control unit, we propose reversible decoder, sequence counter, instruction register and control logic gates. These circuits are analyzed with the existing ones. The comparative results show that the proposed design outperforms the existing designs in terms of numbers of gates, garbage outputs, delay and quantum cost. In addition, some lower bounds on the numbers of gates and garbage outputs of the proposed control unit have also been presented.
2013 IEEE International Symposium on Circuits and Systems (ISCAS2013), 2013
ABSTRACT In this paper, we propose a reversible n-bit divider, where n is the number of bits of t... more ABSTRACT In this paper, we propose a reversible n-bit divider, where n is the number of bits of the operands of dividend. Two approaches for constructing a compact reversible divider have been presented here. The first approach uses conventional division array and the second approach uses high speed division array. Both of the approaches can handle floating point numbers. Several theorems on the numbers of gates, garbage outputs and quantum cost of the reversible n-bit divider have been shown. The comparative study shows that the proposed designs can work with fractional numbers where as existing designs can not. Proposed designs are also much better than the existing approaches considering all the efficiency parameters of reversible logic design which includes numbers of gates used, quantum cost and garbage outputs.
Lecture Notes in Computer Science, 2012
Conventional logic dissipates more power by losing bits of information whereas reversibility reco... more Conventional logic dissipates more power by losing bits of information whereas reversibility recovers bit loss from the unique input-output mapping. Reversible Computation has high promise oflow power consumption. In this paper, we have proposed a new 4x4 reversible gate (namely BJ gate) which is used to design reversible J-K flip-flop. We have also proposed the design of low power reversible decoders, reversible sequence counter and reversible instruction register. These circuits are analyzed with the existing ones. The comparative results show that the proposed designs of reversible decoders and sequential circuits outperform the existing designs in terms of numbers of gates, garbage outputs and quantum cost. Some lower bounds on the number of gates and garbage outputs of the proposed decoder circuits have also been proposed.
Universities Role in Artificial Intelligence Innovation Ecosystems by 2060 in Asia and Europe, 2024
In 2024, the landscape of higher education is undergoing significant transformations driven by in... more In 2024, the landscape of higher education is undergoing significant transformations driven by increased collaborations among universities and businesses. This paper explores the evolving dynamics within the academic sector, focusing on the establishment of university networks and industry-academia ecosystems. Prominent examples include the Unite! network in Europe and the Asian University Alliance (AUA) in Asia, which facilitate specialization and knowledge sharing among member institutions. Additionally, initiatives like InnoEnergy in Europe and SGInnovate in Asia exemplify the creation of ecosystems that integrate sector-specific companies, startups, and universities to address industry challenges and ensure the sustainability of academic institutions.
The paper delves into the financial pressures faced by universities, prompting them to seek innovative solutions for survival and growth. By forming networks and ecosystems, universities can leverage collective expertise and resources, enhancing their ability to provide high-quality education and research. The role of these collaborations in fostering innovation, improving operational efficiency, and addressing societal challenges is critically examined.
Furthermore, the paper discusses the implications of these developments for the future of higher education. It highlights the potential for increased interdisciplinary research, enhanced student mobility, and the creation of more flexible and adaptive educational models. The integration of digital technologies and artificial intelligence in these networks is also explored, emphasizing their role in facilitating communication, collaboration, and data-driven decision-making.
In conclusion, the paper argues that the future of universities lies in their ability to adapt to changing environments through strategic collaborations and the adoption of innovative practices. By embracing these changes, universities can continue to play a pivotal role in shaping the knowledge economy and addressing global challenges.