Ajit Dingankar | The University of Texas at Austin (original) (raw)
Papers by Ajit Dingankar
... anticipated. My wife, Manjusha, patiently waited through my changes of departments, topics, e... more ... anticipated. My wife, Manjusha, patiently waited through my changes of departments, topics, employers and moods all these years. During ... derived. Then weak su cient conditions for perfect classi cation of signals are studied. Next ...
Circuits Systems and Signal Processing, 1996
In a recent paper a method is described for constructing certain approximations to a general elem... more In a recent paper a method is described for constructing certain approximations to a general element in the closure of the convex hull of a subset of an inner product space. This is of interest in connection with neural networks. Here we give an algorithm that generates simpler approximants with somewhat less computational cost.
Functional validation of System Level Models, such as those modeled with SystemC, is an important... more Functional validation of System Level Models, such as those modeled with SystemC, is an important and complex problem. One of the problems in their functional validation is the test case generation with good coverage and higher potential to find faults in the design. We propose a coverage-directed test generation framework for system level design validation by combining the synchronous language ESTEREL, and its advanced verification capability, with C++ based system level language SystemC. The main contributions of this paper are (i) the integrated framework for model-driven development and validation of system-level designs with a combination of ESTEREL, and SystemC; and (ii) the test generation framework for generating test suites to satisfy traditional coverage metrics such as the statement and branch as well as a complex metric such as modified condition/decision coverage (MCDC) employed in the validation of safety-critical software systems. The framework also generates tests that attain functional coverage using properties specified in a temporal language and assertion-based verification (namely PSL). We demonstrate the methodology with a case study by developing and validating a critical power state machine component that is used for power management in embedded systems.
IEEE Transactions on Very Large Scale Integration Systems, 2008
With increasing levels of integration of multiple processing cores and new features to support so... more With increasing levels of integration of multiple processing cores and new features to support software functionality, recent generations of microprocessors face difficult validation challenges. The systematic validation approach starts with defining the correct behaviors of the hardware and software components and their interactions. This requires a new modeling paradigm that supports multiple levels of abstraction. Mutual consistency of models at adjacent levels is crucial for manual refinement of models from the full chip level to production RTL, which is likely to remain the dominant design methodology of complex microprocessors in the near future. In this work, we present MMV, a validation environment based on metamodeling, that can be used to create models at various abstraction levels and to generate most of the important validation collaterals, viz., simulators, checkers, coverage and test generation tools. We illustrate the functionalities in MMV by modeling a 32 bit RISC processor at the system, instruction set architecture and microarchitecture levels. We show by examples how consistency across levels is enforced during modeling and also how to generate constraints for automatic test generation.
IEEE Transactions on Automatic Control, 1999
... N. Simon, H. Corporaal, and E. Kerckhoffs, Variations on the cascade-correlation learning ar... more ... N. Simon, H. Corporaal, and E. Kerckhoffs, Variations on the cascade-correlation learning architecture for fast convergence in robot control, in Proc. Neuro-Nimes, Nov. 1992. [17] J. Sjoberg, Q. Zhang, L. Ljung, A. Benveniste, B. Deylon, P.-Y. Glorennec, H. Hjalmarsson, and A ...
... anticipated. My wife, Manjusha, patiently waited through my changes of departments, topics, e... more ... anticipated. My wife, Manjusha, patiently waited through my changes of departments, topics, employers and moods all these years. During ... derived. Then weak su cient conditions for perfect classi cation of signals are studied. Next ...
Circuits Systems and Signal Processing, 1996
In a recent paper a method is described for constructing certain approximations to a general elem... more In a recent paper a method is described for constructing certain approximations to a general element in the closure of the convex hull of a subset of an inner product space. This is of interest in connection with neural networks. Here we give an algorithm that generates simpler approximants with somewhat less computational cost.
Functional validation of System Level Models, such as those modeled with SystemC, is an important... more Functional validation of System Level Models, such as those modeled with SystemC, is an important and complex problem. One of the problems in their functional validation is the test case generation with good coverage and higher potential to find faults in the design. We propose a coverage-directed test generation framework for system level design validation by combining the synchronous language ESTEREL, and its advanced verification capability, with C++ based system level language SystemC. The main contributions of this paper are (i) the integrated framework for model-driven development and validation of system-level designs with a combination of ESTEREL, and SystemC; and (ii) the test generation framework for generating test suites to satisfy traditional coverage metrics such as the statement and branch as well as a complex metric such as modified condition/decision coverage (MCDC) employed in the validation of safety-critical software systems. The framework also generates tests that attain functional coverage using properties specified in a temporal language and assertion-based verification (namely PSL). We demonstrate the methodology with a case study by developing and validating a critical power state machine component that is used for power management in embedded systems.
IEEE Transactions on Very Large Scale Integration Systems, 2008
With increasing levels of integration of multiple processing cores and new features to support so... more With increasing levels of integration of multiple processing cores and new features to support software functionality, recent generations of microprocessors face difficult validation challenges. The systematic validation approach starts with defining the correct behaviors of the hardware and software components and their interactions. This requires a new modeling paradigm that supports multiple levels of abstraction. Mutual consistency of models at adjacent levels is crucial for manual refinement of models from the full chip level to production RTL, which is likely to remain the dominant design methodology of complex microprocessors in the near future. In this work, we present MMV, a validation environment based on metamodeling, that can be used to create models at various abstraction levels and to generate most of the important validation collaterals, viz., simulators, checkers, coverage and test generation tools. We illustrate the functionalities in MMV by modeling a 32 bit RISC processor at the system, instruction set architecture and microarchitecture levels. We show by examples how consistency across levels is enforced during modeling and also how to generate constraints for automatic test generation.
IEEE Transactions on Automatic Control, 1999
... N. Simon, H. Corporaal, and E. Kerckhoffs, Variations on the cascade-correlation learning ar... more ... N. Simon, H. Corporaal, and E. Kerckhoffs, Variations on the cascade-correlation learning architecture for fast convergence in robot control, in Proc. Neuro-Nimes, Nov. 1992. [17] J. Sjoberg, Q. Zhang, L. Ljung, A. Benveniste, B. Deylon, P.-Y. Glorennec, H. Hjalmarsson, and A ...