Cs/OS3 Release Notes - Weston Embedded Solutions (original) (raw)

Version 3.09.05

Release Date

April 22, 2025

Changelog

Feature: Added OS_TRACE_START_OPT() macro which allows option passing when starting the Trace recorder.

ARMv7-A/R: GNU Port now supports the ARM Clang toolchain.

Bugfix: Data Queue symbols compiled out in certain cases.

Version 3.09.04

Release Date

December 19, 2024

Changelog

Feature: Official Support for Percepio Tracealyzer

Feature: Added null pointer check for OSMemCreate().

Feature: Added a new function, OSMemQuery(), which returns details about a memory partition.

Feature: Optional range and alignment checking when calling OSMemPut().

Bugfix: Fixed build error that occurred when debug variables and objected-created checks were both disabled.

Version 3.09.03

Release Date

August 8, 2024

Changelog

Feature: Added a new function, OSTaskGetCur(), which returns a reference to the current task.

Bugfix: OSxxxCreateExt functions returned without reenabling interrupts if given an invalid option.

Bugfix: ARMv7-A: Fix for Erratum 775420.

Feature: Added a new Blackfin port for CrossCore Embedded Studio.

CVE-2024-45268
Bugfix: Fixed null pointer dereference when OS_CFG_CALLED_FROM_TMR_CHK_EN is enabled and a timer invokes the timers API.

Version 3.09.02

Release Date

June 23, 2023

Changelog

Bugfix: Fixed mutex corruption owner corruption with deleting a task.

Updated version checks to reflect initial Cesium Releases.

Bugfix: Fixed pendlist corruption issue when deleting tasks with TLS enabled.

RISC-V: Added IAR port for the RV32 architecture.

ARMv8-M: Added option to disable non kernel-aware ISR support by setting the IPL Boundary to 0.

Reworked the Periodic Delay feature to provide proper wallclock functionality.

Bugfix: Fixed build errors in os_data.c when building in a C++ environment.

Version 3.09.01

Release Date

December 21, 2022

Changelog

Added TLS Port for IAR EWARMv8 and above.

Added FIFO-Order pending feature to Semaphores, Mutexes, Queues, and Data Queues. Extended create APIs have been added for the application to specify Priority-order or FIFO-order pending.

ARMv7-M: Added option to disable non kernel-aware ISR support by setting the IPL Boundary to 0.

Bugfix: Pendlist corruption occurred when Tasks pending on a Data Queue were deleted or had their priority changed.

Version 3.09.00

Release Date

June 27, 2022

Changelog

Added OS_DATA API: A Thread-Safe method for copying data between tasks.

Added support for ARM and GNU toolchains to the ARMv8-M port.

New option: OS_CFG_CALLED_FROM_TMR_CHK_EN - Prevent pends from OS_TMRs by returning an error.

Added missing checks for OS_CFG_TS_EN to OSFlagPend().

Added missing Debug Variables for compile-time options to os_dbg.c.

Fixed ARMv7m and ARMv6-M GNU ports having a hard fault due to a missing .thumb_func before PendSV_Handler.

Version 3.08.03

Release Date

October 22, 2021

Changelog

Added ARM-Cortex-M/ARMv8-M port for EWARM.

Fixed bug in OS_FlagTaskRdy which fails to remove TCB from the tick list if task state is OS_TASK_STATE_PEND_TIMEOUT_SUSPENDED.

Fixed bug in OS_TaskChangePrio which incorrectly lowers the priority of a high-priority task which is holding a mutex if a low-priority task blocking on the same mutex has its priority lowered.

Version 3.08.02

Release Date

March 19, 2021

Changelog

Added Dynamic Tick BSP template: bsp_os_dt.c.

Simplified Periodic Delays. The behavior more closely follows that of V3.03.01.

Version 3.08.01

Release Date

September 29, 2020

Changelog

Rework of the Timer Task to simplify the locking mechanism

Improvement to the ARMv7-M port: only save FPU registers if the task uses them

OSTmrCreate() now returns OS_ERR_OBJ_CREATED before modifying any fields in the Tmr object

New option to enable OS_ERR_OBJ_CREATED independently of the debug variables

Version 3.08.00

Release Date

July 23, 2020

Changelog

Initial release forked from uC/OS-III V3.08.00

Option to disable Idle Task deprecated

Improvement to the ARMv7-M port: Added CMSIS-compliant names for the PendSV and Systick handlers

Fix to the ARMv7-M port: Interrupts are disabled before modifying BASEPRI as per Cortex-M7 errata