A New Proposal for OFCC-based Instrumentation Amplifier (original) (raw)
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2020
This paper presents a fully integrated CMOS Operational Floating Current Conveyor (OFCC) circuit. The proposed circuit is designed for instrumentation amplifier circuits. The CMOS OFCC circuit is designed and simulated using Cadence in TSMC 90 m technology kit. The circuit aims at two different design goals. The first goal is to design a low power consumption circuit (LBW design) while the second is to design a high bandwidth circuit (HBW design). The total power consumption of the LBW design is 1.26 mW with 30 MHz bandwidth while the power consumption of the HBW design is 3 mW with 104.6 MHz bandwidth.
A 0.4V Miniature CMOS Current Mode Instrumentation Amplifier
IEEE Transactions on Circuits and Systems II: Express Briefs, 2017
This paper presents a new low power miniature instrumentation amplifier based on the Operational Floating Current Conveyor (OFCC). The OFCC is a general-purpose current mode device capable of realizing all functions as an operational amplifier. The proposed OFCC is designed and implemented in both TSMC low power 90 nm and UMC high speed 130 nm CMOS technology for the use in low voltage applications. A single supply of 0.4 V is used to reduce the power consumption. The design utilizes the energy efficient subthreshold region. Self-cascode technique is used to enhance the tracking capability of the OFCC. Post layout simulation and Monte Carlo analysis show promising results. The current mode instrumentation amplifier in 90 nm occupies 0.023 mm 2 while consuming 11 µW with 14 kHz gain-independent bandwidth and common mode rejection ratio (CMRR) of 76 dB. The 130 nm design exhibits input referred noise of 1.1 µVRMS for a bandwidth of 0.07-150 Hz while consuming 14 µW and CMRR of 65 dB with 100 kHz bandwidth with chip area 0.021 mm 2 .
International Journal of Electrical and Electronic Engineering & Telecommunications
This paper describes a new CMOS realization of differential difference current conveyor circuit (DDCC). The proposed design offers enhanced characteristics compared to DDCC circuits previously exhibited in the literature. It is characterized by a wide dynamic range with good accuracy through the use of adaptive biasing circuit instead of a constant bias current source as well as a wide bandwidth (560 MHz) and a low parasitic resistance at terminal X about 6.86 Ω. A voltage mode instrumentation amplifier circuit (VMIA) composed of a DDCC circuit and two active grounded resistances is shown as application. The proposed VMIA circuit is intended for high frequency applications. This configuration offers significant improvement in accuracy as compared to the state of the art. It is characterized by a controllable gain, a large dynamic range with Total Harmonic Distortion (THD) less than 0.27 %, a low noise density (22 nV/Hz 1/2) with a power consumption about 0.492 mW and a wide bandwidth nearly 83 MHz. All proposed circuits are simulated by TSPICE using CMOS 0.18 µm TSMC technology with ± 0.8 V supply voltage to verify the theoretical results.
Realization of OFCC based Transimpedance Mode Instrumentation Amplifier
Advances in Electrical and Electronic Engineering, 2016
The paper presents an instrumentation amplifier suitable for amplifying the current source transducer signals. It provides a voltage output. It has a high gain, common mode rejection ratio and gain independent bandwidth. It uses three Operational Floating Current Conveyors (OFCCs) and four resistors. The effect of nonidealities of OFCC on performance of proposed Transimpedance Instrumentation Amplifier (TIA) is also analyzed. The proposal has been verified through SPICE simulations using CMOS based schematicThe paper presents an instrumentation amplifier suitable for amplifying the current source transducer signals. It provides a voltage output. It has a high gain, common mode rejection ratio and gain independent bandwidth. It uses three operational floating current conveyors (OFCCs) and four resistors. The effect of nonidealities of OFCC on performance of proposed Transimpedance Instrumentation Amplifier (TIA) is also analyzed. The proposal has been verified through SPICE simulations using CMOS based schematic.
Programmable gain amplifier using operational floating current conveyors
AEU - International Journal of Electronics and Communications, 2018
This paper presents new operational floating current conveyor (OFCC) based Programmable Gain Amplifier (PGA). It operates in trans-impedance mode i.e. it receives current signal as input and provides voltage as output. It uses four blocksa current amplifier, digitally controlled trans-impedance amplifier, digitally controlled R-2R ladder network and a voltage buffer. First block amplifies input signal. Second and third blocks of proposed PGA provide control over coarse and fine gain through bits (B 5-B 0) and a total of 60 different gain values are possible through the arrangement. The last block provides output at low impedance thereby avoiding need of impedance matching circuit. The operation of the proposal has been verified through SPICE simulations using 0.5 µm technology model parameters from MOSIS (AGILENT). The simulated variable gain range is found to be 56.76 dBΩ to 95.84 dBΩ. The total power dissipation is 3.13 mW under maximum gain settings. The equivalent input referred noise is found to be 6.9 pA/√Hz. Experimental verification of proposed PGA is also done by bread boarding the entire circuit. The measured results are found to be in close agreement with the theoretical and simulated values.
SN Applied Sciences
This study presents a high common-mode rejection ratio (CMRR), and high power-supply rejection ratio (PSRR) current-mode instrumentation amplifier (CMIA) to overcome the limitations of existing differential voltage second-generation current conveyors (DVCCII)-based CMIAs in achieving high CMRR. The design is based on a fully differential second-generation current conveyor block with a novel circuit design following by a current subtracting stage. The CMIA is designed and laid out in 130 nm CMOS technology operating under ± 1.2 V supply voltage in Cadence software. The post-layout simulation results show that the CMIA achieves low-frequency voltage and current CMRR- BW of 228.8 dB–10 kHz and 246 dB–10.6 kHz, respectively, with PSRR + /PSRR- of 108.2 dB/99.7 dB, power consumption of 507 µW, and a core area of 0.0015 mm2. The unique quality of the circuit is that, it does not need well-matched active blocks, but inherently improves CMRR, bandwidth, and PSRR; hence it gains an excellent...
A Novel Resistor-Free Electronically Adjustable Current-Mode Instrumentation Amplifier
Circuits, Systems, and Signal Processing, 2013
In this paper, a novel topology for implementing resistor-free current-mode instrumentation amplifier (CMIA) is presented. Unlike the other previously reported instrumentation amplifiers (IAs), in which input and/or output signals are in voltage domain, the input and output signals in the proposed structure are current signals and signal processing is also completely done in current domain benefiting from the full advantages of current-mode signal processing. Interestingly the CMRR of the proposed topology is wholly determined by only five transistors. Compared to the most of the previously reported IAs in which at least two active elements are used to attain high common-mode rejection ratio (CMRR) resulting in a complicated circuit, the proposed structure enjoys from an extremely simple circuit. It also exhibits low input impedance employing negative feedback principal. Of more interest is that, using simple degenerate current mirrors, the differential-mode gain of the proposed CMIA can be electronically varied by control voltage. This property makes it completely free of resistors. The very low number of transistors used in the structure of the proposed CMIA grants it such desirable properties as low-voltage low-power operation, suitability for integration, wide bandwidth etc. SPICE simulation results using the TSMC 0.18-µm CMOS process model under supply voltage of ±0.8 V show a high CMRR of 91 dB and a low input impedance of 291.5 for the proposed CMIA. Temperature simulation results are also provided, which prove low temperature sensitivity of the proposed CMIA.
2015 IEEE International Conference on Electronics, Circuits, and Systems (ICECS), 2015
In this work, a current-mode high CMRR and low offset instrumentation amplifier is proposed. In the structure, only differential difference current conveyors (DDCC) are employed. The offset of the instrumentation amplifier is suppressed using an integrator feedback stage. The CMRR of the system is simulated using mismatch models for the DDCC elements employed. The CMRR of the instrumentation amplifier is independent of resistor mismatches, and, high CMRR is achieved if good matching of the differential transistors of each current conveyor is provided. The proposed instrumentation amplifier is designed using 0.35µm technology and simulated using HSPICE. The designed instrumentation amplifier provides high CMRR with low offset and it is especially suitable for AC coupled measurements. The simplicity of the design structure is the main advantage of the provided design where only DDCC elements are required for high CMRR and high output swing.
Single-Input Four-Output Current Mode Filter Using Operational Floating Current Conveyor
Active and Passive Electronic Components, 2013
This paper presents operational floating current conveyor (OFCC) based single input four output current mode filter. It employs only three OFCCs and two grounded capacitors and resistors each. The MOS based grounded resistors implementation is used, which adds feature of electronic tunability to the filter parameters. The filter also enjoys low component spread and low sensitivity performance. The effect of finite transimpedance and parasites of OFCC on the proposed circuit is also analyzed. The functionality of the proposed circuit is demonstrated through SPICE simulations using 0.5 µm CMOS process model provided by MOSIS (AGILENT).