LCNT incorporated domino with footed diode inverter (original) (raw)
2021 8th International Conference on Signal Processing and Integrated Networks (SPIN), 2021
Abstract
This contribution proposes a technique for leakage power reduction in footed domino circuits by incorporating Leakage Control NMOS Transistor (LCNT) technique along with a footed diode inverter. The analysis is done using footed domino gates for two, four and eight input OR gates to investigate the proposed techniques at 90nm, 45nm and 32nm technology nodes in both precharge and evaluation phase using SymicaDE tool. Analysis of leakage power reveals that its value increases with technology scaling. The total leakage power saving is (23.7%-71.8%) in precharge phase and (22.6%-77.1%) in evaluation phase using the proposed approach. The efficiency of the proposed approach increases with scaling of technology i.e., the leakage power saving achieved by the proposed approach improves at lower technology node.
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