Two Memristors Memory Cell Using Crossbar Array Structure With CMOS Control Circuitry (original) (raw)

Abstract

Nonvolatile resistive memories are the most suitable choice for low power/high speed portable applications. Crossbar array structure is considered to be the best architecture for high integration electronic structures. It supports very large memory size. Therefore this paper proposed a new nonvolatile memory architecture using crossbar array structure based on memristor devices with CMOS control circuitry. This structure support high speed read/write operations within high packing density and low power dissipation. The proposed approach uses only two memristors as a memory cell. Unified CMOS controlling circuitry are used to give the ability to program a complete row in the same time whenever the other rows are completely deactivated. As a consequence, this approach provides static power dissipation prevention with high retention value.

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