A highly compact SiGe HBT differential LNA for 3.1–10.6 GHz ultra-wideband applications (original) (raw)
Related papers
A highly compact SiGe HBT differential LNA for 3.110.6 GHz ultra-wideband applications
… (ICUWB), 2010 IEEE …, 2010
A fully differential low noise amplifier (LNA) using SiGe HBT technology for ultra-wide band applications is presented. Measured results show the maximum power gain of 19.9 dB with a variation of 1.8 dB within the entire band, the noise figure is between 2.1 dB and 2.9 dB in the FCC-allocated UWB band from 3.1-10.6 GHz. The input 1-dB compression point is -17.5 dBm measured at 7 GHz. All measured results show excellent agreement with the simulated ones. The total current consumption is 22 mA from a 3.5 V supply. The inductor-less design occupies a chip size of only 0.14 mm 2 including bond pads.
A low supply voltage SiGe LNA for ultra-wideband frontends
IEEE Microwave and Wireless Components Letters, 2000
A low-power low-noise amplifier (LNA) for ultrawideband (UWB) radio systems is presented. The microwave monolithic integrated circuit (MMIC) has been fabricated using a commercial 0.25-m silicon-germanium (SiGe) bipolar CMOS (BiCMOS) technology. The amplifier uses peaking and feedback techniques to optimize its gain, bandwidth and impedance matching. It operates from 3.4 to 6.9 GHz, which corresponds with the low end of the available UWB radio spectrum. The LNA has a peak gain of 10 dB and a noise figure less than 5 dB over the entire bandwidth. The circuit consumes only 3.5 mW using a 1-V supply voltage. A figure of merit (FoM) for LNAs considering bandwidth, gain, noise, power consumption, and technology is proposed. The realized LNA circuit is compared with other recently published low-power LNA designs and shows the highest reported FoM.
A Narrow-band 8.7 GHz SiGe HBT LNA with a Passive Frequency Selective Feedback
Frequenz, 2012
This paper presents a low noise amplifier (LNA) with differential output using a passive frequency selective feedback. The introduced feedback stabilizes the amplifier at lower frequencies and improves the gain in the desired frequency band. The LNA consists of two stages. Additionally, a buffer at the output is added for measurements. The amplifier was implemented in a 0.35 μm SiGe technology. For measurements the LNA was bonded to a substrate. A peak gain of 28.1 dB and a minimum noise figure of 2.2 dB at a supply voltage of 3 V were achieved.
18.2 GHz Differential Low Noise Amplifier for on chip UWB Transceiver
In this paper an 18.2 GHz differential low noise amplifier (LNA) is proposed for use in on chip ultra wide band transceiver. We used TSMC 0.35 m process MOSFET model parameters and the simulations are carried out using Cadence Spectre simulator. The single stage differential LNA shows 22.06 dB voltage gain at 18.2 GHz with a operating frequency band of 7.87 GHz. It achieves 0.4162 dB noise figure, S 11 = 16.701 dB, S 12 = 6.46916 dB, S 21 = 3.61662 dB, S 22 = 7.7075 dB. Its 1 dB compression point is 14.599 dBm and input referred IP 3 is 10.9778 dBm. The circuit operates at +1 V and 1 V supply voltage and consumes 0.50 mW power.
Microelectronics Journal, 2013
In this paper, a low power ultra-wideband (UWB) CMOS LNA was designed exploiting source inductive degeneration technique operating in the frequency range of 3.1-10.6 GHz. In order to achieve low noise figure and high linearity simultaneously, a modified three-stage UWB LNA with inter-stage inductors was proposed. Forward Body-Biased (FBB) technique was used to reduce threshold voltage and power consumption at the first and third stages. The second stage is a push-pull topology exploiting the complementary characteristics of NMOS and PMOS transistors to enhance the linearity performance. The proposed LNA was simulated in standard 0.13 mm CMOS process. A gain of 19.5 7 1.5 dB within the entire band was exhibited. The simulated noise figure (NF) was 1-3.9 dB within the bandwidth. A maximum simulated third-order input intercept point (IIP3) of 4.56 dBm while consuming 4.1 mW from a 0.6 power supply was achieved. The simulated input return loss (S 11) was less than À 5 dB from 4.9 to 12.1 GHz. The output return loss (S 22) was below À 10.6 dB and S 12 was better than À 70.6 dB.
Design and analysis of a 3.1–10.6 GHz Ultra-Wideband Low Noise Amplifier in 0.13μm CMOS
Iranian Scientific Society of Engineering Electromagnetics, 2015
In this paper, a new low complexity ultra-wideband (UWB) 3-10.6 GHz low noise amplifier (LNA) is designed which is consisted of three stages. To overcome the input stage constraints such as broadband impedance matching and high gain while keeping low-power consumption, the combination of the current reuse and reactive feedback technique are applied as the first stage. The second and third stages are common source amplifier with an inductive peaking technique to achieve high flat gain and wide-3 dB bandwidth simultaneously. Analytical formulae are derived for describing the input impedance, gain, and noise figure. The LNA is designed in the standard 0.13 µm CMOS technology which provides 17 dB power gain while consuming 15 mW from a 1-V voltage supply. The average noise figure is 5.5 dB and the simulated input-referred IP3 (IIP3) is-7.7 dBm. The input return loss (S 11) and output return loss (S 22) are less than-10 dB and-25 dB, respectively. The reverse isolation (S 12) is better than-54.52 dB.
A 3-14 GHZ Low Noise Amplifier for Ultra Wide Band Applications
International Journal of VLSI Design & Communication Systems, 2012
This paper presents an ultra wide band (UWB) low noise amplifier (LNA) with very high gain, better input matching, low noise figure, better linearity and low power consumption. A dual source degenerated resistive current reuse is used as an input stage and a cascode stage with shunt-series peaking is used to enhance the bandwidth and reverse isolation. The proposed LNA achieves a peak power gain of 20.92 dB at 9 GHz while achieving a gain greater than 20.3 dB over 3-14 GHz bandwidth. The achieved noise figure is in the range of 3.72-4.78 dB, while the input matching and the output matching are kept below-9 dB and-10 dB respectively. The reverse isolation is below-52 dB throughout the entire band. This LNA ensures better linearity with an IIP3 of 4 dBm at 9 GHz with very low power consumption of 5.876 mW at 1 V supply.
IEEE Journal of Solid-State Circuits
This article presents a single-stage single-ended (SE) and a multistage pseudo-differential cascode low-noise amplifiers (D-LNA) with their center frequencies at 235 and 290 GHz, respectively. Both low-noise amplifiers (LNAs) are designed beyond half of the maximum frequency of oscillation (f max) in 130-nm SiGe BiCMOS technology with f t / f max of 300/450 GHz. Implications of gain-boosting and noise reduction techniques in cascode structure are analyzed and it is observed that beyond f max /2, these techniques do not provide desired benefits. The single-stage SE LNA is designed to ascertain the theoretical analysis, and the same analysis is further implemented in staggered tuned four-stage LNA. Single-stage SE LNA provides a small signal gain of 7.8 dB at 235 GHz with 50 GHz of 3-dB bandwidth by consuming 18 mW of power. Four-stage differential LNA gives 12.9 dB of gain at center frequency 290 GHz and 11.2 dB at 300 GHz by drawing 68 mA current from the 2-V supply. The 3-dB bandwidth of differential LNA is measured to be 23 GHz. Noise figure measurements of both LNAs are performed using a gain-method technique with their measured noise figure values of 11 and 16 dB, respectively. This work successfully demonstrates the possibility of using a Si-based process to implement amplifiers beyond f max /2. To the authors' best knowledge, the four-stage differential LNA achieves, without any gain-boosting technique, the highest gain at 2/3(f max) with decent noise figure performance in SiGe technology. Index Terms-High current model (HICUM), low-noise amplifiers (LNAs), maximum frequency of oscillation (f max), receivers, SiGe BiCMOS integrated circuits, sub-THz and THz integrated circuits, vertical bipolar intercompany model (VBIC).