CMOS Technology (original) (raw)

Using Nano-electronic technologies are rapidly spread in terms of its small size compared with CMOS. However, defect densities in such process are higher than other technologies. A variety of electron devices that may be scaled down to few nanometers have now been demonstrated, including field-effect transistors, quantum interference devices, such as resonant tunneling diodes, single-electron devices, and phase-change devices. Some of these devices have been implemented using molecules, whose synthesis and self-assembly is the preferred method of the bottom-up fabrication. In this paper, a greedy mapping algorithm is presented for the purpose of defect the tolerance in Nano-electronic systems. As expected results of such implementation, both time complexity and the amount of free defect subsets should be enhanced compared with old results.