Ferroelectric memory (original) (raw)
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Current status and challenges of ferroelectric memory devices
Microelectronic Engineering, 2005
We report on the state-of-the art memory devices on the basis of ferroelectric materials. The paper starts with a short survey on competitive non-volatile memory technologies and focuses then on ferroelectric memories. This includes the ferroelectric random access memory (FeRAM) and the ferroelectric field effect transistor (FeFET). Cell layouts, material aspects and CMOS compatibility as well as fabrication issues will be discussed.
Ferroelectric thin film technology for semiconductor memory
Semiconductor science and technology, 1995
Recent advances in ferroelectric thin film technology have generated significant interest for use as capacitor dielectrics in semiconductor memories [I-31. Ferroelectric non-volatile memories (NVRAMS) have several unique features which set them apart from floating-gate non-volatile memories, including high-speed write operation (intrinsic switching times below several nanoseconds [4]), high write endurance low as 1.5 V [SI). These characteristics make ferroelectric NVRAMS excellent candidates for the non-volatile memory in portable electronic products such as RF tags, smart cards and pagers. This paper describes the operation of a ferroelectric NVRAM cell and the scaling methodology, reviews the device physics and reliability mechanisms and summarizes the challenges posed by the integration of ferroelectric capacitors with CMOS technology. The high dielectric constant (&r-300-1000) of the same class of materials used for ferroelectric NVRAMS can be exploited for high-density DRAMS. Capacitors fabricated with these materials have been shown to meet the charge storage specifications of gigabit-scale DRAMS (equivalent SiO, thickness as low as 2.3 A [q) without the extremely severe geometries and exceedingly complex processes required with conventional trench and stacked SiO,/Si,N, or Ta,O, capacitor cell technologies. Recent progress in this area is summarized. read/write cycles [SI) and low operating voltages (as
A Ferroelectric and Charge Hybrid Nonvolatile Memory—Part I: Device Concept and Modeling
IEEE Transactions on Electron Devices, 2012
We present a new one-transistor hybrid nonvolatile memory based on the combination of two distinctive mechanisms, namely, remanent polarization in ferroelectrics and charge injection into floating nodes. The gate stack design and the memory operation of the hybrid device are aimed to offer mutually complementing benefits between the two mechanisms, thereby presenting superior performance over conventional ferroelectric (FE) FET and gate injection-based Flash memory. During program operation, a high negative bias at the gate orients the ferroelectric polarization to the applied field. In addition, electrons at the gate electrode also tunnel into the floating nodes located between the ferroelectric thin film and the thin top tunnel dielectric and increase the total memory window. High electric displacement in the ferroelectric enables field enhancement in the tunnel dielectric for faster program and erase operations. During retention, the injected electrons reduce the depolarization field in the ferroelectrics, and the remanent polarization reduces the electric field in the tunnel oxide, which helps in the longer retention of the programmed state by the two additive memory mechanisms. Part I evaluates the benefits of the hybrid gate stack through 1-D simulations incorporating the polarization-field (P-E) hysteresis in the ferroelectric layer. The simulations provide a guideline for optimal gate stack design of the proposed hybrid memory. The following Part II then discusses the fabrication and experimental validation.
Materials Science & Engineering R-reports, 2001
We present in this article a review of the status of thin film ferroelectric materials for nonvolatile memories. Key materials issues relevant to the integration of these materials on Si wafers are discussed. The effect of film microstructure and electrode defect chemistry on the ferroelectric properties relevant to a high density nonvolatile memory technology are discussed. The second part of this review focuses on approaches to integrate these capacitor structures on a filled poly-Si plug which is a critical requirement for a high density memory technology. Finally, the use of novel surface probes to study and understand broadband polarization dynamics in ferroelectric thin films is also presented. # 2001 Published by Elsevier Science B.V.
Roadmap of Ferroelectric Memories: From Discovery to 3D Integration
The versatility of hafnium oxide-based ferroelectric memories to function as a storage class memory, a synaptic device for neuromorphic implementation, and a device capable of high-density integration have made them attractive candidates for next-generation technology. Ferroelectric memories have been increasingly popular with the discovery of ferroelectricity in hafnium oxide at a shallow thickness and compatibility with complementary metal-oxide-semiconductor-compatible processes. The single transistor-based ferroelectric cell makes them ideal for non-volatile embedded memory solutions, bridging the gap between on-chip SRAM and external data storage (e.g. Flash). This paper begins with discovering ferroelectricity in Rochelle salt and discusses the neoteric progress up to successful integration with 3D memory.
Adoption of 2T2C ferroelectric memory cells for logic operation
2019 26th IEEE International Conference on Electronics, Circuits and Systems (ICECS), 2019
A 2T2C ferroelectric memory cell consisting of a select transistor, a read transistor and two ferroelectric capacitors that can be operated either in FeRAM mode or in memristive ferroelectric tunnel junction mode is proposed. The two memory devices can be programmed individually. By performing a combined readout operation, the two stored bits of the memory cells can be combined to perform in-memory logic operation. Moreover, additional input logic signals that are applied as external readout voltage pulses can be used to perform logic operation together with the stored logic states of the ferroelectric capacitors. Electrical characterization results of the logic-in-memory (LiM) functionality is presented.
IEEE Transactions on Electron Devices, 2001
A multilevel metal process-based highly reliable ferroelectric memory (FeRAM) has been developed. Highly reliable characteristics have been attained by two techniques. One is a newly developed ferroelectric material with mixed superlattice crystal of SrBi 2 (Ta ,Nb 1) 2 O 9 and Bi 2 (Ta ,Nb 1)O 6 , which provides an elevated remnant polarization while keeping a low coercive voltage. The other is a metal covering memory cell structure which makes the use of plasma silicon nitride (p-SiN) passivation possible without reduction of the ferroelectric thin film by a hydrogen plasma during p-SiN deposition, which results in no degradation of the characteristics of cell capacitors. The FeRAM cell capacitors with the above newly developed ferroelectric material and metal covering structure have been fabricated by using a 0.6double level metal process. The fabricated cell capacitors show highly reliable characteristics such as the ensured retention of data written at a low voltage of 2.4 V and humidity resistance for 10 y under a high temperature of 70 C, which is promising for commercialization of FeRAM and its embedded LSIs.