21 LEVEL STAIRCASE SINE WAVE INVERTER WITH REDUCED SWITCHES AND THD (original) (raw)

Quest International Multidisciplinary Research Journal SELECTIVE HARMONICS ELIMINATION PWM BASED MULTILEVEL INVERTER WITH REDUCED NUMBER OF SWITCHES

Numerous industrial applications have begun to require higher power apparatus in recent years. Some medium voltage motor drives and utility applications require medium voltage and MW power level. For a medium voltage grid, it is troublesome to connect one power semiconductor switch directly. The application of ac variable frequency speed regulations are widely popularized , high power and medium voltage inverter has recently become a research focus so far as known there are many problems in conventional two level inverter in the high power application. Multilevel inverter have been gained more attention for high power application in recent years which can operate at high switching frequencies while producing lower order harmonic components[1]-[6],A multilevel inverter not only achieves high power ratings, but also enables the use of renewable energy sources. Renewable energy sources such as photovoltaic, wind, and fuel cells can be easily interfaced to a multilevel inverter system for a high power application . There are several topologies such as neutral point clamped inverter, flying capacitor based multilevel, cascaded H-bridge multilevel inverter, hybrid H-bridge multilevel inverter and new hybrid H-bridge multilevel inverter [7]-[9]. This paper discusses the operation of different topologies for multilevel inverter which can produce multilevel; under this condition neutral point clamped multilevel inverter is presented, which has a simple structure and good performance .This topology effectively reduce the higher input dc voltage that each device must withstand. The main disadvantage still exists in this topology, which restricts the use of it to the high power range of operation [10]- . The first topology introduced is the series H-bridge design, from this several configurations have been obtained. This topology consists of series power conversion cells which form the cascaded H-bridge multilevel inverter and power levels may be scaled easily. An apparent disadvantage of this topology is the large number of isolated voltage required to supply each cell. By using H-bridge power conversion cells several topologies are developed and their advantages and disadvantages are discussed. The proposed topology for ABSTRACT In this paper, a study of multilevel inverter is presented and a new reduced switch count technique is introduced to construct a multilevel inverter topology which reduces the number of switches used in the system. In conventional H-bridge multilevel inverter to produce a seven level twelve number of switches are used. Due to involvement of high number of switches thereby the harmonics, switching losses, cost and the total harmonics distortion is increased. This proposed topology involves only eight number of switches. It dramatically reduces the switches for high number of levels that reduces the switching losses; cost and low order harmonics and thus effectively decreases total harmonics distortion.

A novel optimization harmonic elimination technique for cascaded multilevel inverter

Bulletin of Electrical Engineering and Informatics, 2019

The main goal of utilizing Selective Harmonic Elimination (SHE) techniques in Multilevel Inverters (MLI) is to produce a high-quality output voltage signal with a minimum Total Harmonic Distortion (THD). By calculating N switching angles, SHE technique can eliminate (N-1) low order odd harmonics of the output voltage waveform. To optimized and obtained these switching angles, N of nonlinear equations should be solved using a numerical method. Modulation index (m) and duty cycle play a big role in selective harmonic elimination technique to obtain a minimum harmonic distortion and desired fundamental component voltage. In this paper, a novel Optimization Harmonic Elimination Technique (OHET) based on SHE scheme is proposed to re-mitigate Total Harmonic Distortion. The performance of seven-level H-bridge cascade inverter is evaluated using PSIM and validated experimentally by developing a purposely built microcontroller-based printed circuit board. 1. INTRODUCTION The rapid development of power electronic devices, better be called renewable energy electronics, has effectively contributed to find more utilization of renewable energy applications in wind and solar energy. DC/AC inverter has become more interesting for interfacing between renewable sources and the grid in order to invert the energy from DC to AC form [1-4]. Recently, Multilevel Inverters (MLIs) have become more popular in photovoltaic (PV) applications. These topologies are mainly utilized in high and medium power practical applications because of their capacity to generate a high-quality output signal with decreased switch loss by power switches employed [5, 6]. However, multilevel inverters include a number of cells of power semiconductor devices which suffer from some challenging issues in more complex topologies [7]. By increasing the number of levels the quality of the output wave shape improves with minimizing THD and making the output closer to a sinusoidal signal [8]. The suitable topology for medium and high power application is Cascaded full bridge multilevel inverter. The control circuit of this kind of inverters is simpler than other topologies [9]. Also, it can be easily extended to higher levels to produce high power by adding more units of H-Bridge on the series connection. The main disadvantage of the cascade multilevel inverter is the large number of DC voltage sources wanted to feed all the H-bridge cells, and hence all these DC sources have to be isolated [10]. However, it can reduce the switching losses and eliminate the effect of harmonic spikes from the output waveform with higher efficiency [11]. The THD of the multilevel inverters output voltage must be a minimum value.

A Novel H Bridge-based Inverter with 21 Level Staircase Output

Grenze International Journal of Engineering and Technology, 2020

Multilevel inverter is an emerging technology in the field of power electronics without which there is no industrial growth. High power sinewave inverter with minimum distortion is required in numerous applications of the industry. This requirement is not attainable using a single switch and therefore multilevel inverter stretched its hands with its several advancements. In present days multilevel inverter takes its role with staircase output and reduced harmonics. The 21 level inverter is proposed here with reduced number switches and reduced harmonics. Since the number of switches are reduced the switching frequency is also getting reduced. The power quality of the proposed 21 level inverter is increased by using selective harmonic elimination technique (SHE). The staircase output is achieved with the simulation using MATLAB/ SIMULINK and the same staircase output is obtained with the implementation of hardware also.

Selective Harmonic Elimination with Reduced Switch Topology in Cascaded H-bridge Multilevel Inverter

ICSESD-2017, 2017

A generalized formulation of Selective Harmonic Elimination (SHE) PWM for Multilevel Inverter is recently formulated in literature which can eliminate a large number of lower order harmonics. Various methods for calculating the firing angles for SHE PWM are known and still research in this area is ongoing. This paper presents a MATLAB based approach for modeling and simulation method suitable for studying SHE methods using Newton Raphson Method with reduced switch topology to apply them in various applications. In this paper a cascaded 3-Phase, 7-Level, H-bridge Multilevel Inverter with reduced switches. The primary contribution of this paper is that the investigation of SHE with reduced switches for cascaded H bridge inverter. The proposed Model can generate stepped voltage waveform and can be programmed for a wide range of modulation indices.

NEW CASCADED H-BRIDGE MULTILEVEL INVERTER WITH IMPROVED EFFICIENCY

There are many limitations in extracting power from renewable energy resources. To minimize the power demand and scarcity we have to improve the power extracting methods. Multilevel inverter is used to extract power from solar cells. It synthesizes the desired ac output waveform from several dc sources. This paper focuses on improving the efficiency of the multilevel inverter and quality of output voltage waveform. Seven level reduced switches topology has been implemented with only seven switches. Fundamental Switching scheme and Selective Harmonics Elimination were implemented to reduce the Total Harmonics Distortion (THD) value. Selective Harmonics Elimination Stepped Waveform (SHESW) method is implemented to eliminate the lower order harmonics. Fundamental switching scheme is used to control the power electronics switches in the inverter. The proposed topology is suitable for any number of levels. The harmonic reduction is achieved by selecting appropriate switching angles. It shows hope to reduce initial cost and complexity hence it is apt for industrial applications. In this paper third and fifth level harmonics have been eliminated. Simulation work is done using the MATLAB software and experimental results have been presented to validate the theory.

A Fifteen Level Cascaded H-Bridge Multilevel Inverter with Reduced Number of Switches

Nowadays multilevel inverter (MLI) technologies becomes extremely main choice in the area of high power medium voltage energy control. Although multilevel inverter has a number of advantages it has drawbacks in the layer of higher levels because of using large number of semiconductor switches. This may leads to large size and price of the inverter is very high and also increase in losses. So in order to reduce this difficulties in the new multilevel inverter is proposed to reducing the switches. This paper presents the 15-level cascaded multilevel inverter. The proposed 15-level cascaded multilevel inverter is for reducing the total harmonic distortion which is shown in MATLAB/SIMULINK. The switching pattern of semiconductor switches is used to improve the performance of multilevel inverter. This scheme reduces the switching loss and also increases the efficiency. To authorize the developed technique simulations are carried out through MATLAB/SIMULINK.

A modified cascaded H-bridge multilevel inverter topology with reduced number of power electronic switching components

In this paper, modified multilevel inverter, via addition of an auxiliary bidirectional switch, based on Newton Raphson (NR) and Particle Swarm Optimization (PSO) techniques is presented. The NR and PSO techniques were employed for selective harmonics elimination (SHE) solution in a modified Cascaded H Bridge Multilevel inverter (CHB-MLI). The Selective Harmonic Elimination Pulse-Width Modulation (SHE-PWM) is a powerful technique for harmonic minimization in multilevel inverter. The NR and PSO techniques were used to determine the switching angles by solving the nonlinear equations of the output voltage waveform of the modified CHB-MLI in order to control the fundamental component and eliminate some low order harmonics. The proposed NR and PSO techniques are capable to minimize the Total Harmonic Distortion (THD) of the output voltage of the modified inverter within allowable limits. This paper aims to modeling and simulation by MATLAB of the modified topology of the CHB-MLI for a single-phase prototype for 13-levels. The inverter offers less THD and greater efficiency using PSO control algorithm compared with the NR algorithm. The performance of the proposed controllers based on NR and PSO techniques is verified through simulation.

Performance Analysis of H-bridge and T-Bridge Multilevel Inverters for Harmonics Reduction

International Journal of Power Electronics and Drive System (IJPEDS), 2018

This paper deals with the design of cascaded 11 level H- bridge inverter. It includes a comparison between the 11 level H-bridge and T-bridge multilevel inverter. The cascaded inverter of higher level is a very effective and practical solution for reduction of total harmonic distortion (THD).These cascaded multilevel inverter can be used for higher voltage applications with more stability. As the level is increased the output waveform becomes more sinusoidal in nature. The inverter is designed using multicarrier sinusoidal pulse width modulation technique for generating triggering pulses for the semiconductor switches used in the device. Through this paper it will be proved that a cascaded multilevel H-bridge topology has higher efficiency than a T-bridge inverter, as whichever source input voltage is provided since input is equal to the output voltage. In T-bridge inverter, the output obtained is half of the applied input, so efficiency is just half as compared to H-bridge. The output waveform is distorted and has higher THD. The simulation is performed using MATLAB /Simulink 2013 software.

Investigation Study of Three-Level Cascaded H-bridge Multilevel Inverter

This paper analyzed three-level Cascaded H-bridge Multilevel Inverter (CHMLI) utilizing two modulation techniques namely Sinusoidal Pulse Width Modulation (SPWM) and Space Vector Pulse Width Modulation (SVPWM). The performance and the output of CHMLI in terms of Total Harmonic Distotion (THD) % and circuits complexity were compared. The simulations models were constructed using MATLAB/SIMULINK. The results showed the CHMLI produced the lowest THD contents and utilized fewer components. Moreover, the SVPWM produced less THD than SPWM.

Implementation of Cascaded H-Bridge Multi Level Inverter

Multilevel inverter is a power electronic device that has become more popular in electric high power and medium voltage applications. Multilevel inverters have unique structure which makes it possible to reach high voltages with fewer harmonics content and lower Electromagnetic interference (EMI). The harmonic content of the output voltage waveform reduces as the number of output voltage increases. This paper proposed a three-phase cascaded multilevel inverter using less number of switches. The proposed system uses the topology of Asymmetrical cascade H-Bridge Multilevel inverter with separate not equal dc sources for the switching circuit. As the number of step level for voltage increases in the output voltage waveform has more steps, this produces a desired output waveform with low harmonic distortion. Application of cascaded multilevel inverter for high power equipments in industry has become popular because of its high-quality output waveform. The method has been designed as a twenty seven level three phase cascaded multilevel inverter and compares the Total harmonic distortion. The models discussed in this paper have been simulated on Matlab/Simulink software and the relevant Total harmonic distortion (THD) has been determined by Fast Fourier Transformation (FFT) analysis of the output waveform by the software.