Characterization and TCAD Simulation of 90nm Technology PMOS Transistor under Continuous Photoelectric Laser Stimulation for Failure Analysis Improvement (original) (raw)

Characterization and TCAD simulation of 90 nm technology transistors under continous photoelectric laser stimulation for failure analysis improvement

2012 19th IEEE International Symposium on the Physical and Failure Analysis of Integrated Circuits, 2012

This study responds to our need to optimize failure analysis methodologies based on laser/silicon interactions, using the functional response of an integrated circuit to local laser stimulation. Thus it is mandatory to understand the behavior of elementary devices under laser stimulation, in order to model and anticipate the behavior of more complex circuits. This paper characterizes and analyses effects induced by a static photoelectric laser on a 90 nm technology PMOS transistor. Comparisons between currents induced in short or long channel transistors for both ON and OFF states are made. Experimental measurements are correlated to Finite Elements Modeling Technology Computer Aided Design (TCAD) analyses. These physical simulations give a physical insight of carriers generation and charge transport phenomena in the devices.

Building the electrical model of the pulsed photoelectric laser stimulation of a PMOS transistor in 90nm technology

Proceedings of the 20th IEEE International Symposium on the Physical and Failure Analysis of Integrated Circuits (IPFA), 2013

This paper presents the electrical model of an NMOS transistor in 90nm technology under 1064nm Photoelectric Laser Stimulation. The model was built and tuned from measurements made on test structures and from the results of physical simulation using Finite Element Modeling (TCAD). The latter is a useful tool in order to understand and correlate the effects seen by measurement by given a physical insight of carrier generation and transport in devices. This electrical model enables to simulate the effect of a continuous laser wave on an NMOS transistor by taking into account the laser's parameters (i.e. spot size and power), spatial parameters (i.e. the spot location and the NMOS' geometry) and the NMOS' bias. It offers a significant gain of time for experiment processes and makes it possible to build 3D photocurrent cartographies generated by the laser on the NMOS, in order to predict its response independently of the laser beam location.

Building the electrical model of the Photoelectric Laser Stimulation of a PMOS transistor in 90nm technology

Microelectronics Reliability, 2012

This paper presents the electrical model of a PMOS transistor in 90nm technology under 1064nm Photoelectric Laser Stimulation. The model was built and tuned from measurements made on test structures. It permits to simulate the effect of a continuous wave laser on a PMOS transistor by taking into account the laser's parameters (i.e. spot size and location, or power) and the PMOS' geometry and bias. It offers a significant gain of time by comparison with experiments and makes possible to build 3D photocurrent cartographies generated by the laser on the PMOS.

Failure Analysis enhancement by evaluating the Photoelectric Laser Stimulation impact on mixed-mode ICs

Microelectronics Reliability, 2008

The mixed-mode ICs (Integrated Circuits), by involving multiple functions (digital, analog, RF, power) inside one device, are becoming more compact and useful. At the same time, their developments and Failure Analysis (FA) are more and more complex: test, diagnostic and defect localization steps are harder and longer in time. Each step needs to be improved as far as defect localization is concerned. Several techniques based on emission microscopy, electron beam, direct probing or laser stimulation have been developed and introduced to follow these ICs evolutions. The most recent evolution in the laser stimulation field has been the introduction of several dynamic laser stimulation techniques aimed to localize defects or weakness regions inside functional but failing ICs (environmental marginalities related to temperature, frequency, voltage, etc.). This paper deals with the use of dynamic photoelectric laser stimulation techniques applied on mixed-mode ICs where the major difficulty is due to their considerable intrinsic sensitivity. Indeed, the analog circuitry is more sensitive than the digital circuitry since a slight change in an electrical parameter can trigger a functionality failure. This property limits the defect localization because of the complex interpretation of the results, the laser stimulation mapping. We propose to help the failure analyst by coupling the dynamic laser stimulation mapping with the photoelectric impact simulations run on a previously analyzed structure. The goal is to predict and interpret the laser sensitivity mapping so to isolate the defective areas in the analog devices.

Electrical model of an NMOS body biased structure in triple-well technology under photoelectric laser stimulation

2015 IEEE International Reliability Physics Symposium, 2015

This study is driven by the need to optimize failure analysis methodologies based on laser/silicon interactions with an integrated circuit using a triple-well process. It is therefore mandatory to understand the behavior of elementary devices to laser illumination, in order to model and predict the behavior of more complex circuits. This paper presents measurements of the photoelectric currents induced by a pulsed-laser on an NMOS transistor in triple-well Psubstrate/DeepNwell/Pwell structure dedicated to low power body biasing techniques. This evaluation compares the triple-well structure to a classical Psubstrate-only structure of an NMOS transistor. It reveals the possible activation change of the bipolar transistors. Based on these experimental measurements, an electrical model is proposed that makes it possible to simulate the effects induced by photoelectric laser stimulation.

Electrical modeling of the photoelectric effect induced by a pulsed laser applied to an SRAM cell

Microelectronics Reliability, 2013

This abstract presents an electrical model of an SRAM cell exposed to a pulsed Photoelectrical Laser Stimulation (PLS), based on our past model of MOS transistor under laser illumination. The validity of our model is assessed by the very good correlation obtained between measurements and electrical simulation. These simulations are capable to explain some specific points. For example, in theory, a SRAM cell under PLS have four sensitive areas. But in measurements only three areas were revealed. A hypothesis was presented in this paper and confirm by electrical simulation. The specific topology of the cell masks one sensitive area. Therefore the electrical model could be used as a tool of characterization of a CMOS circuits under PLS.

Electrical model of an inverter body-biased structure in triple-well technology under pulsed photoelectric laser stimulation

Microelectronics Reliability, 2015

This study is driven by the need to optimize reliability and failure analysis methodologies based on laser/silicon interactions with an integrated circuit using a triple-well process. Nowadays, Single Event Effects (SEE) evaluations due to radiation impacts are critical in fault tolerance. The prediction of a SEE on electronic device is proposed by the determination and modeling of the phenomena under pulsed laser stimulation. This paper presents measurements of the photoelectric currents induced by a pulsed-laser on an inverter in triple-well Psubstrate/DeepNwell/Pwell structure dedicated to low power body biasing techniques. It reveals the possible activation change of the parasitic bipolar transistors. Based on these experimental measurements, an electrical model is proposed that makes it possible to simulate the effects induced by photoelectric laser stimulation. Therefore this electrical model could be used as a tool of characterization for more complex CMOS circuits under Photoelectrical Laser Stimulation.

Electrical model of an Inverter body biased structure in triple-well technology under photoelectric laser stimulation

Microelectronics Reliability

This study is driven by the need to optimize reliability and failure analysis methodologies based on laser/silicon interactions with an integrated circuit using a triple-well process. Nowadays, single event effect (SEE) evaluations due to radiation impacts are critical in fault tolerance and security field. The prediction of a SEE occurring on electronic devices is proposed by the determination and modeling of the phenomena under pulsed laser stimulation. This paper presents measurements of the photoelectric currents induced by a pulsed-laser on an inverter in a triple-well Psubstrate/DeepNwell/Pwell structure dedicated to low power body biasing techniques. It reveals the possible activation change of the parasitic bipolar transistors. Based on these experimental measurements, an electrical model is proposed that makes it possible to simulate the effects induced by photoelectric laser stimulation. Therefore this electrical model could be used as a tool for characterizing more complex CMOS circuits under photoelectrical laser stimulation.