Optimal Gate Commutated Thyristor Design for Bi-Mode Gate Commutated Thyristors Underpinning High, Temperature Independent, Current Controllability (original) (raw)
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This document is the author's post-print version, incorporating any revisions agreed during the peer-review process. Some differences between the published version and this version may remain and you are advised to consult the published version if you wish to cite from it.
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The model of interconnected numerical device segments can give a prediction on the dynamic performance of large area full wafer devices such as the GCTs and can be used as an optimization tool for designing GCTs. In this paper we evaluate the relative importance of the shallow p-base thickness, its peak concentration, the depth of the p-base and the buffer peak concentration.
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for a better worldTM The main purpose of a gate-driver for a phase control thyristor (PCT) or a bi-directionally controlled thyristor (BCT) is to provide a gate current of the right amplitude, at the right time and of the right duration. This would seem simple but the analysis of failed thyristors due to inadequate gate pulses leads to the conclusion that the proper design of a gate-drive unit is not trivial. This application note points out some of the most important gate-drive design rules. Application Note 5SYA 2034-02
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The planar Integrated Gate Commutated Thyristor (IGCT) concept is proposed to simplify the fabrication process of the device and improve the ruggedness as well as electrothermal performance of the device. The planar IGCT concept has been verified experimentally with 4.5kV devices fabricated on 4-inch Si wafers. Afterwards, the electrical characteristics of the planar IGCT were compared with that of the conventional (with trench or mesa gate) IGCT. Both the planar and the conventional IGCTs are fabricated with corrugated p-base referred to as High Power Technology (HPT) design. In addition, mixed-mode TCAD device simulations have been performed to verify the turn-off failure mechanism and to analyze the electro-thermal performance of the planar IGCT in reference to that of the conventional IGCT.
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In recent years, various dual MOS gated thyristor structures have been proposed to improve the three pronged trade-o of forward voltage drop, turn-o time and forward biased safe operating area when compared to single gate devices. The dual gate emitter switched thyristor (DG-EST), with its unique thyristor current partitioning mechanism, has been reported to posses superior characteristics when compared to conventional single gate ESTs. In this paper, a detailed study of the device physics of operation of the DG-EST is presented, supported by two dimensional numerical simulations. Eects of variations in the¯oating emitter length, lifetime in the drift region and temperature on the forward voltage drop are experimentally observed. An analytical model predicting the maximum controllable current density (J MCC) of the DG-EST is reported and con®rmed through experimental measurements. The DG-EST is found to have a superior trade-o curve of on-state voltage drop versus turn-o time when compared to the conventional emitter switched thyristor (C-EST).
Design aspects of MOS controlled thyristor elements
We have fabricated 2.5kV thyristor devices with integrated MOS controlled n+ emitter shorts and a bipolar turn·on gate using a p-channel MOS technology. Square-cell geometries with pitch variations ranging from 15 to 30 /tm were implemented in one-and twodimensional arrays with up to 20'000 units. The impact of the cell pitch on the turn-off performance and the on-state voltage was studied for arrays with constant cathode area as well as for single cell structures. By realizing MOS com ponents with submicron channel lengths, scaled single cells are shown to turn off with current densities of several thousands of Acm-2 at a gate bias of 5 V. Critical process parameters as well as the device behavior were optimized through multi dimensional simulation studies. 11.6.1
MOS-thyristor devices with high voltage and current capabilities may replace conventional thyristors and IGBTs in high power applications. However, the maximum controllable current density (J mcc ), the current saturation capability and the total transient losses have to be improved. This article is addressed to the comparison of the electrical charateristics of MOS-thyristor structures including a Floating Ohmic Contact to provide high packing density and current saturation capability. The operation mode of both structures is analyzed with the aid of numerical simulations and experimental results, obtained from 1200 V devices, are provided to compare their electrical characteristics. ᭧ 1999 Elsevier Science Ltd. All rights reserved.