Efficient Design of Cmos Circuits Using New Reverse Body Biased Technique in Domino Logic for Sub Threshold Leakage Reduction (original) (raw)
Domino logics are widely used in modern VLSI circuits for its high speed over the static CMOS circuits. But the main drawback of this domino logic is more susceptible to noise and increased power dissipation. A Dynamic logic which combines the advance of high speed and noise tolerant circuit is used in recent CMOS VLSI circuits. In this paper, we propose several domino logic circuit techniques to improve the robustness and performance along with leakage power using the new novel reverse body biased (RBB) technique. In this work, different types of AND gates with Conventional Body Bias & reverse body bias inverters are compared with their performances. Lower total power consumption is achieved by utilizing proposed techniques. The results are simulated using MICROWIND and DSCH 3 CAD tools and their performances are compared in terms of power dissipation, propagation delay and PDP Research Article
Sign up for access to the world's latest research.
checkGet notified about relevant papers
checkSave papers to use in your research
checkJoin the discussion with peers
checkTrack your impact
Loading Preview
Sorry, preview is currently unavailable. You can download the paper by clicking the button above.