Computation of design values for Class E amplifiers without using waveform equations (original) (raw)
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Design Equations for Class-E Power Amplifiers
Journal of Materials Processing Technology, 2006
In literature, it is widely accepted that the design of Class-E Power Amplifier (PA) with finite dc feed inductance requires a long iterative solution procedure. To avoid such iterative solution methods, analytical design equations should be known. The problem associated with the finite dc feed inductance Class-E PA is usually ascribed to the fact that the circuit element values are transcendental functions of the input parameters which is assumed to prevent the derivation of exact or fully analytical design equations.
Analytical Design Equations for Class-E Power Amplifiers
IEEE Transactions on Circuits and Systems I-regular Papers, 2007
Many critical design trade-offs of the Class-E power amplifier (e.g power efficiency) are influenced by the switch onresistance and the value of dc-feed drain inductance. In literature, the time-domain mathematical analyses of the Class-E power amplifier with finite dc-feed inductance assume zero switch onresistance in order to alleviate the mathematical difficulties; resulting in non-optimum designs.
An Off-Nominal Class E Amplifier—Design Oriented Analysis
Electronics
This paper analyses an off-nominal Class E ZVS amplifier, with an R.F. supply choke and the switch on-duty ratio D = 0.5, to identify conditions for its high-frequency and high-efficiency operation. Simple user-friendly analytical expressions for the essential parameters of the amplifier have been derived and subsequently validated by simulation and experimental results. It has been proven that the off-nominal amplifier can be optimized to outperform the nominal Class E amplifier with respect to crucial parameters such as, e.g., power efficiency or the operating frequency in some applications.
IET Power Electronics, 2020
In this study, the design of the class-E M power amplifier is presented. In this design, the effects of on-state resistance and non-linear parasitic capacitances of the transistors are investigated. Two metal oxide semiconductor field-effect transistors (MOSFETs) of IRFZ24N and IRF510 with different drain-source resistances are used in the presented circuits. In the given design, the values of the operational frequency and duty ratio are 3.5 MHz and 0.5, respectively. This study shows the importance of considering non-linear parasitic elements of MOSFET, especially drain-source resistance in the designing of the class-E M power amplifiers. It is shown that the class-E M power amplifier with high MOSFET drain-source resistance needs high DC input voltage for both the primary and auxiliary circuits. In the previous works, non-linear on-state resistance and non-linear drain-source and gate-drain capacitances have not been included at the same time in the analyses. Two class-E M amplifiers contain IRF510 and IRFZ24N are designed, simulated, and measured. The efficiency equal to 96.6% with 11.851 W output power at 3.5 MHz and the efficiency equal to 88.4% with 12.361 W output power are achieved for presented class-E M amplifiers contain IRFZ24N and IRF510, respectively.
Generalized Design Equations for Class-E Power Amplifiers with Finite DC Feed Inductance
IEEE Transactions on Pattern Analysis and Machine Intelligence, 2006
In literature, it is widely accepted that the design of Class-E Power Amplifier (PA) with finite dc feed inductance requires a long iterative solution procedure. To avoid such iterative solution methods, analytical design equations should be known. The problem associated with the finite dc feed inductance Class-E PA is usually ascribed to the fact that the circuit element values are transcendental functions of the input parameters which is assumed to prevent the derivation of exact or fully analytical design equations.
IET Circuits, Devices & Systems, 2016
In this study, design theory and analysis for the class E power amplifier (PA), considering the metal oxide semiconductor field effect transistor (MOSFET) parasitic input and output capacitances, are proposed. The input resistance and capacitances cause non-ideal input voltage at gate terminal, which affect the specifications of the class E PA. In the proposed study, non-linear drain-to-source, linear gate-to-drain and linear gate-to-source MOSFET parasitic capacitances are considered, while zero voltage and zero derivative switching conditions are achieved. Moreover, the input resistance and the value of the input voltage are taken into account in the design theory. According to the obtained results, the duty cycle of the MOSFET depends on the MOSFET threshold voltage, input voltage, input series resistance, and some other parameters, which will be explained in this study. A design example is finally given to describe the design procedure at 1 MHz operating frequency along with the experimental result. The circuit simulation is also performed using PSpice software. The measured results showed quantitative agreements with simulation and theory results.
Optimization of Class E Power Amplifier Design above Theoretical Maximum Frequency
2008
In this contribution, the analysis on high frequency Class E design approach is presented. Starting from the classical theory, a numerical analysis is performed to extend class E feasibility at higher frequencies. The design of hybrid Class-E amplifier in LDMOS technology for UMTS base-station applications will be presented, in order to validate the theoretical results. The simulated PA reaches an output power of 40.7dBm in correspondence of 56% drain efficiency.
Design of Class E Power Amplifier with New Structure and Flat Top Switch Voltage Waveform
IEEE Transactions on Power Electronics, 2018
In this paper, a new topology of the class E power amplifier (PA) is proposed. The output circuit in the proposed power amplifier is different from that in the conventional class E PA. The conventional output circuit of class E power amplifier consists of shunt capacitor, resonant capacitor, resonant inductor, and shifting inductor. An additional shunt capacitance is added between the resonant capacitance and the shifting inductor to shape the reduced switch voltage. The peak switch voltage of the proposed class E PA is approximately 78% of that of the conventional one, which shows a reduction in peak switch voltage. The lower peak switch voltage reduces the breakdown voltage of the active device. Also, the proposed structure can introduce a new family of switching power amplifiers with interesting specifications. Several values of switch voltage reduction and output power capability could be achieved by varying the circuit elements. Zero voltage and zero derivative switching (ZVS and ZDS) conditions are achieved in the switch voltage of the designed circuit. The simulation of the proposed circuit is performed using PSpice software. For verification, the presented PA is fabricated and measured.
Design of Class-EM Power Amplifier at any DC voltage source considering nonlinear capacitances
International Journal of Electronics, 2018
In this paper, the effects of the DC input voltage source on the class-E M power amplifier design and specifications at 4 MHz operating frequency are investigated. The most important parameters of the class-E M power amplifier are the output power, output power capability, maximum voltage and current of the MOSFETs and power conversion efficiency which are all dependent on the input DC power supply. In this paper, IRFZ24N and IRF510 transistors have been used for the presented designs. The measured efficiency and output power at DC source voltage of the main circuit equal to 12 V for the proposed class-E M power amplifier with IRFZ24N are 96.2 % and 21.78 W, respectively. The measured results for IRFZ24N are consistent with simulation and analysis results.