Growth of vertical and defect free InP nanowires on SrTiO3(001) substrate and comparison with growth on silicon (original) (raw)

Growth of one-dimensional III–V structures on Si nanowires and pre-treated planar Si surfaces

Journal of Crystal Growth, 2009

This paper presents a technique that allows the growth of epitaxial GaAs nanowires that are aligned to the crystal directions of the Si substrate. Low-pressure chemical vapor deposition (LP-CVD) grown Si nanowires were used as templates for molecular beam epitaxy (MBE) growth. The growth direction of the nanowires aligns with the [111] direction perpendicular to the Si substrate. After deposition of 200 nm GaAs in a solid source MBE system, we observed the formation of GaAs whiskers perpendicular to the {11 2} sidewalls of Si nanowires. By TEM analysis, the crystal structure of the GaAs nanostructures could be identified as wurtzite, where the growth axis of the wires was in the [0 0 0 1] direction. The whiskers are of good crystalline quality as no dislocations or stacking faults were observed in large areas by TEM, which makes these structures potential candidates for III-V integration on Si. In parallel to these experiments, we found a growth technique that allows GaAs nanowires to grow along the [111] direction of the planar Si [11 2] substrates. III-V nanowires with comparable geometry but higher density could be realized.

Self-induced growth of vertical free-standing InAs nanowires on Si(111) by molecular beam epitaxy

Nanotechnology, 2010

We report self-induced growth of vertically aligned (i.e. along the [111] direction), free-standing InAs nanowires on Si(111) substrates by solid-source molecular beam epitaxy. Implementation of an ultrathin amorphous SiO x mask on Si(111) facilitated epitaxial InAs nanowire growth, as confirmed by high-resolution x-ray diffraction 2θ-ω scans and transmission electron microscopy. Depending on growth temperature (in the range of 400-520 • C) substantial size variation of both nanowire length and diameter was found under preservation of uniform, non-tapered hexagon-shaped geometries. The majority of InAs nanowires exhibited phase-pure zinc blende crystal structure with few defective regions consisting of stacking faults. Photoluminescence spectroscopy at 20 K revealed peak emission of the InAs nanowires at 0.445 eV, which is ∼30 meV blueshifted with respect to the emission of the bulk InAs reference due to radial quantum confinement effects. These results show a promising route towards integration of well-aligned, high structural quality InAs-based nanowires with the desired aspect ratio and tailored emission wavelengths on an Si platform.

Epitaxial Growth of Indium Arsenide Nanowires on Silicon Using Nucleation Templates Formed by Self-Assembled Organic Coatings

Advanced Materials, 2007

The material properties of III-V semiconductors are in many ways superior to those of Si. Examples of these properties are the possibilities for high electron mobilities and the direct bandgap in most III-V semiconductors. Even so, Si remains the standard material in the electronics industry. A successful combination of these two material systems would add new functionality and increased performance compared to standard Si technology. Although these advantages have long been recognized, the monolithic integration of devicequality III-V materials on Si remains a major challenge. In this work, we report on heteroepitaxial growth of InAs nanowires (NWs) directly on Si substrates by employing self-assembled organic coatings to create an oxide template that guides NW nucleation. Such a template resembles the growth masks used in selective-area epitaxy of nanostructures on III-V substrates. Importantly, Au, which is commonly used for NW synthesis but not compatible with modern complementary metal oxide semiconductor (CMOS) processing, is avoided. The described nucleation method presents clear advantages in terms of epitaxial quality and control of NW size and density distributions compared to previous results achieved on Si using catalyst-free NW growth. The control demonstrated in the fields of self-assembled and printed organic nanostructures illustrates how the method may be extended to more complex patterning in future work.

III-V nanowires on black silicon and low-temperature growth of self-catalyzed rectangular InAs NWs

Scientific reports, 2018

We report the use of black silicon (bSi) as a growth platform for III-V nanowires (NWs), which enables low reflectance over a broad wavelength range as well as fabrication of optoelectronic devices by metalorganic vapor phase epitaxy. In addition, a new isolated growth regime is reported for self-catalyzed InAs NWs at record-low temperatures of 280 °C-365 °C, where consistently rectangular [-211]-oriented NWs are obtained. The bSi substrate is shown to support the growth of additionally GaAs and InP NWs, as well as heterostructured NWs. As seed particles, both ex-situ deposited Au nanoparticles and in-situ deposited In droplets are shown feasible. Particularly the InAs NWs with low band gap energy are used to extend low-reflectivity wavelength region into infrared, where the bSi alone remains transparent. Finally, a fabricated prototype device confirms the potential of III-V NWs combined with bSi for optoelectronic devices. Our results highlight the promise of III-V NWs on bSi for e...

Growth of III-V semiconductor nanowires by molecular beam epitaxy

Microelectronics Journal, 2009

We present here the growth of GaAs, InAs and InGaAs nanowires by molecular beam epitaxy. The nanowires have been grown on different substrates [GaAs(0 0 1), GaAs , SiO 2 and Si(111)] using gold as the growth catalyst. We show how the different substrates affect the results in terms of nanowire density and morphology. We also show that the growth temperature for the InGaAs nanowires has to be carefully chosen to obtain homogeneous alloys.

Density-controlled growth of vertical InP nanowires on Si(111) substrates

Nanotechnology, 2020

A procedure to achieve the density-controlled growth of gold-catalyzed InP nanowires (NWs) on (111) silicon substrates using the vapor-liquid-solid method by molecular beam epitaxy is reported. We develop an effective and mask-free method based on controlling the number and the size of the Au-In catalyst droplets in addition to the conditions for the NW nucleation. We show that the NW density can be tuned with values in the range of 18 µm-2 to < 0.1 µm-2 by the suitable choice of the In/Au catalyst beam equivalent pressure (BEP) ratio, by the phosphorous BEP and the growth temperature. The same degree of control is transferred to InAs/InP quantum dot-nanowires, taking advantage of the ultra-low density to study by micro-photoluminescence the optical properties of a single quantum dot-nanowires emitting in the telecom band monolithically grown on silicon. Optical spectroscopy at cryogenic temperature successfully confirmed the relevance of our method to excite single InAs quantum dots on the as-grown sample, which opens the path for large-scale applications based on single quantum dot-nanowire devices integrated on silicon.

InAs/InP nanowires grown by catalyst assisted molecular beam epitaxy on silicon substrates

Journal of Crystal Growth, 2012

A1. Core-shell nanowires A3. VLS-MBE B2. III-V Semiconductors B3. Monolithic integration on silicon a b s t r a c t InP nanowires (NWs) with an InAs insertion were grown on (001)-and (111)-oriented silicon substrates by catalyst assisted molecular beam epitaxy. To prevent the crystallization of the catalyst droplet we propose a procedure based on the realization of the switching of the elements V flux during a growth interruption. With this procedure and with the growth conditions we have used, the crystal structure of the NWs is purely wurtzite without any stacking faults. With these growth conditions, both radial and axial growths occur simultaneously and we show that the growth time of the InAs insertion could be adjusted to obtain radial quantum well emitting in the 1.3-1.6 mm telecom band at room temperature.

Indium (In)-Catalyzed Silicon Nanowires (Si NWs) Grown by the Vapor-Liquid-Solid (VLS) Mode for Nanoscale Device Applications

Intechopen, 2021

Stacking fault free and planar defects (twin plane) free catalyzed Si nanowires (Si NWs) is essential for the carrier transport in the nanoscale devices applications. In this chapter, In-catalyzed, vertically aligned and cone-shaped Si NWs arrays were grown by using vapor-liquid-solid (VLS) mode on Si (111) substrates. We have successfully controlled the verticality and (111)-orientation of Si NWs as well as scaled down the diameter to 18 nm. The density of Si NWs was also enhanced from 2.5 μm −2 to 70 μm −2. Such vertically aligned, (111)-oriented p-type Si NWs are very important for the nanoscale device applications including Si NWs/c-Si tandem solar cells and p-Si NWs/n-InGaZnO Heterojunction LEDs. Next, the influence of substrate growth temperature (T S), cooling rate (∆T S /∆) on the formation of planar defects, twining along [112] direction and stacking fault in Si NWs perpendicular to (111)-orientation were deeply investigated. Finally, one simple model was proposed to explain the formation of stacking fault, twining of planar defects in perpendicular direction to the axial growth direction of Si NWs. When the T S was decreased from 600°C with the cooling rate of 100°C/240 sec to room temperature (RT) after Si NWs growth then the twin planar defects perpendicular to the substrate and along different segments of (111)-oriented Si NWs were observed.

Molecular beam epitaxy of InAs nanowires in SiO2nanotube templates: challenges and prospects for integration of III–Vs on Si

Nanotechnology, 2016

Guided growth of semiconductor nanowires in nanotube templates has been considered as a potential platform for reproducible integration of III-Vs on silicon or other mismatched substrates. Herein, we report on the challenges and prospects of molecular beam epitaxy of InAs nanowires on SiO2/Si nanotube templates. We show how and under which conditions the nanowire growth is initiated by In-assisted vapor-liquid-solid growth enabled by the local conditions inside the nanotube template. The conditions for high yield of vertical nanowires are investigated in terms of the nanotube depth, diameter and V/III flux ratios. We present a model that further substantiates our findings. This work opens new perspectives for monolithic integration of III-Vs on the silicon platform enabling new applications in the electronics, optoelectronics and energy harvesting arena.

Molecular beam epitaxy of InN nanowires on si

Journal of Crystal Growth, 2015

We report on a systematic growth study of the nucleation process of InN nanowires on Si(1 1 1) substrates using plasma assisted molecular beam epitaxy (PAMBE). Samples are grown with various substrate temperatures and III/V ratios. Scanning electron microscopy, X-ray diffraction spectroscopy, energy dispersive X-ray spectroscopy, and photoluminescence are carried out to map out the variation in structural and optical properties versus growth conditions. Statistical averages of areal density, height, and radius are mapped as a function of substrate temperature and III/V ratio. Three different morphological phases are identified on the growth surface: InN, α-In and β-In. Based on SEM image analysis of samples grown at different conditions, the formation mechanism of these phases is proposed. Finally, the growth phase diagram of PAMBE grown InN on Si under N-rich condition is presented, and tapered versus non-tapered growth conditions are identified. It is found that high growth temperature and low III/V ratio plays a critical role in the growth of non-tapered InN nanowires.