A Capacitance-To-Digital Converter for MEMS Sensors for Smart Applications (original) (raw)
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Sensors, 2019
This article focuses on a proposed Switched-Capacitor Dual-Slope based CDC. Special attention is paid to the measurement setup using a real pressure sensor. Performance scaling potential as well as dead zones are pointed out and discussed. In depth knowledge of the physical sensor behavior is key to design an optimal readout circuit. While this is true for high-end applications, low-performance IoT (Internet of Things) sensors aim at moderate resolution with very low power consumption. This article also provides insights into basic MEMS (Micro-Electro-Mechanical-System) physics. Based on that, an ambient air pressure sensor model for SPICE (Simulation-Program-with-Integrated-Circuit-Emphasis) circuit simulators is presented. The converter concept was proven on silicon in a 0.13 μ m process using both a real pressure sensor and an on-chip dummy MEMS bridge. A 3.2-ms measurement results in 13-bit resolution while consuming 35 μ A from a 1.5-V supply occupying 0.148 mm2. A state-of-the...
On the Design and Optimization of a Switched-Capacitor Interface Circuit for MEMS Capacitive Sensors
In this paper a switched-capacitor (SC) interface circuit that is intended for MEMS capacitive sensors is proposed and designed. In the proposed architecture, both correlated double sampling (CDS) and chopper stabilization (CHS) noise reduction techniques are applied to the interface circuit to reduce the amplifier offset and low frequency noise. The effects of parasitic capacitances between the sensor and its interface circuit which are usually larger than the sense capacitances are carefully analyzed and used to optimize the readout performance. In other words, by analyzing the circuit offset and noise performance in presence of these parasitic capacitances, the suitable values of the circuit parameters such as sampling frequency, chopping frequency, and amplifier unity gain bandwidth are calculated. In comparison to the circuit using only CDS or CHS technique, the resolution variation of the proposed readout circuit is less than laF in presence of parasitic capacitances varying up to 20 pF.
Monolithic integration of capacitive sensors using a double-side CMOS MEMS post process
Journal of Micromechanics and Microengineering, 2009
This study presents a novel double-side CMOS (complementary metal-oxide-semiconductor) post-process to monolithically integrate various capacitance-type CMOS MEMS sensors on a single chip. The CMOS post-process consists of three steps: (1) front-side bulk silicon etching, (2) backside bulk silicon etching and (3) sacrificial surface metal layers etching. Using a TSMC 2P4M CMOS process and the present double-side post-process this study has successfully integrated several types of capacitive transducers and their sensing circuits on a single chip. Monolithic integration of pressure sensors of different sensing ranges and sensitivities, three-axes accelerometers, and a pressure sensor and accelerometer are demonstrated. The measurement results of the pressure sensors show sensitivities ranging from 0.14 mV kPa −1 to 7.87 mV kPa −1 . The three-axes accelerometers have a sensitivity of 3.9 mV G −1 in the in-plane direction and 0.9 mV G −1 in the out-of-plane direction; and the accelerated measurement ranges from 0.3 G to 6 G.
Programmable Low-Power Low-Noise Capacitance to Voltage Converter for MEMS Accelerometers
Sensors
In this work, we present a capacitance-to-voltage converter (CVC) for capacitive accelerometers based on microelectromechanical systems (MEMS). Based on a fully-differential transimpedance amplifier (TIA), it features a 34-dB transimpedance gain control and over one decade programmable bandwidth, from 75 kHz to 1.2 MHz. The TIA is aimed for low-cost low-power capacitive sensor applications. It has been designed in a standard 0.18-µm CMOS technology and its power consumption is only 54 µW. At the maximum transimpedance configuration, the TIA shows an equivalent input noise of 42 fA/ √ Hz at 50 kHz, which corresponds to 100 µg/ √ Hz.
Design and Simulation of MEMS Capacitive Pressure Sensor
Employing the MEMS technology, high sensitivities and resolutions have been achieved. Capacitive sensing uses the diaphragm deformation-induced capacitance change. In this paper, the design and simulation of conventional slotted and touch mode MEMS capacitive pressure sensor is proposed. The designed sensors are composed of a polysilicon diaphragm that deflects due to pressure applied over it, is accounted for modeling. The simulation results shows that the slotted MEMS capacitive pressure sensor achieves good sensitivity where as the touch mode MEMS capacitive pressure sensor achieves good linearity and large operating pressure range. The proposed MEMS capacitive pressure sensor demonstrated with diaphragm of side length 20 μm, gap depth 2 m is being modelled. The sensor exhibit a linear response for the pressure applied between 0 to 50 MPa. The simulation is carried out for different types of MEMS capacitive pressure sensor using COMSOL Multiphysics.
A Review of MEMS based Capacitive Pressure Sensor
This paper presents a review of the capacitive pressure sensor. Firstly, the different types of sensors available are compared. For applications requiring high sensitivity and very low effects due to temperature, the capacitive sensor is preferred. Various methods to change the capacitance are also compared, which leads to the conclusion that the method involving changing the distance between the plates has the highest sensitivity. The different diaphragms available are also compared in this paper. The result of the comparison shows that the square diaphragm is most suitable. Further study shows that the diaphragm with a bossed structure has the highest sensitivity and the lowest nonlinearity. After the structural analysis, the pull-in effect phenomenon present during anodic bonding is also studied. The analysis of the pull-in effect showed that the dimension of the sensor should be chosen such that the electrodes do not stick during the anodic bonding. Different capacitive sensing schemes are also shown in this paper. The parasitic capacitances and the noise are major factors limiting the performance of the sensor. So the sources and methods to mitigate such effects are also presented. The ASICs available for the conversion of the capacitance to voltage or digital output are compared based on different parameters.
A Tunable Low-Power Semi-Digital Interface Circuit for Capacitive Sensors with Calibration Procedure
A new technique and circuit topology is proposed to read the output of a capacitive sensor for lab-on-chip (LOC) applications. Through capacitance-to-time conversion, together with several digital blocks, a first-order sigma-delta interface is developed. By encoding the change in capacitance as the difference in time between the rising edges of two digital signals, a compact, low-power realization is achieved. Moreover, the design is tunable along three axes: power, resolution and range. A digital calibration procedure is provided that exploits these three degrees of tuning and enables the design to be optimized for a desired capacitance range. A circuit has been fabricated in a 1-V 90-nm ST CMOS process requiring 120 μm x 20 μm footprint. Tests were conducted with on-chip capacitance ranging from 12.5 fF to 8 pF and the circuit was shown to be capable of measuring this full range of capacitance in a piecewise manner with a power consumption of 34 μW.
Sensors and Actuators A: Physical, 2016
An energy-efficient readout circuit for a capacitive sensor is presented. The capacitive sensor is digitized by a 12-bit energy efficient capacitance-to-digital converter (CDC) that is based on a differential successive-approximation architecture. This CDC meets extremely low power requirements by using an operational transconductance amplifier (OTA) that is based on a current-starved inverter. It uses a charge-redistribution DAC that involves coarse-fine architecture. We split the DAC into a coarse-DAC and a fine-DAC to allow a wide capacitance range in a compact area. It covers a wide range of capacitance of 16.14 pF with a 4.5 fF absolute resolution. An analog comparator is implemented by cross-coupling two 3-input NAND gates to enable power and area efficient operation. The prototype CDC was fabricated using a standard 180 nm CMOS technology. The 12-bit CDC has a measurement time of 42.5 s, and consumes 3.54 W and 0.29 W from analog and digital supplies, respectively. This corresponds to a state-of-the-art figure-of-merit (FoM) of 45.8 fJ/conversion-step.
IEEE Sensors Journal, 2016
This paper presents a low power, compact, and low complexity pulse-width modulation based interface circuit for capacitive MEMS sensors. The circuit is designed using a ring oscillator, a RC controlled pulse generator with highpass filter, and a self-tuning inverter comparator to produce pulse width which is proportional to differential capacitance and independent of parasitic capacitance. The high-pass filter is utilized to reduce the bandwidth of noise sources. The circuit provides control over sensitivity, dynamic range, and nominal point for the capacitance measurement by selecting controlling parameters such as resistance of the RC pulse generator, biasing voltage of the self-tuning inverter comparator, and a reference capacitor using digital control signals. The circuit provides high linearity with higher sensitivity and lower power consumption. The sensitivity of the circuit is 0.56 to 3.62 µs/pF depending on the controlling parameters. The maximum dynamic sensing range is 22 to 270 pF depending on the controlling parameters The interface circuit is designed and fabricated using the UMC 0.18 µm CMOS technology. It occupies an active area of 0.17 mm 2 and consumes 98 µW. A capacitive MEMS based pressure sensor is also connected with the interface circuit to measure pressure throughout the digestive tract. The sensitivity for pressure from 101 to 200 kPa is 60 ns/kPa and from 50 to 101 kPa is 23 ns/kPa.