Generalized Parallelization of String Matching Algorithms on SIMD Architecture (original) (raw)
String matching is a classical problem in computer science. Numerous algorithms are known to solve the string matching problem such as Brute Force algorithm, KMP, Boyer Moore, various improved versions of Boyer-Moore, Bit Parallel BNDM algorithm and various others algorithms for single pattern string matching, Aho-Corasick, multiple pattern bit parallel algorithm for multiple pattern string matching. The algorithms have mainly been designed to work on a single processor called as sequential algorithms. To make the algorithms more time efficient by utilizing the processor maximum, a parallel approach the generalized text division concept of parallelization for string matching has been introduced. The parallelized approach is conceived by dividing the text and different parts of the text are worked simultaneously upon the same string matching algorithm to match the patterns. The concept is applicable to any of exact single and multiple pattern string matching algorithms. The notion of text dividing achieves parallelization on a SIMD parallel architecture. As different parts of the text are processed in parallel, special attention is required at the connection or division points for consistent and complete searching. This concept makes all string matching algorithms more time efficient in compare to the sequential algorithm. This paper presents how different string matching algorithms are implemented using the parallelization concept on different SIMD architectures like multithreaded on multi-core and GPUs. There performance comparison also shown in this paper. https://sites.google.com/site/ijcsis/
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